| 1 | /*
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| 2 | * Copyright (c) 2017 Jaroslav Jindrak
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup drvusbxhci
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| 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | * @brief Command sending functions.
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| 34 | */
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| 35 |
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| 36 | #include <errno.h>
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| 37 | #include <str_error.h>
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| 38 | #include <usb/debug.h>
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| 39 | #include "commands.h"
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| 40 | #include "debug.h"
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| 41 | #include "hc.h"
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| 42 | #include "hw_struct/context.h"
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| 43 | #include "hw_struct/trb.h"
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| 44 |
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| 45 | #define TRB_SET_TSP(trb, tsp) (trb).control |= host2xhci(32, (((tsp) & 0x1) << 9))
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| 46 | #define TRB_SET_TYPE(trb, type) (trb).control |= host2xhci(32, (type) << 10)
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| 47 | #define TRB_SET_DC(trb, dc) (trb).control |= host2xhci(32, (dc) << 9)
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| 48 | #define TRB_SET_EP(trb, ep) (trb).control |= host2xhci(32, ((ep) & 0x5) << 16)
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| 49 | #define TRB_SET_STREAM(trb, st) (trb).control |= host2xhci(32, ((st) & 0xFFFF) << 16)
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| 50 | #define TRB_SET_SUSP(trb, susp) (trb).control |= host2xhci(32, ((susp) & 0x1) << 23)
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| 51 | #define TRB_SET_SLOT(trb, slot) (trb).control |= host2xhci(32, (slot) << 24)
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| 52 | #define TRB_SET_DEV_SPEED(trb, speed) (trb).control |= host2xhci(32, (speed & 0xF) << 16)
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| 53 | #define TRB_SET_DEQUEUE_PTR(trb, dptr) (trb).parameter |= host2xhci(64, (dptr))
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| 54 | #define TRB_SET_ICTX(trb, phys) (trb).parameter |= host2xhci(64, (phys) & (~0xF))
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| 55 |
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| 56 | #define TRB_GET_CODE(trb) XHCI_DWORD_EXTRACT((trb).status, 31, 24)
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| 57 | #define TRB_GET_SLOT(trb) XHCI_DWORD_EXTRACT((trb).control, 31, 24)
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| 58 | #define TRB_GET_PHYS(trb) (XHCI_QWORD_EXTRACT((trb).parameter, 63, 4) << 4)
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| 59 |
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| 60 | /* Control functions */
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| 61 |
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| 62 | static xhci_cmd_ring_t *get_cmd_ring(xhci_hc_t *hc)
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| 63 | {
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| 64 | assert(hc);
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| 65 | return &hc->cr;
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| 66 | }
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| 67 |
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| 68 | /**
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| 69 | * Initialize the command subsystem. Allocates the comand ring.
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| 70 | *
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| 71 | * Does not configure the CR pointer to the hardware, because the xHC will be
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| 72 | * reset before starting.
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| 73 | */
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| 74 | int xhci_init_commands(xhci_hc_t *hc)
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| 75 | {
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| 76 | xhci_cmd_ring_t *cr = get_cmd_ring(hc);
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| 77 | int err;
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| 78 |
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| 79 | if ((err = xhci_trb_ring_init(&cr->trb_ring, 0)))
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| 80 | return err;
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| 81 |
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| 82 | fibril_mutex_initialize(&cr->guard);
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| 83 | fibril_condvar_initialize(&cr->state_cv);
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| 84 | fibril_condvar_initialize(&cr->stopped_cv);
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| 85 |
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| 86 | list_initialize(&cr->cmd_list);
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| 87 |
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| 88 | return EOK;
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| 89 | }
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| 90 |
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| 91 | /**
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| 92 | * Finish the command subsystem. Stops the hardware from running commands, then
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| 93 | * deallocates the ring.
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| 94 | */
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| 95 | void xhci_fini_commands(xhci_hc_t *hc)
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| 96 | {
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| 97 | assert(hc);
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| 98 | xhci_stop_command_ring(hc);
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| 99 |
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| 100 | xhci_cmd_ring_t *cr = get_cmd_ring(hc);
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| 101 |
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| 102 | fibril_mutex_lock(&cr->guard);
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| 103 | xhci_trb_ring_fini(&cr->trb_ring);
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| 104 | fibril_mutex_unlock(&cr->guard);
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| 105 | }
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| 106 |
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| 107 | /**
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| 108 | * Initialize a command structure for the given command.
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| 109 | */
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| 110 | void xhci_cmd_init(xhci_cmd_t *cmd, xhci_cmd_type_t type)
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| 111 | {
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| 112 | memset(cmd, 0, sizeof(*cmd));
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| 113 |
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| 114 | link_initialize(&cmd->_header.link);
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| 115 |
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| 116 | fibril_mutex_initialize(&cmd->_header.completed_mtx);
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| 117 | fibril_condvar_initialize(&cmd->_header.completed_cv);
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| 118 |
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| 119 | cmd->_header.cmd = type;
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| 120 | }
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| 121 |
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| 122 | /**
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| 123 | * Finish the command structure. Some command invocation includes allocating
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| 124 | * a context structure. To have the convenience in calling commands, this
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| 125 | * method deallocates all resources.
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| 126 | */
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| 127 | void xhci_cmd_fini(xhci_cmd_t *cmd)
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| 128 | {
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| 129 | list_remove(&cmd->_header.link);
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| 130 |
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| 131 | dma_buffer_free(&cmd->input_ctx);
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| 132 | dma_buffer_free(&cmd->bandwidth_ctx);
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| 133 |
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| 134 | if (cmd->_header.async) {
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| 135 | free(cmd);
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| 136 | }
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| 137 | }
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| 138 |
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| 139 | /**
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| 140 | * Find a command issued by TRB at @c phys inside the command list.
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| 141 | *
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| 142 | * Call with guard locked only.
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| 143 | */
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| 144 | static inline xhci_cmd_t *find_command(xhci_hc_t *hc, uint64_t phys)
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| 145 | {
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| 146 | xhci_cmd_ring_t *cr = get_cmd_ring(hc);
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| 147 | assert(fibril_mutex_is_locked(&cr->guard));
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| 148 |
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| 149 | link_t *cmd_link = list_first(&cr->cmd_list);
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| 150 |
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| 151 | while (cmd_link != NULL) {
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| 152 | xhci_cmd_t *cmd = list_get_instance(cmd_link, xhci_cmd_t, _header.link);
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| 153 |
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| 154 | if (cmd->_header.trb_phys == phys)
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| 155 | break;
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| 156 |
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| 157 | cmd_link = list_next(cmd_link, &cr->cmd_list);
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| 158 | }
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| 159 |
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| 160 | return cmd_link ? list_get_instance(cmd_link, xhci_cmd_t, _header.link)
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| 161 | : NULL;
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| 162 | }
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| 163 |
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| 164 | static void cr_set_state(xhci_cmd_ring_t *cr, xhci_cr_state_t state)
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| 165 | {
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| 166 | assert(fibril_mutex_is_locked(&cr->guard));
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| 167 |
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| 168 | cr->state = state;
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| 169 | if (state == XHCI_CR_STATE_OPEN
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| 170 | || state == XHCI_CR_STATE_CLOSED)
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| 171 | fibril_condvar_broadcast(&cr->state_cv);
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| 172 | }
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| 173 |
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| 174 | static int wait_for_ring_open(xhci_cmd_ring_t *cr)
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| 175 | {
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| 176 | assert(fibril_mutex_is_locked(&cr->guard));
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| 177 |
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| 178 | while (true) {
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| 179 | switch (cr->state) {
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| 180 | case XHCI_CR_STATE_CHANGING:
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| 181 | case XHCI_CR_STATE_FULL:
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| 182 | fibril_condvar_wait(&cr->state_cv, &cr->guard);
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| 183 | break;
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| 184 | case XHCI_CR_STATE_OPEN:
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| 185 | return EOK;
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| 186 | case XHCI_CR_STATE_CLOSED:
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| 187 | return ENAK;
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| 188 | }
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| 189 | }
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| 190 | }
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| 191 |
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| 192 | /**
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| 193 | * Enqueue a command on the TRB ring. Ring the doorbell to initiate processing.
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| 194 | * Register the command as waiting for completion inside the command list.
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| 195 | */
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| 196 | static inline int enqueue_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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| 197 | {
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| 198 | xhci_cmd_ring_t *cr = get_cmd_ring(hc);
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| 199 | assert(cmd);
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| 200 |
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| 201 | fibril_mutex_lock(&cr->guard);
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| 202 |
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| 203 | if (wait_for_ring_open(cr)) {
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| 204 | fibril_mutex_unlock(&cr->guard);
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| 205 | return ENAK;
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| 206 | }
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| 207 |
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| 208 | usb_log_debug("Sending command %s", xhci_trb_str_type(TRB_TYPE(cmd->_header.trb)));
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| 209 |
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| 210 | list_append(&cmd->_header.link, &cr->cmd_list);
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| 211 |
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| 212 | int err = EOK;
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| 213 | while (err == EOK) {
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| 214 | err = xhci_trb_ring_enqueue(&cr->trb_ring,
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| 215 | &cmd->_header.trb, &cmd->_header.trb_phys);
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| 216 | if (err != EAGAIN)
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| 217 | break;
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| 218 |
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| 219 | cr_set_state(cr, XHCI_CR_STATE_FULL);
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| 220 | err = wait_for_ring_open(cr);
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| 221 | }
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| 222 |
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| 223 | if (err == EOK)
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| 224 | hc_ring_doorbell(hc, 0, 0);
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| 225 |
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| 226 | fibril_mutex_unlock(&cr->guard);
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| 227 |
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| 228 | return err;
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| 229 | }
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| 230 |
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| 231 | /**
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| 232 | * Stop the command ring. Stop processing commands, block issuing new ones.
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| 233 | * Wait until hardware acknowledges it is stopped.
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| 234 | */
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| 235 | void xhci_stop_command_ring(xhci_hc_t *hc)
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| 236 | {
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| 237 | xhci_cmd_ring_t *cr = get_cmd_ring(hc);
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| 238 |
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| 239 | fibril_mutex_lock(&cr->guard);
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| 240 |
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| 241 | // Prevent others from starting CR again.
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| 242 | cr_set_state(cr, XHCI_CR_STATE_CLOSED);
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| 243 |
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| 244 | XHCI_REG_SET(hc->op_regs, XHCI_OP_CS, 1);
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| 245 |
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| 246 | while (XHCI_REG_RD(hc->op_regs, XHCI_OP_CRR))
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| 247 | fibril_condvar_wait(&cr->stopped_cv, &cr->guard);
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| 248 |
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| 249 | fibril_mutex_unlock(&cr->guard);
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| 250 | }
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| 251 |
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| 252 | /**
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| 253 | * Mark the command ring as stopped. NAK new commands, abort running, do not
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| 254 | * touch the HC as it's probably broken.
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| 255 | */
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| 256 | void xhci_nuke_command_ring(xhci_hc_t *hc)
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| 257 | {
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| 258 | xhci_cmd_ring_t *cr = get_cmd_ring(hc);
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| 259 | fibril_mutex_lock(&cr->guard);
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| 260 | // Prevent others from starting CR again.
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| 261 | cr_set_state(cr, XHCI_CR_STATE_CLOSED);
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| 262 | fibril_mutex_unlock(&cr->guard);
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| 263 | }
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| 264 |
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| 265 | /**
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| 266 | * Mark the command ring as working again.
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| 267 | */
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| 268 | void xhci_start_command_ring(xhci_hc_t *hc)
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| 269 | {
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| 270 | xhci_cmd_ring_t *cr = get_cmd_ring(hc);
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| 271 | fibril_mutex_lock(&cr->guard);
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| 272 | // Prevent others from starting CR again.
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| 273 | cr_set_state(cr, XHCI_CR_STATE_OPEN);
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| 274 | fibril_mutex_unlock(&cr->guard);
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| 275 | }
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| 276 |
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| 277 | /**
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| 278 | * Abort currently processed command. Note that it is only aborted when the
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| 279 | * command is "blocking" - see section 4.6.1.2 of xHCI spec.
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| 280 | */
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| 281 | static void abort_command_ring(xhci_hc_t *hc)
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| 282 | {
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| 283 | XHCI_REG_SET(hc->op_regs, XHCI_OP_CA, 1);
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| 284 | }
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| 285 |
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| 286 | static const char *trb_codes [] = {
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| 287 | #define TRBC(t) [XHCI_TRBC_##t] = #t
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| 288 | TRBC(INVALID),
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| 289 | TRBC(SUCCESS),
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| 290 | TRBC(DATA_BUFFER_ERROR),
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| 291 | TRBC(BABBLE_DETECTED_ERROR),
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| 292 | TRBC(USB_TRANSACTION_ERROR),
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| 293 | TRBC(TRB_ERROR),
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| 294 | TRBC(STALL_ERROR),
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| 295 | TRBC(RESOURCE_ERROR),
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| 296 | TRBC(BANDWIDTH_ERROR),
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| 297 | TRBC(NO_SLOTS_ERROR),
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| 298 | TRBC(INVALID_STREAM_ERROR),
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| 299 | TRBC(SLOT_NOT_ENABLED_ERROR),
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| 300 | TRBC(EP_NOT_ENABLED_ERROR),
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| 301 | TRBC(SHORT_PACKET),
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| 302 | TRBC(RING_UNDERRUN),
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| 303 | TRBC(RING_OVERRUN),
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| 304 | TRBC(VF_EVENT_RING_FULL),
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| 305 | TRBC(PARAMETER_ERROR),
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| 306 | TRBC(BANDWIDTH_OVERRUN_ERROR),
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| 307 | TRBC(CONTEXT_STATE_ERROR),
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| 308 | TRBC(NO_PING_RESPONSE_ERROR),
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| 309 | TRBC(EVENT_RING_FULL_ERROR),
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| 310 | TRBC(INCOMPATIBLE_DEVICE_ERROR),
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| 311 | TRBC(MISSED_SERVICE_ERROR),
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| 312 | TRBC(COMMAND_RING_STOPPED),
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| 313 | TRBC(COMMAND_ABORTED),
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| 314 | TRBC(STOPPED),
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| 315 | TRBC(STOPPED_LENGTH_INVALID),
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| 316 | TRBC(STOPPED_SHORT_PACKET),
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| 317 | TRBC(MAX_EXIT_LATENCY_TOO_LARGE_ERROR),
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| 318 | [30] = "<reserved>",
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| 319 | TRBC(ISOCH_BUFFER_OVERRUN),
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| 320 | TRBC(EVENT_LOST_ERROR),
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| 321 | TRBC(UNDEFINED_ERROR),
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| 322 | TRBC(INVALID_STREAM_ID_ERROR),
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| 323 | TRBC(SECONDARY_BANDWIDTH_ERROR),
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| 324 | TRBC(SPLIT_TRANSACTION_ERROR),
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| 325 | [XHCI_TRBC_MAX] = NULL
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| 326 | #undef TRBC
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| 327 | };
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| 328 |
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| 329 | /**
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| 330 | * Report an error according to command completion code.
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| 331 | */
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| 332 | static void report_error(int code)
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| 333 | {
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| 334 | if (code < XHCI_TRBC_MAX && trb_codes[code] != NULL)
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| 335 | usb_log_error("Command resulted in error: %s.", trb_codes[code]);
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| 336 | else
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| 337 | usb_log_error("Command resulted in reserved or vendor specific error.");
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| 338 | }
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| 339 |
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| 340 | /**
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| 341 | * Handle a command completion. Feed the fibril waiting for result.
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| 342 | *
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| 343 | * @param trb The COMMAND_COMPLETION TRB found in event ring.
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| 344 | */
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| 345 | int xhci_handle_command_completion(xhci_hc_t *hc, xhci_trb_t *trb)
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| 346 | {
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| 347 | xhci_cmd_ring_t *cr = get_cmd_ring(hc);
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| 348 | assert(trb);
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| 349 |
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| 350 | fibril_mutex_lock(&cr->guard);
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| 351 |
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| 352 | int code = TRB_GET_CODE(*trb);
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| 353 |
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| 354 | if (code == XHCI_TRBC_COMMAND_RING_STOPPED) {
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| 355 | /* This can either mean that the ring is being stopped, or
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| 356 | * a command was aborted. In either way, wake threads waiting
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| 357 | * on stopped_cv.
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| 358 | *
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| 359 | * Note that we need to hold mutex, because we must be sure the
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| 360 | * requesting thread is waiting inside the CV.
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| 361 | */
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| 362 | usb_log_debug("Command ring stopped.");
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| 363 | fibril_condvar_broadcast(&cr->stopped_cv);
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| 364 | fibril_mutex_unlock(&cr->guard);
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| 365 | return EOK;
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| 366 | }
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| 367 |
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| 368 | const uint64_t phys = TRB_GET_PHYS(*trb);
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| 369 | xhci_trb_ring_update_dequeue(&cr->trb_ring, phys);
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| 370 |
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| 371 | if (cr->state == XHCI_CR_STATE_FULL)
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| 372 | cr_set_state(cr, XHCI_CR_STATE_OPEN);
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| 373 |
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| 374 | xhci_cmd_t *command = find_command(hc, phys);
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| 375 | if (command == NULL) {
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| 376 | usb_log_error("No command struct for completion event found.");
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| 377 |
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| 378 | if (code != XHCI_TRBC_SUCCESS)
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| 379 | report_error(code);
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| 380 |
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| 381 | return EOK;
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| 382 | }
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| 383 |
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| 384 | list_remove(&command->_header.link);
|
|---|
| 385 |
|
|---|
| 386 | /* Semantics of NO_OP_CMD is that success is marked as a TRB error. */
|
|---|
| 387 | if (command->_header.cmd == XHCI_CMD_NO_OP && code == XHCI_TRBC_TRB_ERROR)
|
|---|
| 388 | code = XHCI_TRBC_SUCCESS;
|
|---|
| 389 |
|
|---|
| 390 | command->status = code;
|
|---|
| 391 | command->slot_id = TRB_GET_SLOT(*trb);
|
|---|
| 392 |
|
|---|
| 393 | usb_log_debug("Completed command %s",
|
|---|
| 394 | xhci_trb_str_type(TRB_TYPE(command->_header.trb)));
|
|---|
| 395 |
|
|---|
| 396 | if (code != XHCI_TRBC_SUCCESS) {
|
|---|
| 397 | report_error(code);
|
|---|
| 398 | xhci_dump_trb(&command->_header.trb);
|
|---|
| 399 | }
|
|---|
| 400 |
|
|---|
| 401 | fibril_mutex_unlock(&cr->guard);
|
|---|
| 402 |
|
|---|
| 403 | fibril_mutex_lock(&command->_header.completed_mtx);
|
|---|
| 404 | command->_header.completed = true;
|
|---|
| 405 | fibril_condvar_broadcast(&command->_header.completed_cv);
|
|---|
| 406 | fibril_mutex_unlock(&command->_header.completed_mtx);
|
|---|
| 407 |
|
|---|
| 408 | if (command->_header.async) {
|
|---|
| 409 | /* Free the command and other DS upon completion. */
|
|---|
| 410 | xhci_cmd_fini(command);
|
|---|
| 411 | }
|
|---|
| 412 |
|
|---|
| 413 | return EOK;
|
|---|
| 414 | }
|
|---|
| 415 |
|
|---|
| 416 | /* Command-issuing functions */
|
|---|
| 417 |
|
|---|
| 418 | static int no_op_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
|
|---|
| 419 | {
|
|---|
| 420 | assert(hc);
|
|---|
| 421 |
|
|---|
| 422 | xhci_trb_clean(&cmd->_header.trb);
|
|---|
| 423 |
|
|---|
| 424 | TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_NO_OP_CMD);
|
|---|
| 425 |
|
|---|
| 426 | return enqueue_command(hc, cmd);
|
|---|
| 427 | }
|
|---|
| 428 |
|
|---|
| 429 | static int enable_slot_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
|
|---|
| 430 | {
|
|---|
| 431 | assert(hc);
|
|---|
| 432 |
|
|---|
| 433 | xhci_trb_clean(&cmd->_header.trb);
|
|---|
| 434 |
|
|---|
| 435 | TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_ENABLE_SLOT_CMD);
|
|---|
| 436 | cmd->_header.trb.control |=
|
|---|
| 437 | host2xhci(32, XHCI_REG_RD(hc->xecp, XHCI_EC_SP_SLOT_TYPE) << 16);
|
|---|
| 438 |
|
|---|
| 439 | return enqueue_command(hc, cmd);
|
|---|
| 440 | }
|
|---|
| 441 |
|
|---|
| 442 | static int disable_slot_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
|
|---|
| 443 | {
|
|---|
| 444 | assert(hc);
|
|---|
| 445 | assert(cmd);
|
|---|
| 446 |
|
|---|
| 447 | xhci_trb_clean(&cmd->_header.trb);
|
|---|
| 448 |
|
|---|
| 449 | TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_DISABLE_SLOT_CMD);
|
|---|
| 450 | TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
|
|---|
| 451 |
|
|---|
| 452 | return enqueue_command(hc, cmd);
|
|---|
| 453 | }
|
|---|
| 454 |
|
|---|
| 455 | static int address_device_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
|
|---|
| 456 | {
|
|---|
| 457 | assert(hc);
|
|---|
| 458 | assert(cmd);
|
|---|
| 459 | assert(dma_buffer_is_set(&cmd->input_ctx));
|
|---|
| 460 |
|
|---|
| 461 | /**
|
|---|
| 462 | * TODO: Requirements for this command:
|
|---|
| 463 | * dcbaa[slot_id] is properly sized and initialized
|
|---|
| 464 | * ictx has valids slot context and endpoint 0, all
|
|---|
| 465 | * other should be ignored at this point (see section 4.6.5).
|
|---|
| 466 | */
|
|---|
| 467 |
|
|---|
| 468 | xhci_trb_clean(&cmd->_header.trb);
|
|---|
| 469 |
|
|---|
| 470 | TRB_SET_ICTX(cmd->_header.trb, cmd->input_ctx.phys);
|
|---|
| 471 |
|
|---|
| 472 | /**
|
|---|
| 473 | * Note: According to section 6.4.3.4, we can set the 9th bit
|
|---|
| 474 | * of the control field of the trb (BSR) to 1 and then the xHC
|
|---|
| 475 | * will not issue the SET_ADDRESS request to the USB device.
|
|---|
| 476 | * This can be used to provide compatibility with legacy USB devices
|
|---|
| 477 | * that require their device descriptor to be read before such request.
|
|---|
| 478 | */
|
|---|
| 479 | TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_ADDRESS_DEVICE_CMD);
|
|---|
| 480 | TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
|
|---|
| 481 |
|
|---|
| 482 | return enqueue_command(hc, cmd);
|
|---|
| 483 | }
|
|---|
| 484 |
|
|---|
| 485 | static int configure_endpoint_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
|
|---|
| 486 | {
|
|---|
| 487 | assert(hc);
|
|---|
| 488 | assert(cmd);
|
|---|
| 489 |
|
|---|
| 490 | xhci_trb_clean(&cmd->_header.trb);
|
|---|
| 491 |
|
|---|
| 492 | if (!cmd->deconfigure) {
|
|---|
| 493 | /* If the DC flag is on, input context is not evaluated. */
|
|---|
| 494 | assert(dma_buffer_is_set(&cmd->input_ctx));
|
|---|
| 495 |
|
|---|
| 496 | TRB_SET_ICTX(cmd->_header.trb, cmd->input_ctx.phys);
|
|---|
| 497 | }
|
|---|
| 498 |
|
|---|
| 499 | TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_CONFIGURE_ENDPOINT_CMD);
|
|---|
| 500 | TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
|
|---|
| 501 | TRB_SET_DC(cmd->_header.trb, cmd->deconfigure);
|
|---|
| 502 |
|
|---|
| 503 | return enqueue_command(hc, cmd);
|
|---|
| 504 | }
|
|---|
| 505 |
|
|---|
| 506 | static int evaluate_context_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
|
|---|
| 507 | {
|
|---|
| 508 | assert(hc);
|
|---|
| 509 | assert(cmd);
|
|---|
| 510 | assert(dma_buffer_is_set(&cmd->input_ctx));
|
|---|
| 511 |
|
|---|
| 512 | /**
|
|---|
| 513 | * Note: All Drop Context flags of the input context shall be 0,
|
|---|
| 514 | * all Add Context flags shall be initialize to indicate IDs
|
|---|
| 515 | * of the contexts affected by the command.
|
|---|
| 516 | * Refer to sections 6.2.2.3 and 6.3.3.3 for further info.
|
|---|
| 517 | */
|
|---|
| 518 | xhci_trb_clean(&cmd->_header.trb);
|
|---|
| 519 |
|
|---|
| 520 | TRB_SET_ICTX(cmd->_header.trb, cmd->input_ctx.phys);
|
|---|
| 521 |
|
|---|
| 522 | TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_EVALUATE_CONTEXT_CMD);
|
|---|
| 523 | TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
|
|---|
| 524 |
|
|---|
| 525 | return enqueue_command(hc, cmd);
|
|---|
| 526 | }
|
|---|
| 527 |
|
|---|
| 528 | static int reset_endpoint_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
|
|---|
| 529 | {
|
|---|
| 530 | assert(hc);
|
|---|
| 531 | assert(cmd);
|
|---|
| 532 |
|
|---|
| 533 | xhci_trb_clean(&cmd->_header.trb);
|
|---|
| 534 |
|
|---|
| 535 | TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_RESET_ENDPOINT_CMD);
|
|---|
| 536 | TRB_SET_TSP(cmd->_header.trb, cmd->tsp);
|
|---|
| 537 | TRB_SET_EP(cmd->_header.trb, cmd->endpoint_id);
|
|---|
| 538 | TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
|
|---|
| 539 |
|
|---|
| 540 | return enqueue_command(hc, cmd);
|
|---|
| 541 | }
|
|---|
| 542 |
|
|---|
| 543 | static int stop_endpoint_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
|
|---|
| 544 | {
|
|---|
| 545 | assert(hc);
|
|---|
| 546 | assert(cmd);
|
|---|
| 547 |
|
|---|
| 548 | xhci_trb_clean(&cmd->_header.trb);
|
|---|
| 549 |
|
|---|
| 550 | TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_STOP_ENDPOINT_CMD);
|
|---|
| 551 | TRB_SET_EP(cmd->_header.trb, cmd->endpoint_id);
|
|---|
| 552 | TRB_SET_SUSP(cmd->_header.trb, cmd->susp);
|
|---|
| 553 | TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
|
|---|
| 554 |
|
|---|
| 555 | return enqueue_command(hc, cmd);
|
|---|
| 556 | }
|
|---|
| 557 |
|
|---|
| 558 | static int set_tr_dequeue_pointer_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
|
|---|
| 559 | {
|
|---|
| 560 | assert(hc);
|
|---|
| 561 | assert(cmd);
|
|---|
| 562 |
|
|---|
| 563 | xhci_trb_clean(&cmd->_header.trb);
|
|---|
| 564 |
|
|---|
| 565 | TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_SET_TR_DEQUEUE_POINTER_CMD);
|
|---|
| 566 | TRB_SET_EP(cmd->_header.trb, cmd->endpoint_id);
|
|---|
| 567 | TRB_SET_STREAM(cmd->_header.trb, cmd->stream_id);
|
|---|
| 568 | TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
|
|---|
| 569 | TRB_SET_DEQUEUE_PTR(cmd->_header.trb, cmd->dequeue_ptr);
|
|---|
| 570 |
|
|---|
| 571 | return enqueue_command(hc, cmd);
|
|---|
| 572 | }
|
|---|
| 573 |
|
|---|
| 574 | static int reset_device_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
|
|---|
| 575 | {
|
|---|
| 576 | assert(hc);
|
|---|
| 577 | assert(cmd);
|
|---|
| 578 |
|
|---|
| 579 | xhci_trb_clean(&cmd->_header.trb);
|
|---|
| 580 |
|
|---|
| 581 | TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_RESET_DEVICE_CMD);
|
|---|
| 582 | TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
|
|---|
| 583 |
|
|---|
| 584 | return enqueue_command(hc, cmd);
|
|---|
| 585 | }
|
|---|
| 586 |
|
|---|
| 587 | static int get_port_bandwidth_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
|
|---|
| 588 | {
|
|---|
| 589 | assert(hc);
|
|---|
| 590 | assert(cmd);
|
|---|
| 591 |
|
|---|
| 592 | xhci_trb_clean(&cmd->_header.trb);
|
|---|
| 593 |
|
|---|
| 594 | TRB_SET_ICTX(cmd->_header.trb, cmd->bandwidth_ctx.phys);
|
|---|
| 595 |
|
|---|
| 596 | TRB_SET_TYPE(cmd->_header.trb, XHCI_TRB_TYPE_GET_PORT_BANDWIDTH_CMD);
|
|---|
| 597 | TRB_SET_SLOT(cmd->_header.trb, cmd->slot_id);
|
|---|
| 598 | TRB_SET_DEV_SPEED(cmd->_header.trb, cmd->device_speed);
|
|---|
| 599 |
|
|---|
| 600 | return enqueue_command(hc, cmd);
|
|---|
| 601 | }
|
|---|
| 602 |
|
|---|
| 603 | /* The table of command-issuing functions. */
|
|---|
| 604 |
|
|---|
| 605 | typedef int (*cmd_handler) (xhci_hc_t *hc, xhci_cmd_t *cmd);
|
|---|
| 606 |
|
|---|
| 607 | static cmd_handler cmd_handlers [] = {
|
|---|
| 608 | [XHCI_CMD_ENABLE_SLOT] = enable_slot_cmd,
|
|---|
| 609 | [XHCI_CMD_DISABLE_SLOT] = disable_slot_cmd,
|
|---|
| 610 | [XHCI_CMD_ADDRESS_DEVICE] = address_device_cmd,
|
|---|
| 611 | [XHCI_CMD_CONFIGURE_ENDPOINT] = configure_endpoint_cmd,
|
|---|
| 612 | [XHCI_CMD_EVALUATE_CONTEXT] = evaluate_context_cmd,
|
|---|
| 613 | [XHCI_CMD_RESET_ENDPOINT] = reset_endpoint_cmd,
|
|---|
| 614 | [XHCI_CMD_STOP_ENDPOINT] = stop_endpoint_cmd,
|
|---|
| 615 | [XHCI_CMD_SET_TR_DEQUEUE_POINTER] = set_tr_dequeue_pointer_cmd,
|
|---|
| 616 | [XHCI_CMD_RESET_DEVICE] = reset_device_cmd,
|
|---|
| 617 | [XHCI_CMD_FORCE_EVENT] = NULL,
|
|---|
| 618 | [XHCI_CMD_NEGOTIATE_BANDWIDTH] = NULL,
|
|---|
| 619 | [XHCI_CMD_SET_LATENCY_TOLERANCE_VALUE] = NULL,
|
|---|
| 620 | [XHCI_CMD_GET_PORT_BANDWIDTH] = get_port_bandwidth_cmd,
|
|---|
| 621 | [XHCI_CMD_FORCE_HEADER] = NULL,
|
|---|
| 622 | [XHCI_CMD_NO_OP] = no_op_cmd
|
|---|
| 623 | };
|
|---|
| 624 |
|
|---|
| 625 | /**
|
|---|
| 626 | * Try to abort currently processed command. This is tricky, because
|
|---|
| 627 | * calling fibril is not necessarily the one which issued the blocked command.
|
|---|
| 628 | * Also, the trickiness intensifies by the fact that stopping a CR is denoted by
|
|---|
| 629 | * event, which is again handled in different fibril. but, once we go to sleep
|
|---|
| 630 | * on waiting for that event, another fibril may wake up and try to abort the
|
|---|
| 631 | * blocked command.
|
|---|
| 632 | *
|
|---|
| 633 | * So, we mark the command ring as being restarted, wait for it to stop, and
|
|---|
| 634 | * then start it again. If there was a blocked command, it will be satisfied by
|
|---|
| 635 | * COMMAND_ABORTED event.
|
|---|
| 636 | */
|
|---|
| 637 | static int try_abort_current_command(xhci_hc_t *hc)
|
|---|
| 638 | {
|
|---|
| 639 | xhci_cmd_ring_t *cr = get_cmd_ring(hc);
|
|---|
| 640 |
|
|---|
| 641 | fibril_mutex_lock(&cr->guard);
|
|---|
| 642 |
|
|---|
| 643 | if (cr->state == XHCI_CR_STATE_CLOSED) {
|
|---|
| 644 | fibril_mutex_unlock(&cr->guard);
|
|---|
| 645 | return ENAK;
|
|---|
| 646 | }
|
|---|
| 647 |
|
|---|
| 648 | if (cr->state == XHCI_CR_STATE_CHANGING) {
|
|---|
| 649 | fibril_mutex_unlock(&cr->guard);
|
|---|
| 650 | return EOK;
|
|---|
| 651 | }
|
|---|
| 652 |
|
|---|
| 653 | usb_log_error("Timeout while waiting for command: aborting current command.");
|
|---|
| 654 |
|
|---|
| 655 | cr_set_state(cr, XHCI_CR_STATE_CHANGING);
|
|---|
| 656 |
|
|---|
| 657 | abort_command_ring(hc);
|
|---|
| 658 |
|
|---|
| 659 | fibril_condvar_wait_timeout(&cr->stopped_cv, &cr->guard, XHCI_CR_ABORT_TIMEOUT);
|
|---|
| 660 |
|
|---|
| 661 | if (XHCI_REG_RD(hc->op_regs, XHCI_OP_CRR)) {
|
|---|
| 662 | /* 4.6.1.2, implementation note
|
|---|
| 663 | * Assume there are larger problems with HC and
|
|---|
| 664 | * reset it.
|
|---|
| 665 | */
|
|---|
| 666 | usb_log_error("Command didn't abort.");
|
|---|
| 667 |
|
|---|
| 668 | cr_set_state(cr, XHCI_CR_STATE_CLOSED);
|
|---|
| 669 |
|
|---|
| 670 | // TODO: Reset HC completely.
|
|---|
| 671 | // Don't forget to somehow complete all commands with error.
|
|---|
| 672 |
|
|---|
| 673 | fibril_mutex_unlock(&cr->guard);
|
|---|
| 674 | return ENAK;
|
|---|
| 675 | }
|
|---|
| 676 |
|
|---|
| 677 | cr_set_state(cr, XHCI_CR_STATE_OPEN);
|
|---|
| 678 |
|
|---|
| 679 | fibril_mutex_unlock(&cr->guard);
|
|---|
| 680 |
|
|---|
| 681 | usb_log_error("Command ring stopped. Starting again.");
|
|---|
| 682 | hc_ring_doorbell(hc, 0, 0);
|
|---|
| 683 |
|
|---|
| 684 | return EOK;
|
|---|
| 685 | }
|
|---|
| 686 |
|
|---|
| 687 | /**
|
|---|
| 688 | * Wait, until the command is completed. The completion is triggered by
|
|---|
| 689 | * COMMAND_COMPLETION event. As we do not want to rely on HW completing the
|
|---|
| 690 | * command in timely manner, we timeout. Note that we can't just return an
|
|---|
| 691 | * error after the timeout pass - it may be other command blocking the ring,
|
|---|
| 692 | * and ours can be completed afterwards. Therefore, it is not guaranteed that
|
|---|
| 693 | * this function will return in XHCI_COMMAND_TIMEOUT. It will continue waiting
|
|---|
| 694 | * until COMMAND_COMPLETION event arrives.
|
|---|
| 695 | */
|
|---|
| 696 | static int wait_for_cmd_completion(xhci_hc_t *hc, xhci_cmd_t *cmd)
|
|---|
| 697 | {
|
|---|
| 698 | int rv = EOK;
|
|---|
| 699 |
|
|---|
| 700 | if (fibril_get_id() == hc->event_handler) {
|
|---|
| 701 | usb_log_error("Deadlock detected in waiting for command.");
|
|---|
| 702 | abort();
|
|---|
| 703 | }
|
|---|
| 704 |
|
|---|
| 705 | fibril_mutex_lock(&cmd->_header.completed_mtx);
|
|---|
| 706 | while (!cmd->_header.completed) {
|
|---|
| 707 |
|
|---|
| 708 | rv = fibril_condvar_wait_timeout(&cmd->_header.completed_cv,
|
|---|
| 709 | &cmd->_header.completed_mtx, XHCI_COMMAND_TIMEOUT);
|
|---|
| 710 |
|
|---|
| 711 | /* The waiting timed out. Current command (not necessarily
|
|---|
| 712 | * ours) is probably blocked.
|
|---|
| 713 | */
|
|---|
| 714 | if (!cmd->_header.completed && rv == ETIMEOUT) {
|
|---|
| 715 | fibril_mutex_unlock(&cmd->_header.completed_mtx);
|
|---|
| 716 |
|
|---|
| 717 | rv = try_abort_current_command(hc);
|
|---|
| 718 | if (rv)
|
|---|
| 719 | return rv;
|
|---|
| 720 |
|
|---|
| 721 | fibril_mutex_lock(&cmd->_header.completed_mtx);
|
|---|
| 722 | }
|
|---|
| 723 | }
|
|---|
| 724 | fibril_mutex_unlock(&cmd->_header.completed_mtx);
|
|---|
| 725 |
|
|---|
| 726 | return rv;
|
|---|
| 727 | }
|
|---|
| 728 |
|
|---|
| 729 | /**
|
|---|
| 730 | * Issue command and block the current fibril until it is completed or timeout
|
|---|
| 731 | * expires. Nothing is deallocated. Caller should always execute `xhci_cmd_fini`.
|
|---|
| 732 | */
|
|---|
| 733 | int xhci_cmd_sync(xhci_hc_t *hc, xhci_cmd_t *cmd)
|
|---|
| 734 | {
|
|---|
| 735 | assert(hc);
|
|---|
| 736 | assert(cmd);
|
|---|
| 737 |
|
|---|
| 738 | int err;
|
|---|
| 739 |
|
|---|
| 740 | if (!cmd_handlers[cmd->_header.cmd]) {
|
|---|
| 741 | /* Handler not implemented. */
|
|---|
| 742 | return ENOTSUP;
|
|---|
| 743 | }
|
|---|
| 744 |
|
|---|
| 745 | if ((err = cmd_handlers[cmd->_header.cmd](hc, cmd))) {
|
|---|
| 746 | /* Command could not be issued. */
|
|---|
| 747 | return err;
|
|---|
| 748 | }
|
|---|
| 749 |
|
|---|
| 750 | if ((err = wait_for_cmd_completion(hc, cmd))) {
|
|---|
| 751 | /* Command failed. */
|
|---|
| 752 | return err;
|
|---|
| 753 | }
|
|---|
| 754 |
|
|---|
| 755 | switch (cmd->status) {
|
|---|
| 756 | case XHCI_TRBC_SUCCESS:
|
|---|
| 757 | return EOK;
|
|---|
| 758 | case XHCI_TRBC_USB_TRANSACTION_ERROR:
|
|---|
| 759 | return ESTALL;
|
|---|
| 760 | case XHCI_TRBC_RESOURCE_ERROR:
|
|---|
| 761 | case XHCI_TRBC_BANDWIDTH_ERROR:
|
|---|
| 762 | case XHCI_TRBC_NO_SLOTS_ERROR:
|
|---|
| 763 | return ELIMIT;
|
|---|
| 764 | case XHCI_TRBC_SLOT_NOT_ENABLED_ERROR:
|
|---|
| 765 | return ENOENT;
|
|---|
| 766 | default:
|
|---|
| 767 | return EINVAL;
|
|---|
| 768 | }
|
|---|
| 769 | }
|
|---|
| 770 |
|
|---|
| 771 | /**
|
|---|
| 772 | * Does the same thing as `xhci_cmd_sync` and executes `xhci_cmd_fini`. This
|
|---|
| 773 | * is a useful shorthand for issuing commands without out parameters.
|
|---|
| 774 | */
|
|---|
| 775 | int xhci_cmd_sync_fini(xhci_hc_t *hc, xhci_cmd_t *cmd)
|
|---|
| 776 | {
|
|---|
| 777 | const int err = xhci_cmd_sync(hc, cmd);
|
|---|
| 778 | xhci_cmd_fini(cmd);
|
|---|
| 779 |
|
|---|
| 780 | return err;
|
|---|
| 781 | }
|
|---|
| 782 |
|
|---|
| 783 | /**
|
|---|
| 784 | * Does the same thing as `xhci_cmd_sync_fini` without blocking the current
|
|---|
| 785 | * fibril. The command is copied to stack memory and `fini` is called upon its completion.
|
|---|
| 786 | */
|
|---|
| 787 | int xhci_cmd_async_fini(xhci_hc_t *hc, xhci_cmd_t *stack_cmd)
|
|---|
| 788 | {
|
|---|
| 789 | assert(hc);
|
|---|
| 790 | assert(stack_cmd);
|
|---|
| 791 |
|
|---|
| 792 | /* Save the command for later. */
|
|---|
| 793 | xhci_cmd_t *heap_cmd = (xhci_cmd_t *) malloc(sizeof(xhci_cmd_t));
|
|---|
| 794 | if (!heap_cmd) {
|
|---|
| 795 | return ENOMEM;
|
|---|
| 796 | }
|
|---|
| 797 |
|
|---|
| 798 | /* TODO: Is this good for the mutex and the condvar? */
|
|---|
| 799 | memcpy(heap_cmd, stack_cmd, sizeof(xhci_cmd_t));
|
|---|
| 800 | heap_cmd->_header.async = true;
|
|---|
| 801 |
|
|---|
| 802 | /* Issue the command. */
|
|---|
| 803 | int err;
|
|---|
| 804 |
|
|---|
| 805 | if (!cmd_handlers[heap_cmd->_header.cmd]) {
|
|---|
| 806 | /* Handler not implemented. */
|
|---|
| 807 | err = ENOTSUP;
|
|---|
| 808 | goto err_heap_cmd;
|
|---|
| 809 | }
|
|---|
| 810 |
|
|---|
| 811 | if ((err = cmd_handlers[heap_cmd->_header.cmd](hc, heap_cmd))) {
|
|---|
| 812 | /* Command could not be issued. */
|
|---|
| 813 | goto err_heap_cmd;
|
|---|
| 814 | }
|
|---|
| 815 |
|
|---|
| 816 | return EOK;
|
|---|
| 817 |
|
|---|
| 818 | err_heap_cmd:
|
|---|
| 819 | free(heap_cmd);
|
|---|
| 820 | return err;
|
|---|
| 821 | }
|
|---|
| 822 |
|
|---|
| 823 | /**
|
|---|
| 824 | * @}
|
|---|
| 825 | */
|
|---|