| [c9c0e41] | 1 | /*
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| 2 | * Copyright (c) 2017 Jaroslav Jindrak
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup drvusbxhci
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| 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | * @brief Command sending functions.
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| 34 | */
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| 35 |
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| 36 | #include <errno.h>
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| 37 | #include <str_error.h>
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| 38 | #include <usb/debug.h>
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| 39 | #include <usb/host/utils/malloc32.h>
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| 40 | #include "commands.h"
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| 41 | #include "debug.h"
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| 42 | #include "hc.h"
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| [8db42f7] | 43 | #include "hw_struct/context.h"
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| [c9c0e41] | 44 | #include "hw_struct/trb.h"
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| 45 |
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| [1b78a7c1] | 46 | #define TRB_SET_TCS(trb, tcs) (trb).control |= host2xhci(32, ((tcs &0x1) << 9))
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| 47 | #define TRB_SET_TYPE(trb, type) (trb).control |= host2xhci(32, (type) << 10)
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| 48 | #define TRB_SET_EP(trb, ep) (trb).control |= host2xhci(32, ((ep) & 0x5) << 16)
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| 49 | #define TRB_SET_SUSP(trb, susp) (trb).control |= host2xhci(32, ((susp) & 0x1) << 23)
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| 50 | #define TRB_SET_SLOT(trb, slot) (trb).control |= host2xhci(32, (slot) << 24)
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| 51 |
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| 52 | #define TRB_SET_ICTX(trb, phys) (trb).parameter |= host2xhci(32, phys_addr & (~0xF))
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| 53 |
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| 54 | #define TRB_GET_CODE(trb) XHCI_DWORD_EXTRACT((trb).status, 31, 24)
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| 55 | #define TRB_GET_SLOT(trb) XHCI_DWORD_EXTRACT((trb).control, 31, 24)
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| 56 | #define TRB_GET_PHYS(trb) (XHCI_QWORD_EXTRACT((trb).parameter, 63, 4) << 4)
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| 57 |
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| [110d795] | 58 | int xhci_init_commands(xhci_hc_t *hc)
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| 59 | {
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| 60 | assert(hc);
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| 61 |
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| 62 | list_initialize(&hc->commands);
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| 63 | return EOK;
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| 64 | }
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| 65 |
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| [c46c356] | 66 | void xhci_fini_commands(xhci_hc_t *hc)
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| 67 | {
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| 68 | // Note: Untested.
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| 69 | assert(hc);
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| 70 |
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| 71 | // We assume that the hc is dying/stopping, so we ignore
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| 72 | // the ownership of the commands.
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| 73 | list_foreach(hc->commands, link, xhci_cmd_t, cmd) {
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| 74 | xhci_free_command(cmd);
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| 75 | }
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| 76 | }
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| 77 |
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| [c4d4fa2] | 78 | int xhci_wait_for_command(xhci_cmd_t *cmd, uint32_t timeout)
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| [110d795] | 79 | {
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| 80 | uint32_t time = 0;
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| 81 | while (!cmd->completed) {
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| 82 | async_usleep(1000);
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| 83 | time += 1000;
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| 84 |
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| 85 | if (time > timeout)
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| 86 | return ETIMEOUT;
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| 87 | }
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| 88 |
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| 89 | return EOK;
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| 90 | }
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| 91 |
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| 92 | xhci_cmd_t *xhci_alloc_command(void)
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| 93 | {
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| 94 | xhci_cmd_t *cmd = malloc32(sizeof(xhci_cmd_t));
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| 95 | memset(cmd, 0, sizeof(xhci_cmd_t));
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| 96 |
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| 97 | link_initialize(&cmd->link);
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| 98 |
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| 99 | /**
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| 100 | * Internal functions will set this to false, other are implicit
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| 101 | * owners unless they overwrite this field.
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| 102 | * TODO: Is this wise?
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| 103 | */
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| 104 | cmd->has_owner = true;
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| 105 |
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| 106 | return cmd;
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| 107 | }
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| 108 |
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| 109 | void xhci_free_command(xhci_cmd_t *cmd)
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| 110 | {
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| 111 | if (cmd->ictx)
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| 112 | free32(cmd->ictx);
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| [c4d4fa2] | 113 | if (cmd->trb)
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| 114 | free32(cmd->trb);
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| [110d795] | 115 |
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| 116 | free32(cmd);
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| 117 | }
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| 118 |
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| [2fa43d1] | 119 | static inline xhci_cmd_t *get_command(xhci_hc_t *hc, uint64_t phys)
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| [110d795] | 120 | {
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| 121 | link_t *cmd_link = list_first(&hc->commands);
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| 122 |
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| [2fa43d1] | 123 | while (cmd_link != NULL) {
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| 124 | xhci_cmd_t *cmd = list_get_instance(cmd_link, xhci_cmd_t, link);
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| 125 |
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| 126 | if (addr_to_phys(cmd->trb) == phys)
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| 127 | break;
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| 128 |
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| 129 | cmd_link = list_next(cmd_link, &hc->commands);
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| 130 | }
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| 131 |
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| [110d795] | 132 | if (cmd_link != NULL) {
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| 133 | list_remove(cmd_link);
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| 134 |
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| 135 | return list_get_instance(cmd_link, xhci_cmd_t, link);
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| 136 | }
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| 137 |
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| 138 | return NULL;
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| 139 | }
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| 140 |
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| [481af21e] | 141 | static inline int ring_doorbell(xhci_hc_t *hc, unsigned doorbell, unsigned target)
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| [c9c0e41] | 142 | {
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| [c058a388] | 143 | assert(hc);
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| [c9c0e41] | 144 | uint32_t v = host2xhci(32, target & BIT_RRANGE(uint32_t, 7));
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| 145 | pio_write_32(&hc->db_arry[doorbell], v);
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| 146 | return EOK;
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| 147 | }
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| 148 |
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| [481af21e] | 149 | static inline int enqueue_trb(xhci_hc_t *hc, xhci_trb_t *trb,
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| 150 | unsigned doorbell, unsigned target)
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| 151 | {
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| [c058a388] | 152 | assert(hc);
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| 153 | assert(trb);
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| 154 |
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| [481af21e] | 155 | xhci_trb_ring_enqueue(&hc->command_ring, trb);
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| 156 | ring_doorbell(hc, doorbell, target);
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| 157 |
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| 158 | xhci_dump_trb(trb);
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| 159 | usb_log_debug2("HC(%p): Sent TRB", hc);
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| 160 |
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| 161 | return EOK;
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| 162 | }
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| 163 |
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| [110d795] | 164 | static inline xhci_cmd_t *add_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
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| 165 | {
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| 166 | if (cmd == NULL) {
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| 167 | cmd = xhci_alloc_command();
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| 168 | if (cmd == NULL)
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| 169 | return cmd;
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| 170 |
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| 171 | cmd->has_owner = false;
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| 172 | }
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| 173 |
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| 174 | list_append(&cmd->link, &hc->commands);
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| 175 | cmd->trb = hc->command_ring.enqueue_trb;
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| 176 |
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| 177 | return cmd;
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| 178 | }
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| 179 |
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| [3dc519f] | 180 | void xhci_stop_command_ring(xhci_hc_t *hc)
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| 181 | {
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| 182 | assert(hc);
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| 183 |
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| 184 | XHCI_REG_SET(hc->op_regs, XHCI_OP_CS, 1);
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| 185 |
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| 186 | /**
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| 187 | * Note: There is a bug in qemu that checks CS only when CRCR_HI
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| 188 | * is written, this (and the read/write in abort) ensures
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| 189 | * the command rings stops.
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| 190 | */
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| 191 | XHCI_REG_WR(hc->op_regs, XHCI_OP_CRCR_HI, XHCI_REG_RD(hc->op_regs, XHCI_OP_CRCR_HI));
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| 192 | }
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| 193 |
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| 194 | void xhci_abort_command_ring(xhci_hc_t *hc)
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| 195 | {
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| 196 | assert(hc);
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| 197 |
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| 198 | XHCI_REG_WR(hc->op_regs, XHCI_OP_CA, 1);
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| 199 | XHCI_REG_WR(hc->op_regs, XHCI_OP_CRCR_HI, XHCI_REG_RD(hc->op_regs, XHCI_OP_CRCR_HI));
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| 200 | }
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| 201 |
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| 202 | void xhci_start_command_ring(xhci_hc_t *hc)
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| 203 | {
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| 204 | assert(hc);
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| 205 |
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| 206 | XHCI_REG_WR(hc->op_regs, XHCI_OP_CRR, 1);
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| 207 | ring_doorbell(hc, 0, 0);
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| 208 | }
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| 209 |
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| [4fa5342] | 210 | static const char *trb_codes [] = {
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| 211 | #define TRBC(t) [XHCI_TRBC_##t] = #t
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| 212 | TRBC(INVALID),
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| 213 | TRBC(SUCCESS),
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| 214 | TRBC(DATA_BUFFER_ERROR),
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| 215 | TRBC(BABBLE_DETECTED_ERROR),
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| 216 | TRBC(USB_TRANSACTION_ERROR),
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| 217 | TRBC(TRB_ERROR),
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| 218 | TRBC(STALL_ERROR),
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| 219 | TRBC(RESOURCE_ERROR),
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| 220 | TRBC(BANDWIDTH_ERROR),
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| 221 | TRBC(NO_SLOTS_ERROR),
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| 222 | TRBC(INVALID_STREAM_ERROR),
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| 223 | TRBC(SLOT_NOT_ENABLED_ERROR),
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| 224 | TRBC(EP_NOT_ENABLED_ERROR),
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| 225 | TRBC(SHORT_PACKET),
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| 226 | TRBC(RING_UNDERRUN),
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| 227 | TRBC(RING_OVERRUN),
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| 228 | TRBC(VF_EVENT_RING_FULL),
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| 229 | TRBC(PARAMETER_ERROR),
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| 230 | TRBC(BANDWIDTH_OVERRUN_ERROR),
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| 231 | TRBC(CONTEXT_STATE_ERROR),
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| 232 | TRBC(NO_PING_RESPONSE_ERROR),
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| 233 | TRBC(EVENT_RING_FULL_ERROR),
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| 234 | TRBC(INCOMPATIBLE_DEVICE_ERROR),
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| 235 | TRBC(MISSED_SERVICE_ERROR),
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| 236 | TRBC(COMMAND_RING_STOPPED),
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| 237 | TRBC(COMMAND_ABORTED),
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| 238 | TRBC(STOPPED),
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| 239 | TRBC(STOPPED_LENGTH_INVALID),
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| 240 | TRBC(STOPPED_SHORT_PACKET),
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| 241 | TRBC(MAX_EXIT_LATENCY_TOO_LARGE_ERROR),
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| 242 | [30] = "<reserved>",
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| 243 | TRBC(ISOCH_BUFFER_OVERRUN),
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| 244 | TRBC(EVENT_LOST_ERROR),
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| 245 | TRBC(UNDEFINED_ERROR),
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| 246 | TRBC(INVALID_STREAM_ID_ERROR),
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| 247 | TRBC(SECONDARY_BANDWIDTH_ERROR),
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| 248 | TRBC(SPLIT_TRANSACTION_ERROR),
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| 249 | [XHCI_TRBC_MAX] = NULL
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| 250 | #undef TRBC
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| 251 | };
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| 252 |
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| 253 | static void report_error(int code)
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| 254 | {
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| 255 | if (code < XHCI_TRBC_MAX && trb_codes[code] != NULL)
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| 256 | usb_log_error("Command resulted in error: %s.", trb_codes[code]);
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| 257 | else
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| 258 | usb_log_error("Command resulted in reserved or vendor specific error.");
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| 259 | }
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| 260 |
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| [110d795] | 261 | int xhci_send_no_op_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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| [c9c0e41] | 262 | {
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| [c058a388] | 263 | assert(hc);
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| 264 |
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| [c9c0e41] | 265 | xhci_trb_t trb;
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| 266 | memset(&trb, 0, sizeof(trb));
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| 267 |
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| [1b78a7c1] | 268 | TRB_SET_TYPE(trb, XHCI_TRB_TYPE_NO_OP_CMD);
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| [c9c0e41] | 269 |
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| [110d795] | 270 | cmd = add_cmd(hc, cmd);
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| 271 |
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| [481af21e] | 272 | return enqueue_trb(hc, &trb, 0, 0);
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| [c9c0e41] | 273 | }
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| 274 |
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| [110d795] | 275 | int xhci_send_enable_slot_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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| [c9c0e41] | 276 | {
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| [c058a388] | 277 | assert(hc);
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| 278 |
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| [c9c0e41] | 279 | xhci_trb_t trb;
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| 280 | memset(&trb, 0, sizeof(trb));
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| 281 |
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| [1b78a7c1] | 282 | TRB_SET_TYPE(trb, XHCI_TRB_TYPE_ENABLE_SLOT_CMD);
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| [c9c0e41] | 283 | trb.control |= host2xhci(32, XHCI_REG_RD(hc->xecp, XHCI_EC_SP_SLOT_TYPE) << 16);
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| 284 |
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| [110d795] | 285 | cmd = add_cmd(hc, cmd);
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| 286 |
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| [5ac5eb1] | 287 | return enqueue_trb(hc, &trb, 0, 0);
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| 288 | }
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| 289 |
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| [110d795] | 290 | int xhci_send_disable_slot_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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| [5ac5eb1] | 291 | {
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| [c058a388] | 292 | assert(hc);
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| [110d795] | 293 | assert(cmd);
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| [c058a388] | 294 |
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| [5ac5eb1] | 295 | xhci_trb_t trb;
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| 296 | memset(&trb, 0, sizeof(trb));
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| 297 |
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| [1b78a7c1] | 298 | TRB_SET_TYPE(trb, XHCI_TRB_TYPE_DISABLE_SLOT_CMD);
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| 299 | TRB_SET_SLOT(trb, cmd->slot_id);
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| [110d795] | 300 |
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| 301 | add_cmd(hc, cmd);
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| [c9c0e41] | 302 |
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| [481af21e] | 303 | return enqueue_trb(hc, &trb, 0, 0);
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| [c9c0e41] | 304 | }
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| 305 |
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| [110d795] | 306 | int xhci_send_address_device_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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| [8db42f7] | 307 | {
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| [c058a388] | 308 | assert(hc);
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| [110d795] | 309 | assert(cmd);
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| 310 | assert(cmd->ictx);
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| [c058a388] | 311 |
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| [8db42f7] | 312 | /**
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| 313 | * TODO: Requirements for this command:
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| 314 | * dcbaa[slot_id] is properly sized and initialized
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| 315 | * ictx has valids slot context and endpoint 0, all
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| 316 | * other should be ignored at this point (see section 4.6.5).
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| 317 | */
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| 318 | xhci_trb_t trb;
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| 319 | memset(&trb, 0, sizeof(trb));
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| 320 |
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| [110d795] | 321 | uint64_t phys_addr = (uint64_t) addr_to_phys(cmd->ictx);
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| [1b78a7c1] | 322 | TRB_SET_ICTX(trb, phys_addr);
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| [8db42f7] | 323 |
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| 324 | /**
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| 325 | * Note: According to section 6.4.3.4, we can set the 9th bit
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| 326 | * of the control field of the trb (BSR) to 1 and then the xHC
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| 327 | * will not issue the SET_ADDRESS request to the USB device.
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| 328 | * This can be used to provide compatibility with legacy USB devices
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| 329 | * that require their device descriptor to be read before such request.
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| 330 | */
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| [1b78a7c1] | 331 | TRB_SET_TYPE(trb, XHCI_TRB_TYPE_ADDRESS_DEVICE_CMD);
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| 332 | TRB_SET_SLOT(trb, cmd->slot_id);
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| [110d795] | 333 |
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| 334 | cmd = add_cmd(hc, cmd);
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| [8db42f7] | 335 |
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| 336 | return enqueue_trb(hc, &trb, 0, 0);
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| 337 | }
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| 338 |
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| [110d795] | 339 | int xhci_send_configure_endpoint_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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| [665bf3c] | 340 | {
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| [c058a388] | 341 | assert(hc);
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| [110d795] | 342 | assert(cmd);
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| 343 | assert(cmd->ictx);
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| [c058a388] | 344 |
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| [665bf3c] | 345 | xhci_trb_t trb;
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| 346 | memset(&trb, 0, sizeof(trb));
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| 347 |
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| [110d795] | 348 | uint64_t phys_addr = (uint64_t) addr_to_phys(cmd->ictx);
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| [1b78a7c1] | 349 | TRB_SET_ICTX(trb, phys_addr);
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| [665bf3c] | 350 |
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| [1b78a7c1] | 351 | TRB_SET_TYPE(trb, XHCI_TRB_TYPE_CONFIGURE_ENDPOINT_CMD);
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| 352 | TRB_SET_SLOT(trb, cmd->slot_id);
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| [110d795] | 353 |
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| 354 | cmd = add_cmd(hc, cmd);
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| [665bf3c] | 355 |
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| 356 | return enqueue_trb(hc, &trb, 0, 0);
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| 357 | }
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| 358 |
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| [110d795] | 359 | int xhci_send_evaluate_context_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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| [c9ce62ae] | 360 | {
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| [c058a388] | 361 | assert(hc);
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| [110d795] | 362 | assert(cmd);
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| 363 | assert(cmd->ictx);
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| [c058a388] | 364 |
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| [c9ce62ae] | 365 | /**
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| 366 | * Note: All Drop Context flags of the input context shall be 0,
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| 367 | * all Add Context flags shall be initialize to indicate IDs
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| 368 | * of the contexts affected by the command.
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| 369 | * Refer to sections 6.2.2.3 and 6.3.3.3 for further info.
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| 370 | */
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| 371 | xhci_trb_t trb;
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| 372 | memset(&trb, 0, sizeof(trb));
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| 373 |
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| [110d795] | 374 | uint64_t phys_addr = (uint64_t) addr_to_phys(cmd->ictx);
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| [1b78a7c1] | 375 | TRB_SET_ICTX(trb, phys_addr);
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| [c9ce62ae] | 376 |
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| [1b78a7c1] | 377 | TRB_SET_TYPE(trb, XHCI_TRB_TYPE_EVALUATE_CONTEXT_CMD);
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| 378 | TRB_SET_SLOT(trb, cmd->slot_id);
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| [110d795] | 379 |
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| 380 | cmd = add_cmd(hc, cmd);
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| [c9ce62ae] | 381 |
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| 382 | return enqueue_trb(hc, &trb, 0, 0);
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| 383 | }
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| 384 |
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| [110d795] | 385 | int xhci_send_reset_endpoint_command(xhci_hc_t *hc, xhci_cmd_t *cmd, uint32_t ep_id, uint8_t tcs)
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| [05aeee0e] | 386 | {
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| [c058a388] | 387 | assert(hc);
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| [110d795] | 388 | assert(cmd);
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| [c058a388] | 389 |
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| [05aeee0e] | 390 | /**
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| 391 | * Note: TCS can have values 0 or 1. If it is set to 0, see sectuon 4.5.8 for
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| 392 | * information about this flag.
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| 393 | */
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| 394 | xhci_trb_t trb;
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| 395 | memset(&trb, 0, sizeof(trb));
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| 396 |
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| [1b78a7c1] | 397 | TRB_SET_TYPE(trb, XHCI_TRB_TYPE_RESET_ENDPOINT_CMD);
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| 398 | TRB_SET_TCS(trb, tcs);
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| 399 | TRB_SET_EP(trb, ep_id);
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| 400 | TRB_SET_SLOT(trb, cmd->slot_id);
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| [05aeee0e] | 401 |
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| 402 | return enqueue_trb(hc, &trb, 0, 0);
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| 403 | }
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|---|
| 404 |
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| [110d795] | 405 | int xhci_send_stop_endpoint_command(xhci_hc_t *hc, xhci_cmd_t *cmd, uint32_t ep_id, uint8_t susp)
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| [05aeee0e] | 406 | {
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| [c058a388] | 407 | assert(hc);
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| [110d795] | 408 | assert(cmd);
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| [c058a388] | 409 |
|
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| [05aeee0e] | 410 | xhci_trb_t trb;
|
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| 411 | memset(&trb, 0, sizeof(trb));
|
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| 412 |
|
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| [1b78a7c1] | 413 | TRB_SET_TYPE(trb, XHCI_TRB_TYPE_STOP_ENDPOINT_CMD);
|
|---|
| 414 | TRB_SET_EP(trb, ep_id);
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| 415 | TRB_SET_SUSP(trb, susp);
|
|---|
| 416 | TRB_SET_SLOT(trb, cmd->slot_id);
|
|---|
| [110d795] | 417 |
|
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| 418 | cmd = add_cmd(hc, cmd);
|
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| [05aeee0e] | 419 |
|
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| 420 | return enqueue_trb(hc, &trb, 0, 0);
|
|---|
| [c058a388] | 421 | }
|
|---|
| [05aeee0e] | 422 |
|
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| [110d795] | 423 | int xhci_send_reset_device_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
|
|---|
| [c058a388] | 424 | {
|
|---|
| 425 | assert(hc);
|
|---|
| [110d795] | 426 | assert(cmd);
|
|---|
| [c058a388] | 427 |
|
|---|
| 428 | xhci_trb_t trb;
|
|---|
| 429 | memset(&trb, 0, sizeof(trb));
|
|---|
| 430 |
|
|---|
| [1b78a7c1] | 431 | TRB_SET_TYPE(trb, XHCI_TRB_TYPE_RESET_DEVICE_CMD);
|
|---|
| 432 | TRB_SET_SLOT(trb, cmd->slot_id);
|
|---|
| [c058a388] | 433 |
|
|---|
| 434 | return enqueue_trb(hc, &trb, 0, 0);
|
|---|
| [05aeee0e] | 435 | }
|
|---|
| 436 |
|
|---|
| [f9e7fe8] | 437 | int xhci_handle_command_completion(xhci_hc_t *hc, xhci_trb_t *trb)
|
|---|
| 438 | {
|
|---|
| [110d795] | 439 | // TODO: Update dequeue ptrs.
|
|---|
| [c058a388] | 440 | assert(hc);
|
|---|
| 441 | assert(trb);
|
|---|
| 442 |
|
|---|
| [5ac5eb1] | 443 | usb_log_debug("HC(%p) Command completed.", hc);
|
|---|
| [f9e7fe8] | 444 |
|
|---|
| [5ac5eb1] | 445 | int code;
|
|---|
| [2fa43d1] | 446 | uint64_t phys;
|
|---|
| [110d795] | 447 | xhci_cmd_t *command;
|
|---|
| 448 | xhci_trb_t *command_trb;
|
|---|
| [f711f06] | 449 |
|
|---|
| [1b78a7c1] | 450 | code = TRB_GET_CODE(*trb);
|
|---|
| 451 | phys = TRB_GET_PHYS(*trb);;
|
|---|
| [2fa43d1] | 452 | command = get_command(hc, phys);
|
|---|
| 453 | if (command == NULL) {
|
|---|
| 454 | // TODO: STOP & ABORT may not have command structs in the list!
|
|---|
| 455 | usb_log_error("No command struct for this completion event");
|
|---|
| 456 |
|
|---|
| 457 | if (code != XHCI_TRBC_SUCCESS)
|
|---|
| 458 | report_error(code);
|
|---|
| 459 |
|
|---|
| 460 | return EOK;
|
|---|
| 461 | }
|
|---|
| [110d795] | 462 |
|
|---|
| 463 | command_trb = command->trb;
|
|---|
| 464 | command->status = code;
|
|---|
| [1b78a7c1] | 465 | command->slot_id = TRB_GET_SLOT(*trb);
|
|---|
| [110d795] | 466 |
|
|---|
| [eff60ca] | 467 | usb_log_debug2("Completed command trb: %s", xhci_trb_str_type(TRB_TYPE(*command_trb)));
|
|---|
| [110d795] | 468 | if (TRB_TYPE(*command_trb) != XHCI_TRB_TYPE_NO_OP_CMD) {
|
|---|
| [665bf3c] | 469 | if (code != XHCI_TRBC_SUCCESS) {
|
|---|
| [4fa5342] | 470 | report_error(code);
|
|---|
| [110d795] | 471 | xhci_dump_trb(command_trb);
|
|---|
| [665bf3c] | 472 | }
|
|---|
| 473 | }
|
|---|
| [c362127] | 474 |
|
|---|
| [110d795] | 475 | switch (TRB_TYPE(*command_trb)) {
|
|---|
| [c362127] | 476 | case XHCI_TRB_TYPE_NO_OP_CMD:
|
|---|
| [665bf3c] | 477 | assert(code = XHCI_TRBC_TRB_ERROR);
|
|---|
| [110d795] | 478 | break;
|
|---|
| [c362127] | 479 | case XHCI_TRB_TYPE_ENABLE_SLOT_CMD:
|
|---|
| [110d795] | 480 | break;
|
|---|
| [5ac5eb1] | 481 | case XHCI_TRB_TYPE_DISABLE_SLOT_CMD:
|
|---|
| [110d795] | 482 | break;
|
|---|
| [8db42f7] | 483 | case XHCI_TRB_TYPE_ADDRESS_DEVICE_CMD:
|
|---|
| [110d795] | 484 | break;
|
|---|
| [665bf3c] | 485 | case XHCI_TRB_TYPE_CONFIGURE_ENDPOINT_CMD:
|
|---|
| [110d795] | 486 | break;
|
|---|
| [c9ce62ae] | 487 | case XHCI_TRB_TYPE_EVALUATE_CONTEXT_CMD:
|
|---|
| [110d795] | 488 | break;
|
|---|
| [05aeee0e] | 489 | case XHCI_TRB_TYPE_RESET_ENDPOINT_CMD:
|
|---|
| [110d795] | 490 | break;
|
|---|
| [05aeee0e] | 491 | case XHCI_TRB_TYPE_STOP_ENDPOINT_CMD:
|
|---|
| 492 | // Note: If the endpoint was in the middle of a transfer, then the xHC
|
|---|
| 493 | // will add a Transfer TRB before the Event TRB, research that and
|
|---|
| 494 | // handle it appropriately!
|
|---|
| [110d795] | 495 | break;
|
|---|
| [c058a388] | 496 | case XHCI_TRB_TYPE_RESET_DEVICE_CMD:
|
|---|
| [110d795] | 497 | break;
|
|---|
| [c362127] | 498 | default:
|
|---|
| [eff60ca] | 499 | usb_log_debug2("Unsupported command trb: %s", xhci_trb_str_type(TRB_TYPE(*command_trb)));
|
|---|
| [110d795] | 500 |
|
|---|
| 501 | command->completed = true;
|
|---|
| [665bf3c] | 502 | return ENAK;
|
|---|
| [f711f06] | 503 | }
|
|---|
| [110d795] | 504 |
|
|---|
| 505 | command->completed = true;
|
|---|
| 506 |
|
|---|
| [c4d4fa2] | 507 | if (!command->has_owner) {
|
|---|
| [eff60ca] | 508 | usb_log_debug2("Command has no owner, deallocating.");
|
|---|
| [60f7c590] | 509 | command->trb = NULL; // It was statically allocated.
|
|---|
| [110d795] | 510 | xhci_free_command(command);
|
|---|
| [c4d4fa2] | 511 | } else {
|
|---|
| [eff60ca] | 512 | usb_log_debug2("Command has owner, don't forget to deallocate!");
|
|---|
| [c4d4fa2] | 513 | /* Copy the trb for later use so that we can free space on the cmd ring. */
|
|---|
| 514 | command->trb = malloc32(sizeof(xhci_trb_t));
|
|---|
| 515 | xhci_trb_copy(command->trb, command_trb);
|
|---|
| 516 | }
|
|---|
| [110d795] | 517 |
|
|---|
| 518 | return EOK;
|
|---|
| [f9e7fe8] | 519 | }
|
|---|
| [c9c0e41] | 520 |
|
|---|
| 521 |
|
|---|
| 522 | /**
|
|---|
| 523 | * @}
|
|---|
| 524 | */
|
|---|