[c9c0e41] | 1 | /*
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| 2 | * Copyright (c) 2017 Jaroslav Jindrak
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup drvusbxhci
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| 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | * @brief Command sending functions.
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| 34 | */
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| 35 |
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| 36 | #include <errno.h>
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| 37 | #include <str_error.h>
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| 38 | #include <usb/debug.h>
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| 39 | #include <usb/host/utils/malloc32.h>
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| 40 | #include "commands.h"
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| 41 | #include "debug.h"
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| 42 | #include "hc.h"
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[8db42f7] | 43 | #include "hw_struct/context.h"
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[c9c0e41] | 44 | #include "hw_struct/trb.h"
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| 45 |
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[1b78a7c1] | 46 | #define TRB_SET_TCS(trb, tcs) (trb).control |= host2xhci(32, ((tcs &0x1) << 9))
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| 47 | #define TRB_SET_TYPE(trb, type) (trb).control |= host2xhci(32, (type) << 10)
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| 48 | #define TRB_SET_EP(trb, ep) (trb).control |= host2xhci(32, ((ep) & 0x5) << 16)
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[0cabd10] | 49 | #define TRB_SET_STREAM(trb, st) (trb).control |= host2xhci(32, ((st) & 0xFFFF) << 16)
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[1b78a7c1] | 50 | #define TRB_SET_SUSP(trb, susp) (trb).control |= host2xhci(32, ((susp) & 0x1) << 23)
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| 51 | #define TRB_SET_SLOT(trb, slot) (trb).control |= host2xhci(32, (slot) << 24)
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| 52 |
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[0cabd10] | 53 | /**
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| 54 | * TODO: Not sure about SCT and DCS (see section 6.4.3.9).
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| 55 | */
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| 56 | #define TRB_SET_DEQUEUE_PTR(trb, dptr) (trb).parameter |= host2xhci(64, (dptr))
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[1b78a7c1] | 57 | #define TRB_SET_ICTX(trb, phys) (trb).parameter |= host2xhci(32, phys_addr & (~0xF))
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| 58 |
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| 59 | #define TRB_GET_CODE(trb) XHCI_DWORD_EXTRACT((trb).status, 31, 24)
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| 60 | #define TRB_GET_SLOT(trb) XHCI_DWORD_EXTRACT((trb).control, 31, 24)
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| 61 | #define TRB_GET_PHYS(trb) (XHCI_QWORD_EXTRACT((trb).parameter, 63, 4) << 4)
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| 62 |
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[110d795] | 63 | int xhci_init_commands(xhci_hc_t *hc)
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| 64 | {
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| 65 | assert(hc);
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| 66 |
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| 67 | list_initialize(&hc->commands);
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| 68 | return EOK;
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| 69 | }
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| 70 |
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[c46c356] | 71 | void xhci_fini_commands(xhci_hc_t *hc)
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| 72 | {
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| 73 | // Note: Untested.
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| 74 | assert(hc);
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| 75 |
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| 76 | // We assume that the hc is dying/stopping, so we ignore
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| 77 | // the ownership of the commands.
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| 78 | list_foreach(hc->commands, link, xhci_cmd_t, cmd) {
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| 79 | xhci_free_command(cmd);
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| 80 | }
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| 81 | }
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| 82 |
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[c4d4fa2] | 83 | int xhci_wait_for_command(xhci_cmd_t *cmd, uint32_t timeout)
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[110d795] | 84 | {
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| 85 | uint32_t time = 0;
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| 86 | while (!cmd->completed) {
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| 87 | async_usleep(1000);
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| 88 | time += 1000;
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| 89 |
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| 90 | if (time > timeout)
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| 91 | return ETIMEOUT;
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| 92 | }
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| 93 |
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| 94 | return EOK;
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| 95 | }
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| 96 |
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| 97 | xhci_cmd_t *xhci_alloc_command(void)
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| 98 | {
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| 99 | xhci_cmd_t *cmd = malloc32(sizeof(xhci_cmd_t));
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| 100 | memset(cmd, 0, sizeof(xhci_cmd_t));
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| 101 |
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| 102 | link_initialize(&cmd->link);
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| 103 |
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| 104 | /**
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| 105 | * Internal functions will set this to false, other are implicit
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| 106 | * owners unless they overwrite this field.
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| 107 | * TODO: Is this wise?
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| 108 | */
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| 109 | cmd->has_owner = true;
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| 110 |
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| 111 | return cmd;
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| 112 | }
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| 113 |
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| 114 | void xhci_free_command(xhci_cmd_t *cmd)
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| 115 | {
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| 116 | if (cmd->ictx)
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| 117 | free32(cmd->ictx);
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[c4d4fa2] | 118 | if (cmd->trb)
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| 119 | free32(cmd->trb);
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[110d795] | 120 |
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| 121 | free32(cmd);
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| 122 | }
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| 123 |
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[2fa43d1] | 124 | static inline xhci_cmd_t *get_command(xhci_hc_t *hc, uint64_t phys)
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[110d795] | 125 | {
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| 126 | link_t *cmd_link = list_first(&hc->commands);
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| 127 |
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[2fa43d1] | 128 | while (cmd_link != NULL) {
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| 129 | xhci_cmd_t *cmd = list_get_instance(cmd_link, xhci_cmd_t, link);
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| 130 |
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| 131 | if (addr_to_phys(cmd->trb) == phys)
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| 132 | break;
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| 133 |
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| 134 | cmd_link = list_next(cmd_link, &hc->commands);
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| 135 | }
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| 136 |
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[110d795] | 137 | if (cmd_link != NULL) {
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| 138 | list_remove(cmd_link);
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[9f5b613] | 139 |
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[110d795] | 140 | return list_get_instance(cmd_link, xhci_cmd_t, link);
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| 141 | }
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| 142 |
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| 143 | return NULL;
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| 144 | }
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| 145 |
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[481af21e] | 146 | static inline int ring_doorbell(xhci_hc_t *hc, unsigned doorbell, unsigned target)
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[c9c0e41] | 147 | {
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[c058a388] | 148 | assert(hc);
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[c9c0e41] | 149 | uint32_t v = host2xhci(32, target & BIT_RRANGE(uint32_t, 7));
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| 150 | pio_write_32(&hc->db_arry[doorbell], v);
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| 151 | return EOK;
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| 152 | }
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| 153 |
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[481af21e] | 154 | static inline int enqueue_trb(xhci_hc_t *hc, xhci_trb_t *trb,
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| 155 | unsigned doorbell, unsigned target)
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| 156 | {
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[c058a388] | 157 | assert(hc);
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| 158 | assert(trb);
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| 159 |
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[481af21e] | 160 | xhci_trb_ring_enqueue(&hc->command_ring, trb);
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| 161 | ring_doorbell(hc, doorbell, target);
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| 162 |
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| 163 | xhci_dump_trb(trb);
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| 164 | usb_log_debug2("HC(%p): Sent TRB", hc);
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| 165 |
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| 166 | return EOK;
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| 167 | }
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| 168 |
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[c9bec1c] | 169 | static inline int add_cmd(xhci_hc_t *hc, xhci_cmd_t *cmd)
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[9f5b613] | 170 | {
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[110d795] | 171 | if (cmd == NULL) {
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| 172 | cmd = xhci_alloc_command();
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| 173 | if (cmd == NULL)
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[c9bec1c] | 174 | return ENOMEM;
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[110d795] | 175 |
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| 176 | cmd->has_owner = false;
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| 177 | }
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| 178 |
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| 179 | list_append(&cmd->link, &hc->commands);
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| 180 | cmd->trb = hc->command_ring.enqueue_trb;
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| 181 |
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[c9bec1c] | 182 | return EOK;
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[110d795] | 183 | }
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| 184 |
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[3dc519f] | 185 | void xhci_stop_command_ring(xhci_hc_t *hc)
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| 186 | {
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| 187 | assert(hc);
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| 188 |
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| 189 | XHCI_REG_SET(hc->op_regs, XHCI_OP_CS, 1);
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| 190 |
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| 191 | /**
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| 192 | * Note: There is a bug in qemu that checks CS only when CRCR_HI
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| 193 | * is written, this (and the read/write in abort) ensures
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| 194 | * the command rings stops.
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| 195 | */
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| 196 | XHCI_REG_WR(hc->op_regs, XHCI_OP_CRCR_HI, XHCI_REG_RD(hc->op_regs, XHCI_OP_CRCR_HI));
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| 197 | }
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| 198 |
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| 199 | void xhci_abort_command_ring(xhci_hc_t *hc)
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| 200 | {
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| 201 | assert(hc);
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| 202 |
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| 203 | XHCI_REG_WR(hc->op_regs, XHCI_OP_CA, 1);
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| 204 | XHCI_REG_WR(hc->op_regs, XHCI_OP_CRCR_HI, XHCI_REG_RD(hc->op_regs, XHCI_OP_CRCR_HI));
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| 205 | }
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| 206 |
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| 207 | void xhci_start_command_ring(xhci_hc_t *hc)
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| 208 | {
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| 209 | assert(hc);
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| 210 |
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| 211 | XHCI_REG_WR(hc->op_regs, XHCI_OP_CRR, 1);
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| 212 | ring_doorbell(hc, 0, 0);
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| 213 | }
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| 214 |
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[4fa5342] | 215 | static const char *trb_codes [] = {
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| 216 | #define TRBC(t) [XHCI_TRBC_##t] = #t
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| 217 | TRBC(INVALID),
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| 218 | TRBC(SUCCESS),
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| 219 | TRBC(DATA_BUFFER_ERROR),
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| 220 | TRBC(BABBLE_DETECTED_ERROR),
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| 221 | TRBC(USB_TRANSACTION_ERROR),
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| 222 | TRBC(TRB_ERROR),
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| 223 | TRBC(STALL_ERROR),
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| 224 | TRBC(RESOURCE_ERROR),
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| 225 | TRBC(BANDWIDTH_ERROR),
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| 226 | TRBC(NO_SLOTS_ERROR),
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| 227 | TRBC(INVALID_STREAM_ERROR),
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| 228 | TRBC(SLOT_NOT_ENABLED_ERROR),
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| 229 | TRBC(EP_NOT_ENABLED_ERROR),
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| 230 | TRBC(SHORT_PACKET),
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| 231 | TRBC(RING_UNDERRUN),
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| 232 | TRBC(RING_OVERRUN),
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| 233 | TRBC(VF_EVENT_RING_FULL),
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| 234 | TRBC(PARAMETER_ERROR),
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| 235 | TRBC(BANDWIDTH_OVERRUN_ERROR),
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| 236 | TRBC(CONTEXT_STATE_ERROR),
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| 237 | TRBC(NO_PING_RESPONSE_ERROR),
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| 238 | TRBC(EVENT_RING_FULL_ERROR),
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| 239 | TRBC(INCOMPATIBLE_DEVICE_ERROR),
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| 240 | TRBC(MISSED_SERVICE_ERROR),
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| 241 | TRBC(COMMAND_RING_STOPPED),
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| 242 | TRBC(COMMAND_ABORTED),
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| 243 | TRBC(STOPPED),
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| 244 | TRBC(STOPPED_LENGTH_INVALID),
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| 245 | TRBC(STOPPED_SHORT_PACKET),
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| 246 | TRBC(MAX_EXIT_LATENCY_TOO_LARGE_ERROR),
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| 247 | [30] = "<reserved>",
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| 248 | TRBC(ISOCH_BUFFER_OVERRUN),
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| 249 | TRBC(EVENT_LOST_ERROR),
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| 250 | TRBC(UNDEFINED_ERROR),
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| 251 | TRBC(INVALID_STREAM_ID_ERROR),
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| 252 | TRBC(SECONDARY_BANDWIDTH_ERROR),
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| 253 | TRBC(SPLIT_TRANSACTION_ERROR),
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| 254 | [XHCI_TRBC_MAX] = NULL
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| 255 | #undef TRBC
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| 256 | };
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| 257 |
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| 258 | static void report_error(int code)
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| 259 | {
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| 260 | if (code < XHCI_TRBC_MAX && trb_codes[code] != NULL)
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| 261 | usb_log_error("Command resulted in error: %s.", trb_codes[code]);
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| 262 | else
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| 263 | usb_log_error("Command resulted in reserved or vendor specific error.");
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| 264 | }
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| 265 |
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[110d795] | 266 | int xhci_send_no_op_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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[c9c0e41] | 267 | {
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[c058a388] | 268 | assert(hc);
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| 269 |
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[c9c0e41] | 270 | xhci_trb_t trb;
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| 271 | memset(&trb, 0, sizeof(trb));
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| 272 |
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[1b78a7c1] | 273 | TRB_SET_TYPE(trb, XHCI_TRB_TYPE_NO_OP_CMD);
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[c9c0e41] | 274 |
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[c9bec1c] | 275 | add_cmd(hc, cmd);
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[110d795] | 276 |
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[481af21e] | 277 | return enqueue_trb(hc, &trb, 0, 0);
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[c9c0e41] | 278 | }
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| 279 |
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[110d795] | 280 | int xhci_send_enable_slot_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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[c9c0e41] | 281 | {
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[c058a388] | 282 | assert(hc);
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| 283 |
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[c9c0e41] | 284 | xhci_trb_t trb;
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| 285 | memset(&trb, 0, sizeof(trb));
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| 286 |
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[1b78a7c1] | 287 | TRB_SET_TYPE(trb, XHCI_TRB_TYPE_ENABLE_SLOT_CMD);
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[c9c0e41] | 288 | trb.control |= host2xhci(32, XHCI_REG_RD(hc->xecp, XHCI_EC_SP_SLOT_TYPE) << 16);
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| 289 |
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[c9bec1c] | 290 | add_cmd(hc, cmd);
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[110d795] | 291 |
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[5ac5eb1] | 292 | return enqueue_trb(hc, &trb, 0, 0);
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| 293 | }
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| 294 |
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[110d795] | 295 | int xhci_send_disable_slot_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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[5ac5eb1] | 296 | {
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[c058a388] | 297 | assert(hc);
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[110d795] | 298 | assert(cmd);
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[c058a388] | 299 |
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[5ac5eb1] | 300 | xhci_trb_t trb;
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| 301 | memset(&trb, 0, sizeof(trb));
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| 302 |
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[1b78a7c1] | 303 | TRB_SET_TYPE(trb, XHCI_TRB_TYPE_DISABLE_SLOT_CMD);
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| 304 | TRB_SET_SLOT(trb, cmd->slot_id);
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[110d795] | 305 |
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| 306 | add_cmd(hc, cmd);
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[c9c0e41] | 307 |
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[481af21e] | 308 | return enqueue_trb(hc, &trb, 0, 0);
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[c9c0e41] | 309 | }
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| 310 |
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[110d795] | 311 | int xhci_send_address_device_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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[8db42f7] | 312 | {
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[c058a388] | 313 | assert(hc);
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[110d795] | 314 | assert(cmd);
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| 315 | assert(cmd->ictx);
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[c058a388] | 316 |
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[8db42f7] | 317 | /**
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| 318 | * TODO: Requirements for this command:
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| 319 | * dcbaa[slot_id] is properly sized and initialized
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| 320 | * ictx has valids slot context and endpoint 0, all
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| 321 | * other should be ignored at this point (see section 4.6.5).
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| 322 | */
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| 323 | xhci_trb_t trb;
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| 324 | memset(&trb, 0, sizeof(trb));
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| 325 |
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[110d795] | 326 | uint64_t phys_addr = (uint64_t) addr_to_phys(cmd->ictx);
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[1b78a7c1] | 327 | TRB_SET_ICTX(trb, phys_addr);
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[8db42f7] | 328 |
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| 329 | /**
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| 330 | * Note: According to section 6.4.3.4, we can set the 9th bit
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| 331 | * of the control field of the trb (BSR) to 1 and then the xHC
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| 332 | * will not issue the SET_ADDRESS request to the USB device.
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| 333 | * This can be used to provide compatibility with legacy USB devices
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| 334 | * that require their device descriptor to be read before such request.
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| 335 | */
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[1b78a7c1] | 336 | TRB_SET_TYPE(trb, XHCI_TRB_TYPE_ADDRESS_DEVICE_CMD);
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| 337 | TRB_SET_SLOT(trb, cmd->slot_id);
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[110d795] | 338 |
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[c9bec1c] | 339 | add_cmd(hc, cmd);
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[8db42f7] | 340 |
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| 341 | return enqueue_trb(hc, &trb, 0, 0);
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| 342 | }
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| 343 |
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[110d795] | 344 | int xhci_send_configure_endpoint_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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[665bf3c] | 345 | {
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[c058a388] | 346 | assert(hc);
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[110d795] | 347 | assert(cmd);
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| 348 | assert(cmd->ictx);
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[c058a388] | 349 |
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[665bf3c] | 350 | xhci_trb_t trb;
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| 351 | memset(&trb, 0, sizeof(trb));
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| 352 |
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[110d795] | 353 | uint64_t phys_addr = (uint64_t) addr_to_phys(cmd->ictx);
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[1b78a7c1] | 354 | TRB_SET_ICTX(trb, phys_addr);
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[665bf3c] | 355 |
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[1b78a7c1] | 356 | TRB_SET_TYPE(trb, XHCI_TRB_TYPE_CONFIGURE_ENDPOINT_CMD);
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| 357 | TRB_SET_SLOT(trb, cmd->slot_id);
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[110d795] | 358 |
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[c9bec1c] | 359 | add_cmd(hc, cmd);
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[665bf3c] | 360 |
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| 361 | return enqueue_trb(hc, &trb, 0, 0);
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| 362 | }
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| 363 |
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[110d795] | 364 | int xhci_send_evaluate_context_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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[c9ce62ae] | 365 | {
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[c058a388] | 366 | assert(hc);
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[110d795] | 367 | assert(cmd);
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| 368 | assert(cmd->ictx);
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[c058a388] | 369 |
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[c9ce62ae] | 370 | /**
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| 371 | * Note: All Drop Context flags of the input context shall be 0,
|
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| 372 | * all Add Context flags shall be initialize to indicate IDs
|
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| 373 | * of the contexts affected by the command.
|
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| 374 | * Refer to sections 6.2.2.3 and 6.3.3.3 for further info.
|
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| 375 | */
|
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| 376 | xhci_trb_t trb;
|
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| 377 | memset(&trb, 0, sizeof(trb));
|
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| 378 |
|
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[110d795] | 379 | uint64_t phys_addr = (uint64_t) addr_to_phys(cmd->ictx);
|
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[1b78a7c1] | 380 | TRB_SET_ICTX(trb, phys_addr);
|
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[c9ce62ae] | 381 |
|
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[1b78a7c1] | 382 | TRB_SET_TYPE(trb, XHCI_TRB_TYPE_EVALUATE_CONTEXT_CMD);
|
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| 383 | TRB_SET_SLOT(trb, cmd->slot_id);
|
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[110d795] | 384 |
|
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[c9bec1c] | 385 | add_cmd(hc, cmd);
|
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[c9ce62ae] | 386 |
|
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| 387 | return enqueue_trb(hc, &trb, 0, 0);
|
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| 388 | }
|
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| 389 |
|
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[110d795] | 390 | int xhci_send_reset_endpoint_command(xhci_hc_t *hc, xhci_cmd_t *cmd, uint32_t ep_id, uint8_t tcs)
|
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[05aeee0e] | 391 | {
|
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[c058a388] | 392 | assert(hc);
|
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[110d795] | 393 | assert(cmd);
|
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[c058a388] | 394 |
|
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[05aeee0e] | 395 | /**
|
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| 396 | * Note: TCS can have values 0 or 1. If it is set to 0, see sectuon 4.5.8 for
|
---|
| 397 | * information about this flag.
|
---|
| 398 | */
|
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| 399 | xhci_trb_t trb;
|
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| 400 | memset(&trb, 0, sizeof(trb));
|
---|
| 401 |
|
---|
[1b78a7c1] | 402 | TRB_SET_TYPE(trb, XHCI_TRB_TYPE_RESET_ENDPOINT_CMD);
|
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| 403 | TRB_SET_TCS(trb, tcs);
|
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| 404 | TRB_SET_EP(trb, ep_id);
|
---|
| 405 | TRB_SET_SLOT(trb, cmd->slot_id);
|
---|
[05aeee0e] | 406 |
|
---|
[c9bec1c] | 407 | add_cmd(hc, cmd);
|
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| 408 |
|
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[05aeee0e] | 409 | return enqueue_trb(hc, &trb, 0, 0);
|
---|
| 410 | }
|
---|
| 411 |
|
---|
[110d795] | 412 | int xhci_send_stop_endpoint_command(xhci_hc_t *hc, xhci_cmd_t *cmd, uint32_t ep_id, uint8_t susp)
|
---|
[05aeee0e] | 413 | {
|
---|
[c058a388] | 414 | assert(hc);
|
---|
[110d795] | 415 | assert(cmd);
|
---|
[c058a388] | 416 |
|
---|
[05aeee0e] | 417 | xhci_trb_t trb;
|
---|
| 418 | memset(&trb, 0, sizeof(trb));
|
---|
| 419 |
|
---|
[1b78a7c1] | 420 | TRB_SET_TYPE(trb, XHCI_TRB_TYPE_STOP_ENDPOINT_CMD);
|
---|
| 421 | TRB_SET_EP(trb, ep_id);
|
---|
| 422 | TRB_SET_SUSP(trb, susp);
|
---|
| 423 | TRB_SET_SLOT(trb, cmd->slot_id);
|
---|
[110d795] | 424 |
|
---|
[c9bec1c] | 425 | add_cmd(hc, cmd);
|
---|
[05aeee0e] | 426 |
|
---|
| 427 | return enqueue_trb(hc, &trb, 0, 0);
|
---|
[c058a388] | 428 | }
|
---|
[05aeee0e] | 429 |
|
---|
[0cabd10] | 430 | int xhci_send_set_dequeue_ptr_command(xhci_hc_t *hc, xhci_cmd_t *cmd,
|
---|
| 431 | uintptr_t dequeue_ptr, uint16_t stream_id,
|
---|
| 432 | uint32_t ep_id)
|
---|
| 433 | {
|
---|
| 434 | assert(hc);
|
---|
| 435 | assert(cmd);
|
---|
| 436 |
|
---|
| 437 | xhci_trb_t trb;
|
---|
| 438 | memset(&trb, 0, sizeof(trb));
|
---|
| 439 |
|
---|
| 440 | TRB_SET_TYPE(trb, XHCI_TRB_TYPE_SET_TR_DEQUEUE_POINTER_CMD);
|
---|
| 441 | TRB_SET_EP(trb, ep_id);
|
---|
| 442 | TRB_SET_STREAM(trb, stream_id);
|
---|
| 443 | TRB_SET_SLOT(trb, cmd->slot_id);
|
---|
| 444 | TRB_SET_DEQUEUE_PTR(trb, dequeue_ptr);
|
---|
| 445 |
|
---|
| 446 | /**
|
---|
| 447 | * TODO: Set DCS (see section 4.6.10).
|
---|
| 448 | */
|
---|
| 449 |
|
---|
[c9bec1c] | 450 | add_cmd(hc, cmd);
|
---|
[0cabd10] | 451 |
|
---|
| 452 | return enqueue_trb(hc, &trb, 0, 0);
|
---|
| 453 | }
|
---|
| 454 |
|
---|
[110d795] | 455 | int xhci_send_reset_device_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
|
---|
[c058a388] | 456 | {
|
---|
| 457 | assert(hc);
|
---|
[110d795] | 458 | assert(cmd);
|
---|
[c058a388] | 459 |
|
---|
| 460 | xhci_trb_t trb;
|
---|
| 461 | memset(&trb, 0, sizeof(trb));
|
---|
| 462 |
|
---|
[1b78a7c1] | 463 | TRB_SET_TYPE(trb, XHCI_TRB_TYPE_RESET_DEVICE_CMD);
|
---|
| 464 | TRB_SET_SLOT(trb, cmd->slot_id);
|
---|
[c058a388] | 465 |
|
---|
[c9bec1c] | 466 | add_cmd(hc, cmd);
|
---|
| 467 |
|
---|
[c058a388] | 468 | return enqueue_trb(hc, &trb, 0, 0);
|
---|
[05aeee0e] | 469 | }
|
---|
| 470 |
|
---|
[f9e7fe8] | 471 | int xhci_handle_command_completion(xhci_hc_t *hc, xhci_trb_t *trb)
|
---|
| 472 | {
|
---|
[110d795] | 473 | // TODO: Update dequeue ptrs.
|
---|
[c058a388] | 474 | assert(hc);
|
---|
| 475 | assert(trb);
|
---|
| 476 |
|
---|
[5ac5eb1] | 477 | usb_log_debug("HC(%p) Command completed.", hc);
|
---|
[f9e7fe8] | 478 |
|
---|
[5ac5eb1] | 479 | int code;
|
---|
[2fa43d1] | 480 | uint64_t phys;
|
---|
[110d795] | 481 | xhci_cmd_t *command;
|
---|
| 482 | xhci_trb_t *command_trb;
|
---|
[f711f06] | 483 |
|
---|
[1b78a7c1] | 484 | code = TRB_GET_CODE(*trb);
|
---|
| 485 | phys = TRB_GET_PHYS(*trb);;
|
---|
[2fa43d1] | 486 | command = get_command(hc, phys);
|
---|
| 487 | if (command == NULL) {
|
---|
| 488 | // TODO: STOP & ABORT may not have command structs in the list!
|
---|
| 489 | usb_log_error("No command struct for this completion event");
|
---|
| 490 |
|
---|
| 491 | if (code != XHCI_TRBC_SUCCESS)
|
---|
| 492 | report_error(code);
|
---|
| 493 |
|
---|
| 494 | return EOK;
|
---|
| 495 | }
|
---|
[110d795] | 496 |
|
---|
| 497 | command_trb = command->trb;
|
---|
| 498 | command->status = code;
|
---|
[1b78a7c1] | 499 | command->slot_id = TRB_GET_SLOT(*trb);
|
---|
[110d795] | 500 |
|
---|
[eff60ca] | 501 | usb_log_debug2("Completed command trb: %s", xhci_trb_str_type(TRB_TYPE(*command_trb)));
|
---|
[110d795] | 502 | if (TRB_TYPE(*command_trb) != XHCI_TRB_TYPE_NO_OP_CMD) {
|
---|
[665bf3c] | 503 | if (code != XHCI_TRBC_SUCCESS) {
|
---|
[4fa5342] | 504 | report_error(code);
|
---|
[110d795] | 505 | xhci_dump_trb(command_trb);
|
---|
[665bf3c] | 506 | }
|
---|
| 507 | }
|
---|
[c362127] | 508 |
|
---|
[110d795] | 509 | switch (TRB_TYPE(*command_trb)) {
|
---|
[c362127] | 510 | case XHCI_TRB_TYPE_NO_OP_CMD:
|
---|
[9f5b613] | 511 | assert(code == XHCI_TRBC_TRB_ERROR);
|
---|
[110d795] | 512 | break;
|
---|
[c362127] | 513 | case XHCI_TRB_TYPE_ENABLE_SLOT_CMD:
|
---|
[110d795] | 514 | break;
|
---|
[5ac5eb1] | 515 | case XHCI_TRB_TYPE_DISABLE_SLOT_CMD:
|
---|
[110d795] | 516 | break;
|
---|
[8db42f7] | 517 | case XHCI_TRB_TYPE_ADDRESS_DEVICE_CMD:
|
---|
[110d795] | 518 | break;
|
---|
[665bf3c] | 519 | case XHCI_TRB_TYPE_CONFIGURE_ENDPOINT_CMD:
|
---|
[110d795] | 520 | break;
|
---|
[c9ce62ae] | 521 | case XHCI_TRB_TYPE_EVALUATE_CONTEXT_CMD:
|
---|
[110d795] | 522 | break;
|
---|
[05aeee0e] | 523 | case XHCI_TRB_TYPE_RESET_ENDPOINT_CMD:
|
---|
[110d795] | 524 | break;
|
---|
[05aeee0e] | 525 | case XHCI_TRB_TYPE_STOP_ENDPOINT_CMD:
|
---|
| 526 | // Note: If the endpoint was in the middle of a transfer, then the xHC
|
---|
| 527 | // will add a Transfer TRB before the Event TRB, research that and
|
---|
| 528 | // handle it appropriately!
|
---|
[110d795] | 529 | break;
|
---|
[c058a388] | 530 | case XHCI_TRB_TYPE_RESET_DEVICE_CMD:
|
---|
[110d795] | 531 | break;
|
---|
[c362127] | 532 | default:
|
---|
[eff60ca] | 533 | usb_log_debug2("Unsupported command trb: %s", xhci_trb_str_type(TRB_TYPE(*command_trb)));
|
---|
[110d795] | 534 |
|
---|
| 535 | command->completed = true;
|
---|
[665bf3c] | 536 | return ENAK;
|
---|
[f711f06] | 537 | }
|
---|
[110d795] | 538 |
|
---|
| 539 | command->completed = true;
|
---|
| 540 |
|
---|
[c4d4fa2] | 541 | if (!command->has_owner) {
|
---|
[eff60ca] | 542 | usb_log_debug2("Command has no owner, deallocating.");
|
---|
[60f7c590] | 543 | command->trb = NULL; // It was statically allocated.
|
---|
[110d795] | 544 | xhci_free_command(command);
|
---|
[c4d4fa2] | 545 | } else {
|
---|
[eff60ca] | 546 | usb_log_debug2("Command has owner, don't forget to deallocate!");
|
---|
[c4d4fa2] | 547 | /* Copy the trb for later use so that we can free space on the cmd ring. */
|
---|
| 548 | command->trb = malloc32(sizeof(xhci_trb_t));
|
---|
| 549 | xhci_trb_copy(command->trb, command_trb);
|
---|
| 550 | }
|
---|
[110d795] | 551 |
|
---|
| 552 | return EOK;
|
---|
[f9e7fe8] | 553 | }
|
---|
[c9c0e41] | 554 |
|
---|
| 555 |
|
---|
| 556 | /**
|
---|
| 557 | * @}
|
---|
| 558 | */
|
---|