| [c9c0e41] | 1 | /*
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| 2 | * Copyright (c) 2017 Jaroslav Jindrak
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup drvusbxhci
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| 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | * @brief Command sending functions.
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| 34 | */
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| 35 |
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| 36 | #include <errno.h>
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| 37 | #include <str_error.h>
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| 38 | #include <usb/debug.h>
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| 39 | #include <usb/host/utils/malloc32.h>
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| 40 | #include "commands.h"
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| 41 | #include "debug.h"
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| 42 | #include "hc.h"
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| [8db42f7] | 43 | #include "hw_struct/context.h"
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| [c9c0e41] | 44 | #include "hw_struct/trb.h"
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| 45 |
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| [1b78a7c1] | 46 | #define TRB_SET_TCS(trb, tcs) (trb).control |= host2xhci(32, ((tcs &0x1) << 9))
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| 47 | #define TRB_SET_TYPE(trb, type) (trb).control |= host2xhci(32, (type) << 10)
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| 48 | #define TRB_SET_EP(trb, ep) (trb).control |= host2xhci(32, ((ep) & 0x5) << 16)
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| [0cabd10] | 49 | #define TRB_SET_STREAM(trb, st) (trb).control |= host2xhci(32, ((st) & 0xFFFF) << 16)
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| [1b78a7c1] | 50 | #define TRB_SET_SUSP(trb, susp) (trb).control |= host2xhci(32, ((susp) & 0x1) << 23)
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| 51 | #define TRB_SET_SLOT(trb, slot) (trb).control |= host2xhci(32, (slot) << 24)
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| 52 |
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| [0cabd10] | 53 | /**
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| 54 | * TODO: Not sure about SCT and DCS (see section 6.4.3.9).
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| 55 | */
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| 56 | #define TRB_SET_DEQUEUE_PTR(trb, dptr) (trb).parameter |= host2xhci(64, (dptr))
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| [548c123] | 57 | #define TRB_SET_ICTX(trb, phys) (trb).parameter |= host2xhci(64, phys_addr & (~0xF))
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| [1b78a7c1] | 58 |
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| 59 | #define TRB_GET_CODE(trb) XHCI_DWORD_EXTRACT((trb).status, 31, 24)
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| 60 | #define TRB_GET_SLOT(trb) XHCI_DWORD_EXTRACT((trb).control, 31, 24)
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| 61 | #define TRB_GET_PHYS(trb) (XHCI_QWORD_EXTRACT((trb).parameter, 63, 4) << 4)
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| 62 |
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| [110d795] | 63 | int xhci_init_commands(xhci_hc_t *hc)
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| 64 | {
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| 65 | assert(hc);
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| 66 |
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| 67 | list_initialize(&hc->commands);
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| 68 | return EOK;
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| 69 | }
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| 70 |
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| [c46c356] | 71 | void xhci_fini_commands(xhci_hc_t *hc)
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| 72 | {
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| 73 | // Note: Untested.
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| 74 | assert(hc);
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| 75 |
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| 76 | // We assume that the hc is dying/stopping, so we ignore
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| 77 | // the ownership of the commands.
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| 78 | list_foreach(hc->commands, link, xhci_cmd_t, cmd) {
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| 79 | xhci_free_command(cmd);
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| 80 | }
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| 81 | }
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| 82 |
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| [4688350b] | 83 | int xhci_wait_for_command(xhci_cmd_t *cmd, suseconds_t timeout)
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| [110d795] | 84 | {
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| [4688350b] | 85 | int rv = EOK;
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| 86 |
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| 87 | fibril_mutex_lock(&cmd->completed_mtx);
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| [110d795] | 88 | while (!cmd->completed) {
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| [4688350b] | 89 | usb_log_debug2("Waiting for event completion: going to sleep.");
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| 90 | rv = fibril_condvar_wait_timeout(&cmd->completed_cv, &cmd->completed_mtx, timeout);
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| [110d795] | 91 |
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| [4688350b] | 92 | usb_log_debug2("Waiting for event completion: woken: %s", str_error(rv));
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| 93 | if (rv == ETIMEOUT)
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| 94 | break;
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| [110d795] | 95 | }
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| [4688350b] | 96 | fibril_mutex_lock(&cmd->completed_mtx);
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| [110d795] | 97 |
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| [4688350b] | 98 | return rv;
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| [110d795] | 99 | }
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| 100 |
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| 101 | xhci_cmd_t *xhci_alloc_command(void)
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| 102 | {
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| 103 | xhci_cmd_t *cmd = malloc32(sizeof(xhci_cmd_t));
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| [4688350b] | 104 | xhci_cmd_init(cmd);
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| 105 | return cmd;
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| 106 | }
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| 107 |
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| 108 | void xhci_cmd_init(xhci_cmd_t *cmd)
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| 109 | {
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| 110 | memset(cmd, 0, sizeof(*cmd));
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| [110d795] | 111 |
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| 112 | link_initialize(&cmd->link);
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| 113 |
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| [4688350b] | 114 | fibril_mutex_initialize(&cmd->completed_mtx);
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| 115 | fibril_condvar_initialize(&cmd->completed_cv);
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| 116 |
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| [110d795] | 117 | /**
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| 118 | * Internal functions will set this to false, other are implicit
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| 119 | * owners unless they overwrite this field.
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| 120 | * TODO: Is this wise?
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| 121 | */
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| 122 | cmd->has_owner = true;
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| 123 | }
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| 124 |
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| 125 | void xhci_free_command(xhci_cmd_t *cmd)
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| 126 | {
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| [9304b66] | 127 | list_remove(&cmd->link);
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| 128 |
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| [110d795] | 129 | if (cmd->ictx)
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| 130 | free32(cmd->ictx);
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| 131 |
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| 132 | free32(cmd);
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| 133 | }
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| 134 |
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| [2fa43d1] | 135 | static inline xhci_cmd_t *get_command(xhci_hc_t *hc, uint64_t phys)
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| [110d795] | 136 | {
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| 137 | link_t *cmd_link = list_first(&hc->commands);
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| 138 |
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| [548c123] | 139 |
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| 140 | usb_log_debug2("Searching TRB %lu...", phys);
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| 141 |
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| [2fa43d1] | 142 | while (cmd_link != NULL) {
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| 143 | xhci_cmd_t *cmd = list_get_instance(cmd_link, xhci_cmd_t, link);
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| 144 |
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| [548c123] | 145 | if (cmd->trb_phys == phys)
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| [2fa43d1] | 146 | break;
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| 147 |
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| 148 | cmd_link = list_next(cmd_link, &hc->commands);
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| 149 | }
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| 150 |
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| [110d795] | 151 | if (cmd_link != NULL) {
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| 152 | list_remove(cmd_link);
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| [9f5b613] | 153 |
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| [110d795] | 154 | return list_get_instance(cmd_link, xhci_cmd_t, link);
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| 155 | }
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| 156 |
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| 157 | return NULL;
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| 158 | }
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| 159 |
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| [481af21e] | 160 | static inline int ring_doorbell(xhci_hc_t *hc, unsigned doorbell, unsigned target)
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| [c9c0e41] | 161 | {
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| [c058a388] | 162 | assert(hc);
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| [c9c0e41] | 163 | uint32_t v = host2xhci(32, target & BIT_RRANGE(uint32_t, 7));
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| 164 | pio_write_32(&hc->db_arry[doorbell], v);
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| 165 | return EOK;
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| 166 | }
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| 167 |
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| [548c123] | 168 | static inline int enqueue_command(xhci_hc_t *hc, xhci_cmd_t *cmd, unsigned doorbell, unsigned target)
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| [481af21e] | 169 | {
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| [c058a388] | 170 | assert(hc);
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| [548c123] | 171 | assert(cmd);
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| 172 |
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| 173 | list_append(&cmd->link, &hc->commands);
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| [c058a388] | 174 |
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| [548c123] | 175 | xhci_trb_ring_enqueue(&hc->command_ring, &cmd->trb, &cmd->trb_phys);
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| [481af21e] | 176 | ring_doorbell(hc, doorbell, target);
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| 177 |
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| [548c123] | 178 | usb_log_debug2("HC(%p): Sent command:", hc);
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| 179 | xhci_dump_trb(&cmd->trb);
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| [481af21e] | 180 |
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| 181 | return EOK;
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| 182 | }
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| 183 |
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| [3dc519f] | 184 | void xhci_stop_command_ring(xhci_hc_t *hc)
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| 185 | {
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| 186 | assert(hc);
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| 187 |
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| 188 | XHCI_REG_SET(hc->op_regs, XHCI_OP_CS, 1);
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| 189 |
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| 190 | /**
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| 191 | * Note: There is a bug in qemu that checks CS only when CRCR_HI
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| 192 | * is written, this (and the read/write in abort) ensures
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| 193 | * the command rings stops.
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| 194 | */
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| 195 | XHCI_REG_WR(hc->op_regs, XHCI_OP_CRCR_HI, XHCI_REG_RD(hc->op_regs, XHCI_OP_CRCR_HI));
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| 196 | }
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| 197 |
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| 198 | void xhci_abort_command_ring(xhci_hc_t *hc)
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| 199 | {
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| 200 | assert(hc);
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| 201 |
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| 202 | XHCI_REG_WR(hc->op_regs, XHCI_OP_CA, 1);
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| 203 | XHCI_REG_WR(hc->op_regs, XHCI_OP_CRCR_HI, XHCI_REG_RD(hc->op_regs, XHCI_OP_CRCR_HI));
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| 204 | }
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| 205 |
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| 206 | void xhci_start_command_ring(xhci_hc_t *hc)
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| 207 | {
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| 208 | assert(hc);
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| 209 |
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| 210 | XHCI_REG_WR(hc->op_regs, XHCI_OP_CRR, 1);
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| 211 | ring_doorbell(hc, 0, 0);
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| 212 | }
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| 213 |
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| [4fa5342] | 214 | static const char *trb_codes [] = {
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| 215 | #define TRBC(t) [XHCI_TRBC_##t] = #t
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| 216 | TRBC(INVALID),
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| 217 | TRBC(SUCCESS),
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| 218 | TRBC(DATA_BUFFER_ERROR),
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| 219 | TRBC(BABBLE_DETECTED_ERROR),
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| 220 | TRBC(USB_TRANSACTION_ERROR),
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| 221 | TRBC(TRB_ERROR),
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| 222 | TRBC(STALL_ERROR),
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| 223 | TRBC(RESOURCE_ERROR),
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| 224 | TRBC(BANDWIDTH_ERROR),
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| 225 | TRBC(NO_SLOTS_ERROR),
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| 226 | TRBC(INVALID_STREAM_ERROR),
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| 227 | TRBC(SLOT_NOT_ENABLED_ERROR),
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| 228 | TRBC(EP_NOT_ENABLED_ERROR),
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| 229 | TRBC(SHORT_PACKET),
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| 230 | TRBC(RING_UNDERRUN),
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| 231 | TRBC(RING_OVERRUN),
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| 232 | TRBC(VF_EVENT_RING_FULL),
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| 233 | TRBC(PARAMETER_ERROR),
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| 234 | TRBC(BANDWIDTH_OVERRUN_ERROR),
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| 235 | TRBC(CONTEXT_STATE_ERROR),
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| 236 | TRBC(NO_PING_RESPONSE_ERROR),
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| 237 | TRBC(EVENT_RING_FULL_ERROR),
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| 238 | TRBC(INCOMPATIBLE_DEVICE_ERROR),
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| 239 | TRBC(MISSED_SERVICE_ERROR),
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| 240 | TRBC(COMMAND_RING_STOPPED),
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| 241 | TRBC(COMMAND_ABORTED),
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| 242 | TRBC(STOPPED),
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| 243 | TRBC(STOPPED_LENGTH_INVALID),
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| 244 | TRBC(STOPPED_SHORT_PACKET),
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| 245 | TRBC(MAX_EXIT_LATENCY_TOO_LARGE_ERROR),
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| 246 | [30] = "<reserved>",
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| 247 | TRBC(ISOCH_BUFFER_OVERRUN),
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| 248 | TRBC(EVENT_LOST_ERROR),
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| 249 | TRBC(UNDEFINED_ERROR),
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| 250 | TRBC(INVALID_STREAM_ID_ERROR),
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| 251 | TRBC(SECONDARY_BANDWIDTH_ERROR),
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| 252 | TRBC(SPLIT_TRANSACTION_ERROR),
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| 253 | [XHCI_TRBC_MAX] = NULL
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| 254 | #undef TRBC
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| 255 | };
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| 256 |
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| 257 | static void report_error(int code)
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| 258 | {
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| 259 | if (code < XHCI_TRBC_MAX && trb_codes[code] != NULL)
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| 260 | usb_log_error("Command resulted in error: %s.", trb_codes[code]);
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| 261 | else
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| 262 | usb_log_error("Command resulted in reserved or vendor specific error.");
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| 263 | }
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| 264 |
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| [110d795] | 265 | int xhci_send_no_op_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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| [c9c0e41] | 266 | {
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| [c058a388] | 267 | assert(hc);
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| 268 |
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| [548c123] | 269 | xhci_trb_clean(&cmd->trb);
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| [c9c0e41] | 270 |
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| [548c123] | 271 | TRB_SET_TYPE(cmd->trb, XHCI_TRB_TYPE_NO_OP_CMD);
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| [110d795] | 272 |
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| [548c123] | 273 | return enqueue_command(hc, cmd, 0, 0);
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| [c9c0e41] | 274 | }
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| 275 |
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| [110d795] | 276 | int xhci_send_enable_slot_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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| [c9c0e41] | 277 | {
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| [c058a388] | 278 | assert(hc);
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| 279 |
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| [548c123] | 280 | xhci_trb_clean(&cmd->trb);
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| [c9c0e41] | 281 |
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| [548c123] | 282 | TRB_SET_TYPE(cmd->trb, XHCI_TRB_TYPE_ENABLE_SLOT_CMD);
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| 283 | cmd->trb.control |= host2xhci(32, XHCI_REG_RD(hc->xecp, XHCI_EC_SP_SLOT_TYPE) << 16);
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| [110d795] | 284 |
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| [548c123] | 285 | return enqueue_command(hc, cmd, 0, 0);
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| [5ac5eb1] | 286 | }
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| 287 |
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| [110d795] | 288 | int xhci_send_disable_slot_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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| [5ac5eb1] | 289 | {
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| [c058a388] | 290 | assert(hc);
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| [110d795] | 291 | assert(cmd);
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| [c058a388] | 292 |
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| [548c123] | 293 | xhci_trb_clean(&cmd->trb);
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| [5ac5eb1] | 294 |
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| [548c123] | 295 | TRB_SET_TYPE(cmd->trb, XHCI_TRB_TYPE_DISABLE_SLOT_CMD);
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| 296 | TRB_SET_SLOT(cmd->trb, cmd->slot_id);
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| [110d795] | 297 |
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| [548c123] | 298 | return enqueue_command(hc, cmd, 0, 0);
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| [c9c0e41] | 299 | }
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| 300 |
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| [110d795] | 301 | int xhci_send_address_device_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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| [8db42f7] | 302 | {
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| [c058a388] | 303 | assert(hc);
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| [110d795] | 304 | assert(cmd);
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| 305 | assert(cmd->ictx);
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| [c058a388] | 306 |
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| [8db42f7] | 307 | /**
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| 308 | * TODO: Requirements for this command:
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| 309 | * dcbaa[slot_id] is properly sized and initialized
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| 310 | * ictx has valids slot context and endpoint 0, all
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| 311 | * other should be ignored at this point (see section 4.6.5).
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| 312 | */
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| [548c123] | 313 | xhci_trb_clean(&cmd->trb);
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| [8db42f7] | 314 |
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| [110d795] | 315 | uint64_t phys_addr = (uint64_t) addr_to_phys(cmd->ictx);
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| [548c123] | 316 | TRB_SET_ICTX(cmd->trb, phys_addr);
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| [8db42f7] | 317 |
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| 318 | /**
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| 319 | * Note: According to section 6.4.3.4, we can set the 9th bit
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| 320 | * of the control field of the trb (BSR) to 1 and then the xHC
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| 321 | * will not issue the SET_ADDRESS request to the USB device.
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| 322 | * This can be used to provide compatibility with legacy USB devices
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| 323 | * that require their device descriptor to be read before such request.
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| 324 | */
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| [548c123] | 325 | TRB_SET_TYPE(cmd->trb, XHCI_TRB_TYPE_ADDRESS_DEVICE_CMD);
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| 326 | TRB_SET_SLOT(cmd->trb, cmd->slot_id);
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| [8db42f7] | 327 |
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| [548c123] | 328 | return enqueue_command(hc, cmd, 0, 0);
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| [8db42f7] | 329 | }
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| 330 |
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| [110d795] | 331 | int xhci_send_configure_endpoint_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
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| [665bf3c] | 332 | {
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| [c058a388] | 333 | assert(hc);
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| [110d795] | 334 | assert(cmd);
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| 335 | assert(cmd->ictx);
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| [c058a388] | 336 |
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| [548c123] | 337 | xhci_trb_clean(&cmd->trb);
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| [665bf3c] | 338 |
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| [110d795] | 339 | uint64_t phys_addr = (uint64_t) addr_to_phys(cmd->ictx);
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| [548c123] | 340 | TRB_SET_ICTX(cmd->trb, phys_addr);
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| [110d795] | 341 |
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| [548c123] | 342 | TRB_SET_TYPE(cmd->trb, XHCI_TRB_TYPE_CONFIGURE_ENDPOINT_CMD);
|
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| 343 | TRB_SET_SLOT(cmd->trb, cmd->slot_id);
|
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| [665bf3c] | 344 |
|
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| [548c123] | 345 | return enqueue_command(hc, cmd, 0, 0);
|
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| [665bf3c] | 346 | }
|
|---|
| 347 |
|
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| [110d795] | 348 | int xhci_send_evaluate_context_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
|
|---|
| [c9ce62ae] | 349 | {
|
|---|
| [c058a388] | 350 | assert(hc);
|
|---|
| [110d795] | 351 | assert(cmd);
|
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| 352 | assert(cmd->ictx);
|
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| [c058a388] | 353 |
|
|---|
| [c9ce62ae] | 354 | /**
|
|---|
| 355 | * Note: All Drop Context flags of the input context shall be 0,
|
|---|
| 356 | * all Add Context flags shall be initialize to indicate IDs
|
|---|
| 357 | * of the contexts affected by the command.
|
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| 358 | * Refer to sections 6.2.2.3 and 6.3.3.3 for further info.
|
|---|
| 359 | */
|
|---|
| [548c123] | 360 | xhci_trb_clean(&cmd->trb);
|
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| [c9ce62ae] | 361 |
|
|---|
| [110d795] | 362 | uint64_t phys_addr = (uint64_t) addr_to_phys(cmd->ictx);
|
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| [548c123] | 363 | TRB_SET_ICTX(cmd->trb, phys_addr);
|
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| [c9ce62ae] | 364 |
|
|---|
| [548c123] | 365 | TRB_SET_TYPE(cmd->trb, XHCI_TRB_TYPE_EVALUATE_CONTEXT_CMD);
|
|---|
| 366 | TRB_SET_SLOT(cmd->trb, cmd->slot_id);
|
|---|
| [110d795] | 367 |
|
|---|
| [548c123] | 368 | return enqueue_command(hc, cmd, 0, 0);
|
|---|
| [c9ce62ae] | 369 | }
|
|---|
| 370 |
|
|---|
| [110d795] | 371 | int xhci_send_reset_endpoint_command(xhci_hc_t *hc, xhci_cmd_t *cmd, uint32_t ep_id, uint8_t tcs)
|
|---|
| [05aeee0e] | 372 | {
|
|---|
| [c058a388] | 373 | assert(hc);
|
|---|
| [110d795] | 374 | assert(cmd);
|
|---|
| [c058a388] | 375 |
|
|---|
| [05aeee0e] | 376 | /**
|
|---|
| 377 | * Note: TCS can have values 0 or 1. If it is set to 0, see sectuon 4.5.8 for
|
|---|
| 378 | * information about this flag.
|
|---|
| 379 | */
|
|---|
| [548c123] | 380 | xhci_trb_clean(&cmd->trb);
|
|---|
| [05aeee0e] | 381 |
|
|---|
| [548c123] | 382 | TRB_SET_TYPE(cmd->trb, XHCI_TRB_TYPE_RESET_ENDPOINT_CMD);
|
|---|
| 383 | TRB_SET_TCS(cmd->trb, tcs);
|
|---|
| 384 | TRB_SET_EP(cmd->trb, ep_id);
|
|---|
| 385 | TRB_SET_SLOT(cmd->trb, cmd->slot_id);
|
|---|
| [c9bec1c] | 386 |
|
|---|
| [548c123] | 387 | return enqueue_command(hc, cmd, 0, 0);
|
|---|
| [05aeee0e] | 388 | }
|
|---|
| 389 |
|
|---|
| [110d795] | 390 | int xhci_send_stop_endpoint_command(xhci_hc_t *hc, xhci_cmd_t *cmd, uint32_t ep_id, uint8_t susp)
|
|---|
| [05aeee0e] | 391 | {
|
|---|
| [c058a388] | 392 | assert(hc);
|
|---|
| [110d795] | 393 | assert(cmd);
|
|---|
| [c058a388] | 394 |
|
|---|
| [548c123] | 395 | xhci_trb_clean(&cmd->trb);
|
|---|
| [110d795] | 396 |
|
|---|
| [548c123] | 397 | TRB_SET_TYPE(cmd->trb, XHCI_TRB_TYPE_STOP_ENDPOINT_CMD);
|
|---|
| 398 | TRB_SET_EP(cmd->trb, ep_id);
|
|---|
| 399 | TRB_SET_SUSP(cmd->trb, susp);
|
|---|
| 400 | TRB_SET_SLOT(cmd->trb, cmd->slot_id);
|
|---|
| [05aeee0e] | 401 |
|
|---|
| [548c123] | 402 | return enqueue_command(hc, cmd, 0, 0);
|
|---|
| [c058a388] | 403 | }
|
|---|
| [05aeee0e] | 404 |
|
|---|
| [0cabd10] | 405 | int xhci_send_set_dequeue_ptr_command(xhci_hc_t *hc, xhci_cmd_t *cmd,
|
|---|
| 406 | uintptr_t dequeue_ptr, uint16_t stream_id,
|
|---|
| 407 | uint32_t ep_id)
|
|---|
| 408 | {
|
|---|
| 409 | assert(hc);
|
|---|
| 410 | assert(cmd);
|
|---|
| 411 |
|
|---|
| [548c123] | 412 | xhci_trb_clean(&cmd->trb);
|
|---|
| [0cabd10] | 413 |
|
|---|
| [548c123] | 414 | TRB_SET_TYPE(cmd->trb, XHCI_TRB_TYPE_SET_TR_DEQUEUE_POINTER_CMD);
|
|---|
| 415 | TRB_SET_EP(cmd->trb, ep_id);
|
|---|
| 416 | TRB_SET_STREAM(cmd->trb, stream_id);
|
|---|
| 417 | TRB_SET_SLOT(cmd->trb, cmd->slot_id);
|
|---|
| 418 | TRB_SET_DEQUEUE_PTR(cmd->trb, dequeue_ptr);
|
|---|
| [0cabd10] | 419 |
|
|---|
| 420 | /**
|
|---|
| 421 | * TODO: Set DCS (see section 4.6.10).
|
|---|
| 422 | */
|
|---|
| 423 |
|
|---|
| [548c123] | 424 | return enqueue_command(hc, cmd, 0, 0);
|
|---|
| [0cabd10] | 425 | }
|
|---|
| 426 |
|
|---|
| [110d795] | 427 | int xhci_send_reset_device_command(xhci_hc_t *hc, xhci_cmd_t *cmd)
|
|---|
| [c058a388] | 428 | {
|
|---|
| 429 | assert(hc);
|
|---|
| [110d795] | 430 | assert(cmd);
|
|---|
| [c058a388] | 431 |
|
|---|
| [548c123] | 432 | xhci_trb_clean(&cmd->trb);
|
|---|
| [c058a388] | 433 |
|
|---|
| [548c123] | 434 | TRB_SET_TYPE(cmd->trb, XHCI_TRB_TYPE_RESET_DEVICE_CMD);
|
|---|
| 435 | TRB_SET_SLOT(cmd->trb, cmd->slot_id);
|
|---|
| [c9bec1c] | 436 |
|
|---|
| [548c123] | 437 | return enqueue_command(hc, cmd, 0, 0);
|
|---|
| [05aeee0e] | 438 | }
|
|---|
| 439 |
|
|---|
| [f9e7fe8] | 440 | int xhci_handle_command_completion(xhci_hc_t *hc, xhci_trb_t *trb)
|
|---|
| 441 | {
|
|---|
| [110d795] | 442 | // TODO: Update dequeue ptrs.
|
|---|
| [c058a388] | 443 | assert(hc);
|
|---|
| 444 | assert(trb);
|
|---|
| 445 |
|
|---|
| [5ac5eb1] | 446 | usb_log_debug("HC(%p) Command completed.", hc);
|
|---|
| [f9e7fe8] | 447 |
|
|---|
| [5ac5eb1] | 448 | int code;
|
|---|
| [2fa43d1] | 449 | uint64_t phys;
|
|---|
| [110d795] | 450 | xhci_cmd_t *command;
|
|---|
| [f711f06] | 451 |
|
|---|
| [1b78a7c1] | 452 | code = TRB_GET_CODE(*trb);
|
|---|
| 453 | phys = TRB_GET_PHYS(*trb);;
|
|---|
| [2fa43d1] | 454 | command = get_command(hc, phys);
|
|---|
| 455 | if (command == NULL) {
|
|---|
| 456 | // TODO: STOP & ABORT may not have command structs in the list!
|
|---|
| 457 | usb_log_error("No command struct for this completion event");
|
|---|
| 458 |
|
|---|
| 459 | if (code != XHCI_TRBC_SUCCESS)
|
|---|
| 460 | report_error(code);
|
|---|
| 461 |
|
|---|
| 462 | return EOK;
|
|---|
| 463 | }
|
|---|
| [110d795] | 464 |
|
|---|
| 465 | command->status = code;
|
|---|
| [1b78a7c1] | 466 | command->slot_id = TRB_GET_SLOT(*trb);
|
|---|
| [110d795] | 467 |
|
|---|
| [548c123] | 468 | usb_log_debug2("Completed command trb: %s", xhci_trb_str_type(TRB_TYPE(command->trb)));
|
|---|
| 469 | if (TRB_TYPE(command->trb) != XHCI_TRB_TYPE_NO_OP_CMD) {
|
|---|
| [665bf3c] | 470 | if (code != XHCI_TRBC_SUCCESS) {
|
|---|
| [4fa5342] | 471 | report_error(code);
|
|---|
| [548c123] | 472 | xhci_dump_trb(&command->trb);
|
|---|
| [665bf3c] | 473 | }
|
|---|
| 474 | }
|
|---|
| [c362127] | 475 |
|
|---|
| [548c123] | 476 | switch (TRB_TYPE(command->trb)) {
|
|---|
| [c362127] | 477 | case XHCI_TRB_TYPE_NO_OP_CMD:
|
|---|
| [9f5b613] | 478 | assert(code == XHCI_TRBC_TRB_ERROR);
|
|---|
| [110d795] | 479 | break;
|
|---|
| [c362127] | 480 | case XHCI_TRB_TYPE_ENABLE_SLOT_CMD:
|
|---|
| [110d795] | 481 | break;
|
|---|
| [5ac5eb1] | 482 | case XHCI_TRB_TYPE_DISABLE_SLOT_CMD:
|
|---|
| [110d795] | 483 | break;
|
|---|
| [8db42f7] | 484 | case XHCI_TRB_TYPE_ADDRESS_DEVICE_CMD:
|
|---|
| [110d795] | 485 | break;
|
|---|
| [665bf3c] | 486 | case XHCI_TRB_TYPE_CONFIGURE_ENDPOINT_CMD:
|
|---|
| [110d795] | 487 | break;
|
|---|
| [c9ce62ae] | 488 | case XHCI_TRB_TYPE_EVALUATE_CONTEXT_CMD:
|
|---|
| [110d795] | 489 | break;
|
|---|
| [05aeee0e] | 490 | case XHCI_TRB_TYPE_RESET_ENDPOINT_CMD:
|
|---|
| [110d795] | 491 | break;
|
|---|
| [05aeee0e] | 492 | case XHCI_TRB_TYPE_STOP_ENDPOINT_CMD:
|
|---|
| 493 | // Note: If the endpoint was in the middle of a transfer, then the xHC
|
|---|
| 494 | // will add a Transfer TRB before the Event TRB, research that and
|
|---|
| 495 | // handle it appropriately!
|
|---|
| [110d795] | 496 | break;
|
|---|
| [c058a388] | 497 | case XHCI_TRB_TYPE_RESET_DEVICE_CMD:
|
|---|
| [110d795] | 498 | break;
|
|---|
| [c362127] | 499 | default:
|
|---|
| [548c123] | 500 | usb_log_debug2("Unsupported command trb: %s", xhci_trb_str_type(TRB_TYPE(command->trb)));
|
|---|
| [110d795] | 501 |
|
|---|
| 502 | command->completed = true;
|
|---|
| [665bf3c] | 503 | return ENAK;
|
|---|
| [f711f06] | 504 | }
|
|---|
| [110d795] | 505 |
|
|---|
| [4688350b] | 506 | fibril_mutex_lock(&command->completed_mtx);
|
|---|
| [110d795] | 507 | command->completed = true;
|
|---|
| [4688350b] | 508 | fibril_condvar_broadcast(&command->completed_cv);
|
|---|
| 509 | fibril_mutex_unlock(&command->completed_mtx);
|
|---|
| 510 |
|
|---|
| [110d795] | 511 |
|
|---|
| [c4d4fa2] | 512 | if (!command->has_owner) {
|
|---|
| [eff60ca] | 513 | usb_log_debug2("Command has no owner, deallocating.");
|
|---|
| [110d795] | 514 | xhci_free_command(command);
|
|---|
| [c4d4fa2] | 515 | } else {
|
|---|
| [eff60ca] | 516 | usb_log_debug2("Command has owner, don't forget to deallocate!");
|
|---|
| [c4d4fa2] | 517 | }
|
|---|
| [110d795] | 518 |
|
|---|
| 519 | return EOK;
|
|---|
| [f9e7fe8] | 520 | }
|
|---|
| [c9c0e41] | 521 |
|
|---|
| 522 |
|
|---|
| 523 | /**
|
|---|
| 524 | * @}
|
|---|
| 525 | */
|
|---|