source: mainline/uspace/drv/bus/usb/uhci/uhci_batch.c@ 98cb0495

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 98cb0495 was 98cb0495, checked in by Jan Vesely <jano.vesely@…>, 13 years ago

Merge mainline changes.
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1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvusbuhcihc
29 * @{
30 */
31/** @file
32 * @brief UHCI driver USB transfer structure
33 */
34#include <errno.h>
35#include <str_error.h>
36#include <macros.h>
37
38#include <usb/usb.h>
39#include <usb/debug.h>
40
41#include "uhci_batch.h"
42#include "transfer_list.h"
43#include "hw_struct/transfer_descriptor.h"
44#include "utils/malloc32.h"
45
46#define DEFAULT_ERROR_COUNT 3
47
48/** Safely destructs uhci_transfer_batch_t structure.
49 *
50 * @param[in] uhci_batch Instance to destroy.
51 */
52static void uhci_transfer_batch_dispose(uhci_transfer_batch_t *uhci_batch)
53{
54 if (uhci_batch) {
55 usb_transfer_batch_destroy(uhci_batch->usb_batch);
56 free32(uhci_batch->device_buffer);
57 free(uhci_batch);
58 }
59}
60
61/** Finishes usb_transfer_batch and destroys the structure.
62 *
63 * @param[in] uhci_batch Instance to finish and destroy.
64 */
65void uhci_transfer_batch_finish_dispose(uhci_transfer_batch_t *uhci_batch)
66{
67 assert(uhci_batch);
68 assert(uhci_batch->usb_batch);
69 usb_transfer_batch_finish(uhci_batch->usb_batch,
70 uhci_transfer_batch_data_buffer(uhci_batch));
71 uhci_transfer_batch_dispose(uhci_batch);
72}
73
74/** Transfer batch setup table. */
75static void (*const batch_setup[])(uhci_transfer_batch_t*, usb_direction_t);
76
77/** Allocate memory and initialize internal data structure.
78 *
79 * @param[in] usb_batch Pointer to generic USB batch structure.
80 * @return Valid pointer if all structures were successfully created,
81 * NULL otherwise.
82 *
83 * Determines the number of needed transfer descriptors (TDs).
84 * Prepares a transport buffer (that is accessible by the hardware).
85 * Initializes parameters needed for the transfer and callback.
86 */
87uhci_transfer_batch_t * uhci_transfer_batch_get(usb_transfer_batch_t *usb_batch)
88{
89 assert((sizeof(td_t) % 16) == 0);
90#define CHECK_NULL_DISPOSE_RETURN(ptr, message...) \
91 if (ptr == NULL) { \
92 usb_log_error(message); \
93 uhci_transfer_batch_dispose(uhci_batch); \
94 return NULL; \
95 } else (void)0
96
97 uhci_transfer_batch_t *uhci_batch =
98 calloc(1, sizeof(uhci_transfer_batch_t));
99 CHECK_NULL_DISPOSE_RETURN(uhci_batch,
100 "Failed to allocate UHCI batch.\n");
101 link_initialize(&uhci_batch->link);
102 uhci_batch->td_count =
103 (usb_batch->buffer_size + usb_batch->ep->max_packet_size - 1)
104 / usb_batch->ep->max_packet_size;
105 if (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) {
106 uhci_batch->td_count += 2;
107 }
108
109 const size_t total_size = (sizeof(td_t) * uhci_batch->td_count)
110 + sizeof(qh_t) + usb_batch->setup_size + usb_batch->buffer_size;
111 uhci_batch->device_buffer = malloc32(total_size);
112 CHECK_NULL_DISPOSE_RETURN(uhci_batch->device_buffer,
113 "Failed to allocate UHCI buffer.\n");
114 bzero(uhci_batch->device_buffer, total_size);
115
116 uhci_batch->tds = uhci_batch->device_buffer;
117 uhci_batch->qh =
118 (uhci_batch->device_buffer + (sizeof(td_t) * uhci_batch->td_count));
119
120 qh_init(uhci_batch->qh);
121 qh_set_element_td(uhci_batch->qh, &uhci_batch->tds[0]);
122
123 void *dest =
124 uhci_batch->device_buffer + (sizeof(td_t) * uhci_batch->td_count)
125 + sizeof(qh_t);
126 /* Copy SETUP packet data to the device buffer */
127 memcpy(dest, usb_batch->setup_buffer, usb_batch->setup_size);
128 dest += usb_batch->setup_size;
129 /* Copy generic data unless they are provided by the device */
130 if (usb_batch->ep->direction != USB_DIRECTION_IN) {
131 memcpy(dest, usb_batch->buffer, usb_batch->buffer_size);
132 }
133 uhci_batch->usb_batch = usb_batch;
134 usb_log_debug2("Batch %p " USB_TRANSFER_BATCH_FMT
135 " memory structures ready.\n", usb_batch,
136 USB_TRANSFER_BATCH_ARGS(*usb_batch));
137
138 const usb_direction_t dir = usb_transfer_batch_direction(usb_batch);
139
140 assert(batch_setup[usb_batch->ep->transfer_type]);
141 batch_setup[usb_batch->ep->transfer_type](uhci_batch, dir);
142
143 return uhci_batch;
144}
145
146/** Check batch TDs for activity.
147 *
148 * @param[in] uhci_batch Batch structure to use.
149 * @return False, if there is an active TD, true otherwise.
150 *
151 * Walk all TDs. Stop with false if there is an active one (it is to be
152 * processed). Stop with true if an error is found. Return true if the last TD
153 * is reached.
154 */
155bool uhci_transfer_batch_is_complete(const uhci_transfer_batch_t *uhci_batch)
156{
157 assert(uhci_batch);
158 assert(uhci_batch->usb_batch);
159
160 usb_log_debug2("Batch %p " USB_TRANSFER_BATCH_FMT
161 " checking %zu transfer(s) for completion.\n",
162 uhci_batch->usb_batch,
163 USB_TRANSFER_BATCH_ARGS(*uhci_batch->usb_batch),
164 uhci_batch->td_count);
165 uhci_batch->usb_batch->transfered_size = 0;
166
167 for (size_t i = 0;i < uhci_batch->td_count; ++i) {
168 if (td_is_active(&uhci_batch->tds[i])) {
169 return false;
170 }
171
172 uhci_batch->usb_batch->error = td_status(&uhci_batch->tds[i]);
173 if (uhci_batch->usb_batch->error != EOK) {
174 assert(uhci_batch->usb_batch->ep != NULL);
175
176 usb_log_debug("Batch %p found error TD(%zu->%p):%"
177 PRIx32 ".\n", uhci_batch->usb_batch, i,
178 &uhci_batch->tds[i], uhci_batch->tds[i].status);
179 td_print_status(&uhci_batch->tds[i]);
180
181 endpoint_toggle_set(uhci_batch->usb_batch->ep,
182 td_toggle(&uhci_batch->tds[i]));
183 if (i > 0)
184 goto substract_ret;
185 return true;
186 }
187
188 uhci_batch->usb_batch->transfered_size
189 += td_act_size(&uhci_batch->tds[i]);
190 if (td_is_short(&uhci_batch->tds[i]))
191 goto substract_ret;
192 }
193substract_ret:
194 uhci_batch->usb_batch->transfered_size
195 -= uhci_batch->usb_batch->setup_size;
196 return true;
197}
198
199/** Direction to pid conversion table */
200static const usb_packet_id direction_pids[] = {
201 [USB_DIRECTION_IN] = USB_PID_IN,
202 [USB_DIRECTION_OUT] = USB_PID_OUT,
203};
204
205/** Prepare generic data transfer
206 *
207 * @param[in] uhci_batch Batch structure to use.
208 * @param[in] dir Communication direction.
209 *
210 * Transactions with alternating toggle bit and supplied pid value.
211 * The last transfer is marked with IOC flag.
212 */
213static void batch_data(uhci_transfer_batch_t *uhci_batch, usb_direction_t dir)
214{
215 assert(uhci_batch);
216 assert(uhci_batch->usb_batch);
217 assert(uhci_batch->usb_batch->ep);
218 assert(dir == USB_DIRECTION_OUT || dir == USB_DIRECTION_IN);
219
220
221 const usb_packet_id pid = direction_pids[dir];
222 const bool low_speed =
223 uhci_batch->usb_batch->ep->speed == USB_SPEED_LOW;
224 const size_t mps = uhci_batch->usb_batch->ep->max_packet_size;
225 const usb_target_t target = {{
226 uhci_batch->usb_batch->ep->address,
227 uhci_batch->usb_batch->ep->endpoint }};
228
229 int toggle = endpoint_toggle_get(uhci_batch->usb_batch->ep);
230 assert(toggle == 0 || toggle == 1);
231
232 size_t td = 0;
233 size_t remain_size = uhci_batch->usb_batch->buffer_size;
234 char *buffer = uhci_transfer_batch_data_buffer(uhci_batch);
235
236 while (remain_size > 0) {
237 const size_t packet_size = min(remain_size, mps);
238
239 const td_t *next_td = (td + 1 < uhci_batch->td_count)
240 ? &uhci_batch->tds[td + 1] : NULL;
241
242 assert(td < uhci_batch->td_count);
243 td_init(
244 &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, packet_size,
245 toggle, false, low_speed, target, pid, buffer, next_td);
246
247 ++td;
248 toggle = 1 - toggle;
249 buffer += packet_size;
250 remain_size -= packet_size;
251 }
252 td_set_ioc(&uhci_batch->tds[td - 1]);
253 endpoint_toggle_set(uhci_batch->usb_batch->ep, toggle);
254 usb_log_debug2(
255 "Batch %p %s %s " USB_TRANSFER_BATCH_FMT " initialized.\n", \
256 uhci_batch->usb_batch,
257 usb_str_transfer_type(uhci_batch->usb_batch->ep->transfer_type),
258 usb_str_direction(uhci_batch->usb_batch->ep->direction),
259 USB_TRANSFER_BATCH_ARGS(*uhci_batch->usb_batch));
260}
261
262/** Prepare generic control transfer
263 *
264 * @param[in] uhci_batch Batch structure to use.
265 * @param[in] dir Communication direction.
266 *
267 * Setup stage with toggle 0 and USB_PID_SETUP.
268 * Data stage with alternating toggle and pid determined by the communication
269 * direction.
270 * Status stage with toggle 1 and pid determined by the communication direction.
271 * The last transfer is marked with IOC.
272 */
273static void batch_control(uhci_transfer_batch_t *uhci_batch, usb_direction_t dir)
274{
275 assert(uhci_batch);
276 assert(uhci_batch->usb_batch);
277 assert(uhci_batch->usb_batch->ep);
278 assert(dir == USB_DIRECTION_OUT || dir == USB_DIRECTION_IN);
279 assert(uhci_batch->td_count >= 2);
280 static const usb_packet_id status_stage_pids[] = {
281 [USB_DIRECTION_IN] = USB_PID_OUT,
282 [USB_DIRECTION_OUT] = USB_PID_IN,
283 };
284
285 const usb_packet_id data_stage_pid = direction_pids[dir];
286 const usb_packet_id status_stage_pid = status_stage_pids[dir];
287 const bool low_speed =
288 uhci_batch->usb_batch->ep->speed == USB_SPEED_LOW;
289 const size_t mps = uhci_batch->usb_batch->ep->max_packet_size;
290 const usb_target_t target = {{
291 uhci_batch->usb_batch->ep->address,
292 uhci_batch->usb_batch->ep->endpoint }};
293
294 /* setup stage */
295 td_init(
296 &uhci_batch->tds[0], DEFAULT_ERROR_COUNT,
297 uhci_batch->usb_batch->setup_size, 0, false,
298 low_speed, target, USB_PID_SETUP,
299 uhci_transfer_batch_setup_buffer(uhci_batch), &uhci_batch->tds[1]);
300
301 /* data stage */
302 size_t td = 1;
303 unsigned toggle = 1;
304 size_t remain_size = uhci_batch->usb_batch->buffer_size;
305 char *buffer = uhci_transfer_batch_data_buffer(uhci_batch);
306
307 while (remain_size > 0) {
308 const size_t packet_size = min(remain_size, mps);
309
310 td_init(
311 &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, packet_size,
312 toggle, false, low_speed, target, data_stage_pid,
313 buffer, &uhci_batch->tds[td + 1]);
314
315 ++td;
316 toggle = 1 - toggle;
317 buffer += packet_size;
318 remain_size -= packet_size;
319 assert(td < uhci_batch->td_count);
320 }
321
322 /* status stage */
323 assert(td == uhci_batch->td_count - 1);
324
325 td_init(
326 &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, 0, 1, false, low_speed,
327 target, status_stage_pid, NULL, NULL);
328 td_set_ioc(&uhci_batch->tds[td]);
329
330 usb_log_debug2("Control last TD status: %x.\n",
331 uhci_batch->tds[td].status);
332}
333
334static void (*const batch_setup[])(uhci_transfer_batch_t*, usb_direction_t) =
335{
336 [USB_TRANSFER_CONTROL] = batch_control,
337 [USB_TRANSFER_BULK] = batch_data,
338 [USB_TRANSFER_INTERRUPT] = batch_data,
339 [USB_TRANSFER_ISOCHRONOUS] = NULL,
340};
341/**
342 * @}
343 */
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