source: mainline/uspace/drv/bus/usb/uhci/uhci_batch.c

Last change on this file was 0a520db, checked in by Jiří Zárevúcky <zarevucky.jiri@…>, 6 years ago

Change static_assert to its standard definition

  • Property mode set to 100644
File size: 10.2 KB
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1/*
2 * Copyright (c) 2011 Jan Vesely
3 * Copyright (c) 2018 Ondrej Hlavaty
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30/** @addtogroup drvusbuhci
31 * @{
32 */
33/** @file
34 * @brief UHCI driver USB transfer structure
35 */
36
37#include <assert.h>
38#include <errno.h>
39#include <macros.h>
40#include <mem.h>
41#include <stdlib.h>
42
43#include <usb/usb.h>
44#include <usb/debug.h>
45#include <usb/host/endpoint.h>
46#include <usb/host/utils/malloc32.h>
47
48#include "uhci_batch.h"
49#include "hc.h"
50#include "hw_struct/transfer_descriptor.h"
51
52#define DEFAULT_ERROR_COUNT 3
53
54/** Transfer batch setup table. */
55static void (*const batch_setup[])(uhci_transfer_batch_t *);
56
57/** Destroys uhci_transfer_batch_t structure.
58 *
59 * @param[in] uhci_batch Instance to destroy.
60 */
61void uhci_transfer_batch_destroy(uhci_transfer_batch_t *uhci_batch)
62{
63 assert(uhci_batch);
64 dma_buffer_free(&uhci_batch->uhci_dma_buffer);
65 free(uhci_batch);
66}
67
68/** Allocate memory and initialize internal data structure.
69 *
70 * @param[in] usb_batch Pointer to generic USB batch structure.
71 * @return Valid pointer if all structures were successfully created,
72 * NULL otherwise.
73 */
74uhci_transfer_batch_t *uhci_transfer_batch_create(endpoint_t *ep)
75{
76 uhci_transfer_batch_t *uhci_batch =
77 calloc(1, sizeof(uhci_transfer_batch_t));
78 if (!uhci_batch) {
79 usb_log_error("Failed to allocate UHCI batch.");
80 return NULL;
81 }
82
83 usb_transfer_batch_init(&uhci_batch->base, ep);
84
85 link_initialize(&uhci_batch->link);
86 return uhci_batch;
87}
88
89/*
90 * Prepares batch for committing.
91 *
92 * Determines the number of needed transfer descriptors (TDs).
93 * Prepares a transport buffer (that is accessible by the hardware).
94 * Initializes parameters needed for the transfer and callback.
95 */
96int uhci_transfer_batch_prepare(uhci_transfer_batch_t *uhci_batch)
97{
98 static_assert((sizeof(td_t) % 16) == 0, "");
99
100 usb_transfer_batch_t *usb_batch = &uhci_batch->base;
101
102 uhci_batch->td_count = (usb_batch->size + usb_batch->ep->max_packet_size - 1) /
103 usb_batch->ep->max_packet_size;
104
105 if (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) {
106 uhci_batch->td_count += 2;
107 }
108
109 const size_t setup_size = (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) ?
110 USB_SETUP_PACKET_SIZE :
111 0;
112
113 const size_t total_size = (sizeof(td_t) * uhci_batch->td_count) +
114 sizeof(qh_t) + setup_size;
115
116 if (dma_buffer_alloc(&uhci_batch->uhci_dma_buffer, total_size)) {
117 usb_log_error("Failed to allocate UHCI buffer.");
118 return ENOMEM;
119 }
120 memset(uhci_batch->uhci_dma_buffer.virt, 0, total_size);
121
122 uhci_batch->tds = uhci_batch->uhci_dma_buffer.virt;
123 uhci_batch->qh = (qh_t *) &uhci_batch->tds[uhci_batch->td_count];
124
125 qh_init(uhci_batch->qh);
126 qh_set_element_td(uhci_batch->qh, &uhci_batch->tds[0]);
127
128 void *setup_buffer = uhci_transfer_batch_setup_buffer(uhci_batch);
129 assert(setup_buffer == (void *) (uhci_batch->qh + 1));
130 /* Copy SETUP packet data to the device buffer */
131 memcpy(setup_buffer, usb_batch->setup.buffer, setup_size);
132
133 usb_log_debug2("Batch %p " USB_TRANSFER_BATCH_FMT
134 " memory structures ready.", usb_batch,
135 USB_TRANSFER_BATCH_ARGS(*usb_batch));
136
137 assert(batch_setup[usb_batch->ep->transfer_type]);
138 batch_setup[usb_batch->ep->transfer_type](uhci_batch);
139
140 return EOK;
141}
142
143/** Check batch TDs for activity.
144 *
145 * @param[in] uhci_batch Batch structure to use.
146 * @return False, if there is an active TD, true otherwise.
147 *
148 * Walk all TDs. Stop with false if there is an active one (it is to be
149 * processed). Stop with true if an error is found. Return true if the last TD
150 * is reached.
151 */
152bool uhci_transfer_batch_check_completed(uhci_transfer_batch_t *uhci_batch)
153{
154 assert(uhci_batch);
155 usb_transfer_batch_t *batch = &uhci_batch->base;
156
157 usb_log_debug2("Batch %p " USB_TRANSFER_BATCH_FMT
158 " checking %zu transfer(s) for completion.",
159 uhci_batch, USB_TRANSFER_BATCH_ARGS(*batch),
160 uhci_batch->td_count);
161 batch->transferred_size = 0;
162
163 uhci_endpoint_t *uhci_ep = (uhci_endpoint_t *) batch->ep;
164
165 for (size_t i = 0; i < uhci_batch->td_count; ++i) {
166 if (td_is_active(&uhci_batch->tds[i])) {
167 return false;
168 }
169
170 batch->error = td_status(&uhci_batch->tds[i]);
171 if (batch->error != EOK) {
172 assert(batch->ep != NULL);
173
174 usb_log_debug("Batch %p found error TD(%zu->%p):%"
175 PRIx32 ".", uhci_batch, i,
176 &uhci_batch->tds[i], uhci_batch->tds[i].status);
177 td_print_status(&uhci_batch->tds[i]);
178
179 uhci_ep->toggle = td_toggle(&uhci_batch->tds[i]);
180 goto substract_ret;
181 }
182
183 batch->transferred_size +=
184 td_act_size(&uhci_batch->tds[i]);
185 if (td_is_short(&uhci_batch->tds[i]))
186 goto substract_ret;
187 }
188substract_ret:
189 if (batch->transferred_size > 0 && batch->ep->transfer_type == USB_TRANSFER_CONTROL) {
190 assert(batch->transferred_size >= USB_SETUP_PACKET_SIZE);
191 batch->transferred_size -= USB_SETUP_PACKET_SIZE;
192 }
193
194 assert(batch->transferred_size <= batch->size);
195
196 return true;
197}
198
199/** Direction to pid conversion table */
200static const usb_packet_id direction_pids[] = {
201 [USB_DIRECTION_IN] = USB_PID_IN,
202 [USB_DIRECTION_OUT] = USB_PID_OUT,
203};
204
205/** Prepare generic data transfer
206 *
207 * @param[in] uhci_batch Batch structure to use.
208 * @param[in] dir Communication direction.
209 *
210 * Transactions with alternating toggle bit and supplied pid value.
211 * The last transfer is marked with IOC flag.
212 */
213static void batch_data(uhci_transfer_batch_t *uhci_batch)
214{
215 assert(uhci_batch);
216
217 usb_direction_t dir = uhci_batch->base.dir;
218 assert(dir == USB_DIRECTION_OUT || dir == USB_DIRECTION_IN);
219
220 const usb_packet_id pid = direction_pids[dir];
221 const bool low_speed =
222 uhci_batch->base.ep->device->speed == USB_SPEED_LOW;
223 const size_t mps = uhci_batch->base.ep->max_packet_size;
224
225 uhci_endpoint_t *uhci_ep = (uhci_endpoint_t *) uhci_batch->base.ep;
226
227 int toggle = uhci_ep->toggle;
228 assert(toggle == 0 || toggle == 1);
229
230 size_t td = 0;
231 size_t remain_size = uhci_batch->base.size;
232 char *buffer = uhci_transfer_batch_data_buffer(uhci_batch);
233
234 while (remain_size > 0) {
235 const size_t packet_size = min(remain_size, mps);
236
237 const td_t *next_td = (td + 1 < uhci_batch->td_count) ?
238 &uhci_batch->tds[td + 1] : NULL;
239
240 assert(td < uhci_batch->td_count);
241 td_init(
242 &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, packet_size,
243 toggle, false, low_speed, uhci_batch->base.target, pid, buffer, next_td);
244
245 ++td;
246 toggle = 1 - toggle;
247 buffer += packet_size;
248 remain_size -= packet_size;
249 }
250 td_set_ioc(&uhci_batch->tds[td - 1]);
251 uhci_ep->toggle = toggle;
252 usb_log_debug2(
253 "Batch %p %s %s " USB_TRANSFER_BATCH_FMT " initialized.",
254 uhci_batch,
255 usb_str_transfer_type(uhci_batch->base.ep->transfer_type),
256 usb_str_direction(uhci_batch->base.ep->direction),
257 USB_TRANSFER_BATCH_ARGS(uhci_batch->base));
258}
259
260/** Prepare generic control transfer
261 *
262 * @param[in] uhci_batch Batch structure to use.
263 * @param[in] dir Communication direction.
264 *
265 * Setup stage with toggle 0 and USB_PID_SETUP.
266 * Data stage with alternating toggle and pid determined by the communication
267 * direction.
268 * Status stage with toggle 1 and pid determined by the communication direction.
269 * The last transfer is marked with IOC.
270 */
271static void batch_control(uhci_transfer_batch_t *uhci_batch)
272{
273 assert(uhci_batch);
274
275 usb_direction_t dir = uhci_batch->base.dir;
276 assert(dir == USB_DIRECTION_OUT || dir == USB_DIRECTION_IN);
277 assert(uhci_batch->td_count >= 2);
278 static const usb_packet_id status_stage_pids[] = {
279 [USB_DIRECTION_IN] = USB_PID_OUT,
280 [USB_DIRECTION_OUT] = USB_PID_IN,
281 };
282
283 const usb_packet_id data_stage_pid = direction_pids[dir];
284 const usb_packet_id status_stage_pid = status_stage_pids[dir];
285 const bool low_speed =
286 uhci_batch->base.ep->device->speed == USB_SPEED_LOW;
287 const size_t mps = uhci_batch->base.ep->max_packet_size;
288 const usb_target_t target = uhci_batch->base.target;
289
290 /* setup stage */
291 td_init(
292 &uhci_batch->tds[0], DEFAULT_ERROR_COUNT,
293 USB_SETUP_PACKET_SIZE, 0, false,
294 low_speed, target, USB_PID_SETUP,
295 uhci_transfer_batch_setup_buffer(uhci_batch), &uhci_batch->tds[1]);
296
297 /* data stage */
298 size_t td = 1;
299 unsigned toggle = 1;
300 size_t remain_size = uhci_batch->base.size;
301 char *buffer = uhci_transfer_batch_data_buffer(uhci_batch);
302
303 while (remain_size > 0) {
304 const size_t packet_size = min(remain_size, mps);
305
306 td_init(
307 &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, packet_size,
308 toggle, false, low_speed, target, data_stage_pid,
309 buffer, &uhci_batch->tds[td + 1]);
310
311 ++td;
312 toggle = 1 - toggle;
313 buffer += packet_size;
314 remain_size -= packet_size;
315 assert(td < uhci_batch->td_count);
316 }
317
318 /* status stage */
319 assert(td == uhci_batch->td_count - 1);
320
321 td_init(
322 &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, 0, 1, false, low_speed,
323 target, status_stage_pid, NULL, NULL);
324 td_set_ioc(&uhci_batch->tds[td]);
325
326 usb_log_debug2("Control last TD status: %x.",
327 uhci_batch->tds[td].status);
328}
329
330static void (*const batch_setup[])(uhci_transfer_batch_t *) =
331 {
332 [USB_TRANSFER_CONTROL] = batch_control,
333 [USB_TRANSFER_BULK] = batch_data,
334 [USB_TRANSFER_INTERRUPT] = batch_data,
335 [USB_TRANSFER_ISOCHRONOUS] = NULL,
336};
337/**
338 * @}
339 */
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