source: mainline/uspace/drv/bus/usb/uhci/uhci_batch.c@ e67c50a

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since e67c50a was db51a6a6, checked in by Ondřej Hlavatý <aearsis@…>, 8 years ago

typo: transferred is spelled with two r

  • Property mode set to 100644
File size: 10.6 KB
RevLine 
[4192d3d6]1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
[58563585]28
[17ceb72]29/** @addtogroup drvusbuhcihc
[4192d3d6]30 * @{
31 */
32/** @file
[910ca3f]33 * @brief UHCI driver USB transfer structure
[4192d3d6]34 */
[8064c2f6]35
36#include <assert.h>
[4192d3d6]37#include <errno.h>
[3f162ab]38#include <macros.h>
[8064c2f6]39#include <mem.h>
40#include <stdlib.h>
[4192d3d6]41
[bdc8ab1]42#include <usb/usb.h>
[4192d3d6]43#include <usb/debug.h>
[8064c2f6]44#include <usb/host/endpoint.h>
[8fc61c8]45#include <usb/host/utils/malloc32.h>
[4192d3d6]46
[07f49ae]47#include "uhci_batch.h"
[c6f82e5]48#include "hc.h"
[87644b4]49#include "hw_struct/transfer_descriptor.h"
[4192d3d6]50
51#define DEFAULT_ERROR_COUNT 3
[3afb758]52
[5fd9c30]53/** Transfer batch setup table. */
54static void (*const batch_setup[])(uhci_transfer_batch_t*);
[76fbd9a]55
[5fd9c30]56/** Destroys uhci_transfer_batch_t structure.
[28d9c95]57 *
[5fd9c30]58 * @param[in] uhci_batch Instance to destroy.
[28d9c95]59 */
[5fd9c30]60void uhci_transfer_batch_destroy(uhci_transfer_batch_t *uhci_batch)
[2cc6e97]61{
[b991d37]62 assert(uhci_batch);
[5fd9c30]63 free32(uhci_batch->device_buffer);
64 free(uhci_batch);
[2cc6e97]65}
[76fbd9a]66
[17ceb72]67/** Allocate memory and initialize internal data structure.
[a7e2f0d]68 *
[f7ac3f3]69 * @param[in] usb_batch Pointer to generic USB batch structure.
[f706355]70 * @return Valid pointer if all structures were successfully created,
[17ceb72]71 * NULL otherwise.
[5fd9c30]72 */
73uhci_transfer_batch_t * uhci_transfer_batch_create(endpoint_t *ep)
74{
75 uhci_transfer_batch_t *uhci_batch =
76 calloc(1, sizeof(uhci_transfer_batch_t));
77 if (!uhci_batch) {
[a1732929]78 usb_log_error("Failed to allocate UHCI batch.");
[5fd9c30]79 return NULL;
80 }
81
82 usb_transfer_batch_init(&uhci_batch->base, ep);
83
84 link_initialize(&uhci_batch->link);
85 return uhci_batch;
86}
87
88/* Prepares batch for commiting.
[17ceb72]89 *
[508a0ca]90 * Determines the number of needed transfer descriptors (TDs).
91 * Prepares a transport buffer (that is accessible by the hardware).
[910ca3f]92 * Initializes parameters needed for the transfer and callback.
[a7e2f0d]93 */
[5fd9c30]94int uhci_transfer_batch_prepare(uhci_transfer_batch_t *uhci_batch)
[4192d3d6]95{
[1cf26ab]96 static_assert((sizeof(td_t) % 16) == 0);
[2ab6875]97
[5fd9c30]98 usb_transfer_batch_t *usb_batch = &uhci_batch->base;
99
100 uhci_batch->td_count = (usb_batch->buffer_size + usb_batch->ep->max_packet_size - 1)
101 / usb_batch->ep->max_packet_size;
102
[b991d37]103 if (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) {
104 uhci_batch->td_count += 2;
[7dd3318]105 }
106
[17873ac7]107 const size_t setup_size = (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL)
[5fd9c30]108 ? USB_SETUP_PACKET_SIZE
109 : 0;
110
[b991d37]111 const size_t total_size = (sizeof(td_t) * uhci_batch->td_count)
[5fd9c30]112 + sizeof(qh_t) + setup_size + usb_batch->buffer_size;
[b991d37]113 uhci_batch->device_buffer = malloc32(total_size);
[5fd9c30]114 if (!uhci_batch->device_buffer) {
[a1732929]115 usb_log_error("Failed to allocate UHCI buffer.");
[5fd9c30]116 return ENOMEM;
117 }
[acdb5bac]118 memset(uhci_batch->device_buffer, 0, total_size);
[4192d3d6]119
[b991d37]120 uhci_batch->tds = uhci_batch->device_buffer;
121 uhci_batch->qh =
122 (uhci_batch->device_buffer + (sizeof(td_t) * uhci_batch->td_count));
[2cc6e97]123
[b991d37]124 qh_init(uhci_batch->qh);
125 qh_set_element_td(uhci_batch->qh, &uhci_batch->tds[0]);
[2cc6e97]126
[b991d37]127 void *dest =
128 uhci_batch->device_buffer + (sizeof(td_t) * uhci_batch->td_count)
[2cc6e97]129 + sizeof(qh_t);
[b991d37]130 /* Copy SETUP packet data to the device buffer */
[5fd9c30]131 memcpy(dest, usb_batch->setup.buffer, setup_size);
132 dest += setup_size;
[5d915b7]133 /* Copy generic data unless they are provided by the device */
[a312d8f]134 if (usb_batch->dir != USB_DIRECTION_IN) {
[b991d37]135 memcpy(dest, usb_batch->buffer, usb_batch->buffer_size);
136 }
[c4fb5ecd]137 usb_log_debug2("Batch %p " USB_TRANSFER_BATCH_FMT
[a1732929]138 " memory structures ready.", usb_batch,
[b991d37]139 USB_TRANSFER_BATCH_ARGS(*usb_batch));
[5d915b7]140
[790318e]141 assert(batch_setup[usb_batch->ep->transfer_type]);
[5fd9c30]142 batch_setup[usb_batch->ep->transfer_type](uhci_batch);
[b991d37]143
[5fd9c30]144 return EOK;
[4192d3d6]145}
[76fbd9a]146
[17ceb72]147/** Check batch TDs for activity.
[a7e2f0d]148 *
[5f57929]149 * @param[in] uhci_batch Batch structure to use.
[a7e2f0d]150 * @return False, if there is an active TD, true otherwise.
[17ceb72]151 *
152 * Walk all TDs. Stop with false if there is an active one (it is to be
[910ca3f]153 * processed). Stop with true if an error is found. Return true if the last TD
[17ceb72]154 * is reached.
[a7e2f0d]155 */
[5fd9c30]156bool uhci_transfer_batch_check_completed(uhci_transfer_batch_t *uhci_batch)
[4192d3d6]157{
[b991d37]158 assert(uhci_batch);
[17873ac7]159 usb_transfer_batch_t *batch = &uhci_batch->base;
[81dce9f]160
[b991d37]161 usb_log_debug2("Batch %p " USB_TRANSFER_BATCH_FMT
[a1732929]162 " checking %zu transfer(s) for completion.",
[17873ac7]163 uhci_batch, USB_TRANSFER_BATCH_ARGS(*batch),
[b991d37]164 uhci_batch->td_count);
[db51a6a6]165 batch->transferred_size = 0;
[75f9dcd]166
[c6f82e5]167 uhci_endpoint_t *uhci_ep = (uhci_endpoint_t *) batch->ep;
168
[75f9dcd]169 for (size_t i = 0;i < uhci_batch->td_count; ++i) {
[b991d37]170 if (td_is_active(&uhci_batch->tds[i])) {
[7dd3318]171 return false;
[600733e]172 }
[c5b93dc]173
[17873ac7]174 batch->error = td_status(&uhci_batch->tds[i]);
175 if (batch->error != EOK) {
176 assert(batch->ep != NULL);
[b991d37]177
[b64fbc9]178 usb_log_debug("Batch %p found error TD(%zu->%p):%"
[a1732929]179 PRIx32 ".", uhci_batch, i,
[b64fbc9]180 &uhci_batch->tds[i], uhci_batch->tds[i].status);
[b991d37]181 td_print_status(&uhci_batch->tds[i]);
[feb10c88]182
[c6f82e5]183 uhci_ep->toggle = td_toggle(&uhci_batch->tds[i]);
[2755a622]184 goto substract_ret;
[7dd3318]185 }
[c5b93dc]186
[db51a6a6]187 batch->transferred_size
[b991d37]188 += td_act_size(&uhci_batch->tds[i]);
189 if (td_is_short(&uhci_batch->tds[i]))
[c5b93dc]190 goto substract_ret;
[4192d3d6]191 }
[c5b93dc]192substract_ret:
[db51a6a6]193 if (batch->transferred_size > 0 && batch->ep->transfer_type == USB_TRANSFER_CONTROL) {
194 assert(batch->transferred_size >= USB_SETUP_PACKET_SIZE);
195 batch->transferred_size -= USB_SETUP_PACKET_SIZE;
[2755a622]196 }
[17873ac7]197
198 if (batch->dir == USB_DIRECTION_IN) {
[db51a6a6]199 assert(batch->transferred_size <= batch->buffer_size);
[17873ac7]200 memcpy(batch->buffer,
201 uhci_transfer_batch_data_buffer(uhci_batch),
[db51a6a6]202 batch->transferred_size);
[17873ac7]203 }
204
[7dd3318]205 return true;
[4192d3d6]206}
[76fbd9a]207
[f7ac3f3]208/** Direction to pid conversion table */
[25d224c6]209static const usb_packet_id direction_pids[] = {
210 [USB_DIRECTION_IN] = USB_PID_IN,
211 [USB_DIRECTION_OUT] = USB_PID_OUT,
212};
[76fbd9a]213
[910ca3f]214/** Prepare generic data transfer
[a7e2f0d]215 *
[5f57929]216 * @param[in] uhci_batch Batch structure to use.
[25d224c6]217 * @param[in] dir Communication direction.
[17ceb72]218 *
[910ca3f]219 * Transactions with alternating toggle bit and supplied pid value.
[20a1e76]220 * The last transfer is marked with IOC flag.
[a7e2f0d]221 */
[5fd9c30]222static void batch_data(uhci_transfer_batch_t *uhci_batch)
[0e06a14]223{
[b991d37]224 assert(uhci_batch);
[5fd9c30]225
226 usb_direction_t dir = uhci_batch->base.dir;
[25d224c6]227 assert(dir == USB_DIRECTION_OUT || dir == USB_DIRECTION_IN);
[5d915b7]228
[9a790ad1]229
[25d224c6]230 const usb_packet_id pid = direction_pids[dir];
[b991d37]231 const bool low_speed =
[888238e9]232 uhci_batch->base.ep->device->speed == USB_SPEED_LOW;
[5fd9c30]233 const size_t mps = uhci_batch->base.ep->max_packet_size;
[b991d37]234
[c6f82e5]235 uhci_endpoint_t *uhci_ep = (uhci_endpoint_t *) uhci_batch->base.ep;
236
237 int toggle = uhci_ep->toggle;
[3e37964]238 assert(toggle == 0 || toggle == 1);
[0e06a14]239
[508a0ca]240 size_t td = 0;
[5fd9c30]241 size_t remain_size = uhci_batch->base.buffer_size;
[b991d37]242 char *buffer = uhci_transfer_batch_data_buffer(uhci_batch);
243
[0e06a14]244 while (remain_size > 0) {
[3f162ab]245 const size_t packet_size = min(remain_size, mps);
[c8dd5b1]246
[b991d37]247 const td_t *next_td = (td + 1 < uhci_batch->td_count)
248 ? &uhci_batch->tds[td + 1] : NULL;
[30a4301]249
[b991d37]250 assert(td < uhci_batch->td_count);
[bcaefe3]251 td_init(
[b991d37]252 &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, packet_size,
[a5b3de6]253 toggle, false, low_speed, uhci_batch->base.target, pid, buffer, next_td);
[bcaefe3]254
[910ca3f]255 ++td;
[bcaefe3]256 toggle = 1 - toggle;
[910ca3f]257 buffer += packet_size;
[0e06a14]258 remain_size -= packet_size;
259 }
[b991d37]260 td_set_ioc(&uhci_batch->tds[td - 1]);
[c6f82e5]261 uhci_ep->toggle = toggle;
[5f57929]262 usb_log_debug2(
[a1732929]263 "Batch %p %s %s " USB_TRANSFER_BATCH_FMT " initialized.", \
[58ac3ec]264 uhci_batch,
[5fd9c30]265 usb_str_transfer_type(uhci_batch->base.ep->transfer_type),
266 usb_str_direction(uhci_batch->base.ep->direction),
[58ac3ec]267 USB_TRANSFER_BATCH_ARGS(uhci_batch->base));
[4192d3d6]268}
[76fbd9a]269
[910ca3f]270/** Prepare generic control transfer
[a7e2f0d]271 *
[5f57929]272 * @param[in] uhci_batch Batch structure to use.
[25d224c6]273 * @param[in] dir Communication direction.
[17ceb72]274 *
275 * Setup stage with toggle 0 and USB_PID_SETUP.
[25d224c6]276 * Data stage with alternating toggle and pid determined by the communication
277 * direction.
278 * Status stage with toggle 1 and pid determined by the communication direction.
[20a1e76]279 * The last transfer is marked with IOC.
[a7e2f0d]280 */
[5fd9c30]281static void batch_control(uhci_transfer_batch_t *uhci_batch)
[bdc8ab1]282{
[b991d37]283 assert(uhci_batch);
[5fd9c30]284
285 usb_direction_t dir = uhci_batch->base.dir;
[25d224c6]286 assert(dir == USB_DIRECTION_OUT || dir == USB_DIRECTION_IN);
[b991d37]287 assert(uhci_batch->td_count >= 2);
[25d224c6]288 static const usb_packet_id status_stage_pids[] = {
289 [USB_DIRECTION_IN] = USB_PID_OUT,
290 [USB_DIRECTION_OUT] = USB_PID_IN,
291 };
[b991d37]292
[25d224c6]293 const usb_packet_id data_stage_pid = direction_pids[dir];
294 const usb_packet_id status_stage_pid = status_stage_pids[dir];
[b991d37]295 const bool low_speed =
[888238e9]296 uhci_batch->base.ep->device->speed == USB_SPEED_LOW;
[5fd9c30]297 const size_t mps = uhci_batch->base.ep->max_packet_size;
[a5b3de6]298 const usb_target_t target = uhci_batch->base.target;
[d017cea]299
[bdc8ab1]300 /* setup stage */
[81dce9f]301 td_init(
[b991d37]302 &uhci_batch->tds[0], DEFAULT_ERROR_COUNT,
[5fd9c30]303 USB_SETUP_PACKET_SIZE, 0, false,
[b991d37]304 low_speed, target, USB_PID_SETUP,
305 uhci_transfer_batch_setup_buffer(uhci_batch), &uhci_batch->tds[1]);
[bdc8ab1]306
307 /* data stage */
[508a0ca]308 size_t td = 1;
[910ca3f]309 unsigned toggle = 1;
[5fd9c30]310 size_t remain_size = uhci_batch->base.buffer_size;
[b991d37]311 char *buffer = uhci_transfer_batch_data_buffer(uhci_batch);
312
[bdc8ab1]313 while (remain_size > 0) {
[3f162ab]314 const size_t packet_size = min(remain_size, mps);
[bdc8ab1]315
[bcaefe3]316 td_init(
[b991d37]317 &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, packet_size,
318 toggle, false, low_speed, target, data_stage_pid,
319 buffer, &uhci_batch->tds[td + 1]);
[bdc8ab1]320
[508a0ca]321 ++td;
[910ca3f]322 toggle = 1 - toggle;
323 buffer += packet_size;
[bdc8ab1]324 remain_size -= packet_size;
[b991d37]325 assert(td < uhci_batch->td_count);
[bdc8ab1]326 }
327
328 /* status stage */
[b991d37]329 assert(td == uhci_batch->td_count - 1);
[4192d3d6]330
[81dce9f]331 td_init(
[b991d37]332 &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, 0, 1, false, low_speed,
333 target, status_stage_pid, NULL, NULL);
334 td_set_ioc(&uhci_batch->tds[td]);
[7dd3318]335
[a1732929]336 usb_log_debug2("Control last TD status: %x.",
[b991d37]337 uhci_batch->tds[td].status);
[4192d3d6]338}
[76fbd9a]339
[5fd9c30]340static void (*const batch_setup[])(uhci_transfer_batch_t*) =
[b991d37]341{
[790318e]342 [USB_TRANSFER_CONTROL] = batch_control,
343 [USB_TRANSFER_BULK] = batch_data,
344 [USB_TRANSFER_INTERRUPT] = batch_data,
345 [USB_TRANSFER_ISOCHRONOUS] = NULL,
[b991d37]346};
[4192d3d6]347/**
348 * @}
349 */
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