source: mainline/uspace/drv/bus/usb/uhci/uhci_batch.c@ d8d100c

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since d8d100c was acdb5bac, checked in by Jiri Svoboda <jiri@…>, 12 years ago

Replace usage of bzero() with C standard memset().

  • Property mode set to 100644
File size: 11.1 KB
RevLine 
[4192d3d6]1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
[17ceb72]28/** @addtogroup drvusbuhcihc
[4192d3d6]29 * @{
30 */
31/** @file
[910ca3f]32 * @brief UHCI driver USB transfer structure
[4192d3d6]33 */
34#include <errno.h>
[86c2ccd]35#include <str_error.h>
[3f162ab]36#include <macros.h>
[4192d3d6]37
[bdc8ab1]38#include <usb/usb.h>
[4192d3d6]39#include <usb/debug.h>
40
[07f49ae]41#include "uhci_batch.h"
[53338bda]42#include "transfer_list.h"
[87644b4]43#include "hw_struct/transfer_descriptor.h"
[9a818a9]44#include "utils/malloc32.h"
[4192d3d6]45
46#define DEFAULT_ERROR_COUNT 3
[3afb758]47
[f7ac3f3]48/** Safely destructs uhci_transfer_batch_t structure.
49 *
50 * @param[in] uhci_batch Instance to destroy.
51 */
[b991d37]52static void uhci_transfer_batch_dispose(uhci_transfer_batch_t *uhci_batch)
[5fe0a697]53{
[b991d37]54 if (uhci_batch) {
[549ff23]55 usb_transfer_batch_destroy(uhci_batch->usb_batch);
[b991d37]56 free32(uhci_batch->device_buffer);
57 free(uhci_batch);
58 }
[5fe0a697]59}
[76fbd9a]60
[f7ac3f3]61/** Finishes usb_transfer_batch and destroys the structure.
[28d9c95]62 *
[f7ac3f3]63 * @param[in] uhci_batch Instance to finish and destroy.
[28d9c95]64 */
[6bba41d]65void uhci_transfer_batch_finish_dispose(uhci_transfer_batch_t *uhci_batch)
[2cc6e97]66{
[b991d37]67 assert(uhci_batch);
68 assert(uhci_batch->usb_batch);
[f18d82f0]69 usb_transfer_batch_finish(uhci_batch->usb_batch,
[5cfcc64]70 uhci_transfer_batch_data_buffer(uhci_batch));
[b991d37]71 uhci_transfer_batch_dispose(uhci_batch);
[2cc6e97]72}
[76fbd9a]73
[f7ac3f3]74/** Transfer batch setup table. */
[790318e]75static void (*const batch_setup[])(uhci_transfer_batch_t*, usb_direction_t);
[76fbd9a]76
[17ceb72]77/** Allocate memory and initialize internal data structure.
[a7e2f0d]78 *
[f7ac3f3]79 * @param[in] usb_batch Pointer to generic USB batch structure.
[f706355]80 * @return Valid pointer if all structures were successfully created,
[17ceb72]81 * NULL otherwise.
82 *
[508a0ca]83 * Determines the number of needed transfer descriptors (TDs).
84 * Prepares a transport buffer (that is accessible by the hardware).
[910ca3f]85 * Initializes parameters needed for the transfer and callback.
[a7e2f0d]86 */
[b991d37]87uhci_transfer_batch_t * uhci_transfer_batch_get(usb_transfer_batch_t *usb_batch)
[4192d3d6]88{
[b991d37]89 assert((sizeof(td_t) % 16) == 0);
[2ab6875]90#define CHECK_NULL_DISPOSE_RETURN(ptr, message...) \
91 if (ptr == NULL) { \
92 usb_log_error(message); \
[b991d37]93 uhci_transfer_batch_dispose(uhci_batch); \
94 return NULL; \
[2ab6875]95 } else (void)0
96
[b991d37]97 uhci_transfer_batch_t *uhci_batch =
[3afb758]98 calloc(1, sizeof(uhci_transfer_batch_t));
[b991d37]99 CHECK_NULL_DISPOSE_RETURN(uhci_batch,
[2cc6e97]100 "Failed to allocate UHCI batch.\n");
[9a790ad1]101 link_initialize(&uhci_batch->link);
[b991d37]102 uhci_batch->td_count =
103 (usb_batch->buffer_size + usb_batch->ep->max_packet_size - 1)
104 / usb_batch->ep->max_packet_size;
105 if (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) {
106 uhci_batch->td_count += 2;
[7dd3318]107 }
108
[b991d37]109 const size_t total_size = (sizeof(td_t) * uhci_batch->td_count)
110 + sizeof(qh_t) + usb_batch->setup_size + usb_batch->buffer_size;
111 uhci_batch->device_buffer = malloc32(total_size);
112 CHECK_NULL_DISPOSE_RETURN(uhci_batch->device_buffer,
[2cc6e97]113 "Failed to allocate UHCI buffer.\n");
[acdb5bac]114 memset(uhci_batch->device_buffer, 0, total_size);
[4192d3d6]115
[b991d37]116 uhci_batch->tds = uhci_batch->device_buffer;
117 uhci_batch->qh =
118 (uhci_batch->device_buffer + (sizeof(td_t) * uhci_batch->td_count));
[2cc6e97]119
[b991d37]120 qh_init(uhci_batch->qh);
121 qh_set_element_td(uhci_batch->qh, &uhci_batch->tds[0]);
[2cc6e97]122
[b991d37]123 void *dest =
124 uhci_batch->device_buffer + (sizeof(td_t) * uhci_batch->td_count)
[2cc6e97]125 + sizeof(qh_t);
[b991d37]126 /* Copy SETUP packet data to the device buffer */
127 memcpy(dest, usb_batch->setup_buffer, usb_batch->setup_size);
128 dest += usb_batch->setup_size;
[5d915b7]129 /* Copy generic data unless they are provided by the device */
[b991d37]130 if (usb_batch->ep->direction != USB_DIRECTION_IN) {
131 memcpy(dest, usb_batch->buffer, usb_batch->buffer_size);
132 }
133 uhci_batch->usb_batch = usb_batch;
[c4fb5ecd]134 usb_log_debug2("Batch %p " USB_TRANSFER_BATCH_FMT
[b991d37]135 " memory structures ready.\n", usb_batch,
136 USB_TRANSFER_BATCH_ARGS(*usb_batch));
[5d915b7]137
[25d224c6]138 const usb_direction_t dir = usb_transfer_batch_direction(usb_batch);
139
[790318e]140 assert(batch_setup[usb_batch->ep->transfer_type]);
141 batch_setup[usb_batch->ep->transfer_type](uhci_batch, dir);
[b991d37]142
143 return uhci_batch;
[4192d3d6]144}
[76fbd9a]145
[17ceb72]146/** Check batch TDs for activity.
[a7e2f0d]147 *
[5f57929]148 * @param[in] uhci_batch Batch structure to use.
[a7e2f0d]149 * @return False, if there is an active TD, true otherwise.
[17ceb72]150 *
151 * Walk all TDs. Stop with false if there is an active one (it is to be
[910ca3f]152 * processed). Stop with true if an error is found. Return true if the last TD
[17ceb72]153 * is reached.
[a7e2f0d]154 */
[ad91b806]155bool uhci_transfer_batch_is_complete(const uhci_transfer_batch_t *uhci_batch)
[4192d3d6]156{
[b991d37]157 assert(uhci_batch);
158 assert(uhci_batch->usb_batch);
[81dce9f]159
[b991d37]160 usb_log_debug2("Batch %p " USB_TRANSFER_BATCH_FMT
161 " checking %zu transfer(s) for completion.\n",
162 uhci_batch->usb_batch,
163 USB_TRANSFER_BATCH_ARGS(*uhci_batch->usb_batch),
164 uhci_batch->td_count);
165 uhci_batch->usb_batch->transfered_size = 0;
[75f9dcd]166
167 for (size_t i = 0;i < uhci_batch->td_count; ++i) {
[b991d37]168 if (td_is_active(&uhci_batch->tds[i])) {
[7dd3318]169 return false;
[600733e]170 }
[c5b93dc]171
[b991d37]172 uhci_batch->usb_batch->error = td_status(&uhci_batch->tds[i]);
173 if (uhci_batch->usb_batch->error != EOK) {
174 assert(uhci_batch->usb_batch->ep != NULL);
175
[b64fbc9]176 usb_log_debug("Batch %p found error TD(%zu->%p):%"
[b991d37]177 PRIx32 ".\n", uhci_batch->usb_batch, i,
[b64fbc9]178 &uhci_batch->tds[i], uhci_batch->tds[i].status);
[b991d37]179 td_print_status(&uhci_batch->tds[i]);
[feb10c88]180
[b991d37]181 endpoint_toggle_set(uhci_batch->usb_batch->ep,
182 td_toggle(&uhci_batch->tds[i]));
[c5b93dc]183 if (i > 0)
184 goto substract_ret;
[7dd3318]185 return true;
186 }
[c5b93dc]187
[b991d37]188 uhci_batch->usb_batch->transfered_size
189 += td_act_size(&uhci_batch->tds[i]);
190 if (td_is_short(&uhci_batch->tds[i]))
[c5b93dc]191 goto substract_ret;
[4192d3d6]192 }
[c5b93dc]193substract_ret:
[b991d37]194 uhci_batch->usb_batch->transfered_size
195 -= uhci_batch->usb_batch->setup_size;
[7dd3318]196 return true;
[4192d3d6]197}
[76fbd9a]198
[f7ac3f3]199/** Direction to pid conversion table */
[25d224c6]200static const usb_packet_id direction_pids[] = {
201 [USB_DIRECTION_IN] = USB_PID_IN,
202 [USB_DIRECTION_OUT] = USB_PID_OUT,
203};
[76fbd9a]204
[910ca3f]205/** Prepare generic data transfer
[a7e2f0d]206 *
[5f57929]207 * @param[in] uhci_batch Batch structure to use.
[25d224c6]208 * @param[in] dir Communication direction.
[17ceb72]209 *
[910ca3f]210 * Transactions with alternating toggle bit and supplied pid value.
[20a1e76]211 * The last transfer is marked with IOC flag.
[a7e2f0d]212 */
[25d224c6]213static void batch_data(uhci_transfer_batch_t *uhci_batch, usb_direction_t dir)
[0e06a14]214{
[b991d37]215 assert(uhci_batch);
216 assert(uhci_batch->usb_batch);
[5d915b7]217 assert(uhci_batch->usb_batch->ep);
[25d224c6]218 assert(dir == USB_DIRECTION_OUT || dir == USB_DIRECTION_IN);
[5d915b7]219
[9a790ad1]220
[25d224c6]221 const usb_packet_id pid = direction_pids[dir];
[b991d37]222 const bool low_speed =
223 uhci_batch->usb_batch->ep->speed == USB_SPEED_LOW;
224 const size_t mps = uhci_batch->usb_batch->ep->max_packet_size;
[56e9fb0]225 const usb_target_t target = {{
[b991d37]226 uhci_batch->usb_batch->ep->address,
[56e9fb0]227 uhci_batch->usb_batch->ep->endpoint }};
[b991d37]228
229 int toggle = endpoint_toggle_get(uhci_batch->usb_batch->ep);
[3e37964]230 assert(toggle == 0 || toggle == 1);
[0e06a14]231
[508a0ca]232 size_t td = 0;
[b991d37]233 size_t remain_size = uhci_batch->usb_batch->buffer_size;
234 char *buffer = uhci_transfer_batch_data_buffer(uhci_batch);
235
[0e06a14]236 while (remain_size > 0) {
[3f162ab]237 const size_t packet_size = min(remain_size, mps);
[c8dd5b1]238
[b991d37]239 const td_t *next_td = (td + 1 < uhci_batch->td_count)
240 ? &uhci_batch->tds[td + 1] : NULL;
[30a4301]241
[b991d37]242 assert(td < uhci_batch->td_count);
[bcaefe3]243 td_init(
[b991d37]244 &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, packet_size,
[910ca3f]245 toggle, false, low_speed, target, pid, buffer, next_td);
[bcaefe3]246
[910ca3f]247 ++td;
[bcaefe3]248 toggle = 1 - toggle;
[910ca3f]249 buffer += packet_size;
[0e06a14]250 remain_size -= packet_size;
251 }
[b991d37]252 td_set_ioc(&uhci_batch->tds[td - 1]);
253 endpoint_toggle_set(uhci_batch->usb_batch->ep, toggle);
[5f57929]254 usb_log_debug2(
255 "Batch %p %s %s " USB_TRANSFER_BATCH_FMT " initialized.\n", \
256 uhci_batch->usb_batch,
[9a790ad1]257 usb_str_transfer_type(uhci_batch->usb_batch->ep->transfer_type),
[5f57929]258 usb_str_direction(uhci_batch->usb_batch->ep->direction),
259 USB_TRANSFER_BATCH_ARGS(*uhci_batch->usb_batch));
[4192d3d6]260}
[76fbd9a]261
[910ca3f]262/** Prepare generic control transfer
[a7e2f0d]263 *
[5f57929]264 * @param[in] uhci_batch Batch structure to use.
[25d224c6]265 * @param[in] dir Communication direction.
[17ceb72]266 *
267 * Setup stage with toggle 0 and USB_PID_SETUP.
[25d224c6]268 * Data stage with alternating toggle and pid determined by the communication
269 * direction.
270 * Status stage with toggle 1 and pid determined by the communication direction.
[20a1e76]271 * The last transfer is marked with IOC.
[a7e2f0d]272 */
[25d224c6]273static void batch_control(uhci_transfer_batch_t *uhci_batch, usb_direction_t dir)
[bdc8ab1]274{
[b991d37]275 assert(uhci_batch);
276 assert(uhci_batch->usb_batch);
277 assert(uhci_batch->usb_batch->ep);
[25d224c6]278 assert(dir == USB_DIRECTION_OUT || dir == USB_DIRECTION_IN);
[b991d37]279 assert(uhci_batch->td_count >= 2);
[25d224c6]280 static const usb_packet_id status_stage_pids[] = {
281 [USB_DIRECTION_IN] = USB_PID_OUT,
282 [USB_DIRECTION_OUT] = USB_PID_IN,
283 };
[b991d37]284
[25d224c6]285 const usb_packet_id data_stage_pid = direction_pids[dir];
286 const usb_packet_id status_stage_pid = status_stage_pids[dir];
[b991d37]287 const bool low_speed =
288 uhci_batch->usb_batch->ep->speed == USB_SPEED_LOW;
289 const size_t mps = uhci_batch->usb_batch->ep->max_packet_size;
[56e9fb0]290 const usb_target_t target = {{
[b991d37]291 uhci_batch->usb_batch->ep->address,
[56e9fb0]292 uhci_batch->usb_batch->ep->endpoint }};
[d017cea]293
[bdc8ab1]294 /* setup stage */
[81dce9f]295 td_init(
[b991d37]296 &uhci_batch->tds[0], DEFAULT_ERROR_COUNT,
297 uhci_batch->usb_batch->setup_size, 0, false,
298 low_speed, target, USB_PID_SETUP,
299 uhci_transfer_batch_setup_buffer(uhci_batch), &uhci_batch->tds[1]);
[bdc8ab1]300
301 /* data stage */
[508a0ca]302 size_t td = 1;
[910ca3f]303 unsigned toggle = 1;
[b991d37]304 size_t remain_size = uhci_batch->usb_batch->buffer_size;
305 char *buffer = uhci_transfer_batch_data_buffer(uhci_batch);
306
[bdc8ab1]307 while (remain_size > 0) {
[3f162ab]308 const size_t packet_size = min(remain_size, mps);
[bdc8ab1]309
[bcaefe3]310 td_init(
[b991d37]311 &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, packet_size,
312 toggle, false, low_speed, target, data_stage_pid,
313 buffer, &uhci_batch->tds[td + 1]);
[bdc8ab1]314
[508a0ca]315 ++td;
[910ca3f]316 toggle = 1 - toggle;
317 buffer += packet_size;
[bdc8ab1]318 remain_size -= packet_size;
[b991d37]319 assert(td < uhci_batch->td_count);
[bdc8ab1]320 }
321
322 /* status stage */
[b991d37]323 assert(td == uhci_batch->td_count - 1);
[4192d3d6]324
[81dce9f]325 td_init(
[b991d37]326 &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, 0, 1, false, low_speed,
327 target, status_stage_pid, NULL, NULL);
328 td_set_ioc(&uhci_batch->tds[td]);
[7dd3318]329
[81dce9f]330 usb_log_debug2("Control last TD status: %x.\n",
[b991d37]331 uhci_batch->tds[td].status);
[4192d3d6]332}
[76fbd9a]333
[790318e]334static void (*const batch_setup[])(uhci_transfer_batch_t*, usb_direction_t) =
[b991d37]335{
[790318e]336 [USB_TRANSFER_CONTROL] = batch_control,
337 [USB_TRANSFER_BULK] = batch_data,
338 [USB_TRANSFER_INTERRUPT] = batch_data,
339 [USB_TRANSFER_ISOCHRONOUS] = NULL,
[b991d37]340};
[4192d3d6]341/**
342 * @}
343 */
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