source: mainline/uspace/drv/bus/usb/uhci/uhci_batch.c@ 11d4c747

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 11d4c747 was 888238e9, checked in by Aearsis <Hlavaty.Ondrej@…>, 8 years ago

usbhost: endpoints do not have speed on their own

This information was redundant, and the fact it was never set proves it
should be removed because it is source of errors.

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File size: 10.6 KB
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[4192d3d6]1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
[58563585]28
[17ceb72]29/** @addtogroup drvusbuhcihc
[4192d3d6]30 * @{
31 */
32/** @file
[910ca3f]33 * @brief UHCI driver USB transfer structure
[4192d3d6]34 */
[8064c2f6]35
36#include <assert.h>
[4192d3d6]37#include <errno.h>
[3f162ab]38#include <macros.h>
[8064c2f6]39#include <mem.h>
40#include <stdlib.h>
[4192d3d6]41
[bdc8ab1]42#include <usb/usb.h>
[4192d3d6]43#include <usb/debug.h>
[8064c2f6]44#include <usb/host/endpoint.h>
[8fc61c8]45#include <usb/host/utils/malloc32.h>
[4192d3d6]46
[07f49ae]47#include "uhci_batch.h"
[87644b4]48#include "hw_struct/transfer_descriptor.h"
[4192d3d6]49
50#define DEFAULT_ERROR_COUNT 3
[3afb758]51
[5fd9c30]52/** Transfer batch setup table. */
53static void (*const batch_setup[])(uhci_transfer_batch_t*);
[76fbd9a]54
[5fd9c30]55/** Destroys uhci_transfer_batch_t structure.
[28d9c95]56 *
[5fd9c30]57 * @param[in] uhci_batch Instance to destroy.
[28d9c95]58 */
[5fd9c30]59void uhci_transfer_batch_destroy(uhci_transfer_batch_t *uhci_batch)
[2cc6e97]60{
[b991d37]61 assert(uhci_batch);
[5fd9c30]62 free32(uhci_batch->device_buffer);
63 free(uhci_batch);
[2cc6e97]64}
[76fbd9a]65
[17ceb72]66/** Allocate memory and initialize internal data structure.
[a7e2f0d]67 *
[f7ac3f3]68 * @param[in] usb_batch Pointer to generic USB batch structure.
[f706355]69 * @return Valid pointer if all structures were successfully created,
[17ceb72]70 * NULL otherwise.
[5fd9c30]71 */
72uhci_transfer_batch_t * uhci_transfer_batch_create(endpoint_t *ep)
73{
74 uhci_transfer_batch_t *uhci_batch =
75 calloc(1, sizeof(uhci_transfer_batch_t));
76 if (!uhci_batch) {
77 usb_log_error("Failed to allocate UHCI batch.\n");
78 return NULL;
79 }
80
81 usb_transfer_batch_init(&uhci_batch->base, ep);
82
83 link_initialize(&uhci_batch->link);
84 return uhci_batch;
85}
86
87/* Prepares batch for commiting.
[17ceb72]88 *
[508a0ca]89 * Determines the number of needed transfer descriptors (TDs).
90 * Prepares a transport buffer (that is accessible by the hardware).
[910ca3f]91 * Initializes parameters needed for the transfer and callback.
[a7e2f0d]92 */
[5fd9c30]93int uhci_transfer_batch_prepare(uhci_transfer_batch_t *uhci_batch)
[4192d3d6]94{
[1cf26ab]95 static_assert((sizeof(td_t) % 16) == 0);
[2ab6875]96
[5fd9c30]97 usb_transfer_batch_t *usb_batch = &uhci_batch->base;
98
99 uhci_batch->td_count = (usb_batch->buffer_size + usb_batch->ep->max_packet_size - 1)
100 / usb_batch->ep->max_packet_size;
101
[b991d37]102 if (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) {
103 uhci_batch->td_count += 2;
[7dd3318]104 }
105
[17873ac7]106 const size_t setup_size = (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL)
[5fd9c30]107 ? USB_SETUP_PACKET_SIZE
108 : 0;
109
[b991d37]110 const size_t total_size = (sizeof(td_t) * uhci_batch->td_count)
[5fd9c30]111 + sizeof(qh_t) + setup_size + usb_batch->buffer_size;
[b991d37]112 uhci_batch->device_buffer = malloc32(total_size);
[5fd9c30]113 if (!uhci_batch->device_buffer) {
114 usb_log_error("Failed to allocate UHCI buffer.\n");
115 return ENOMEM;
116 }
[acdb5bac]117 memset(uhci_batch->device_buffer, 0, total_size);
[4192d3d6]118
[b991d37]119 uhci_batch->tds = uhci_batch->device_buffer;
120 uhci_batch->qh =
121 (uhci_batch->device_buffer + (sizeof(td_t) * uhci_batch->td_count));
[2cc6e97]122
[b991d37]123 qh_init(uhci_batch->qh);
124 qh_set_element_td(uhci_batch->qh, &uhci_batch->tds[0]);
[2cc6e97]125
[b991d37]126 void *dest =
127 uhci_batch->device_buffer + (sizeof(td_t) * uhci_batch->td_count)
[2cc6e97]128 + sizeof(qh_t);
[b991d37]129 /* Copy SETUP packet data to the device buffer */
[5fd9c30]130 memcpy(dest, usb_batch->setup.buffer, setup_size);
131 dest += setup_size;
[5d915b7]132 /* Copy generic data unless they are provided by the device */
[a312d8f]133 if (usb_batch->dir != USB_DIRECTION_IN) {
[b991d37]134 memcpy(dest, usb_batch->buffer, usb_batch->buffer_size);
135 }
[c4fb5ecd]136 usb_log_debug2("Batch %p " USB_TRANSFER_BATCH_FMT
[b991d37]137 " memory structures ready.\n", usb_batch,
138 USB_TRANSFER_BATCH_ARGS(*usb_batch));
[5d915b7]139
[790318e]140 assert(batch_setup[usb_batch->ep->transfer_type]);
[5fd9c30]141 batch_setup[usb_batch->ep->transfer_type](uhci_batch);
[b991d37]142
[5fd9c30]143 return EOK;
[4192d3d6]144}
[76fbd9a]145
[17ceb72]146/** Check batch TDs for activity.
[a7e2f0d]147 *
[5f57929]148 * @param[in] uhci_batch Batch structure to use.
[a7e2f0d]149 * @return False, if there is an active TD, true otherwise.
[17ceb72]150 *
151 * Walk all TDs. Stop with false if there is an active one (it is to be
[910ca3f]152 * processed). Stop with true if an error is found. Return true if the last TD
[17ceb72]153 * is reached.
[a7e2f0d]154 */
[5fd9c30]155bool uhci_transfer_batch_check_completed(uhci_transfer_batch_t *uhci_batch)
[4192d3d6]156{
[b991d37]157 assert(uhci_batch);
[17873ac7]158 usb_transfer_batch_t *batch = &uhci_batch->base;
[81dce9f]159
[b991d37]160 usb_log_debug2("Batch %p " USB_TRANSFER_BATCH_FMT
161 " checking %zu transfer(s) for completion.\n",
[17873ac7]162 uhci_batch, USB_TRANSFER_BATCH_ARGS(*batch),
[b991d37]163 uhci_batch->td_count);
[17873ac7]164 batch->transfered_size = 0;
[75f9dcd]165
166 for (size_t i = 0;i < uhci_batch->td_count; ++i) {
[b991d37]167 if (td_is_active(&uhci_batch->tds[i])) {
[7dd3318]168 return false;
[600733e]169 }
[c5b93dc]170
[17873ac7]171 batch->error = td_status(&uhci_batch->tds[i]);
172 if (batch->error != EOK) {
173 assert(batch->ep != NULL);
[b991d37]174
[b64fbc9]175 usb_log_debug("Batch %p found error TD(%zu->%p):%"
[58ac3ec]176 PRIx32 ".\n", uhci_batch, i,
[b64fbc9]177 &uhci_batch->tds[i], uhci_batch->tds[i].status);
[b991d37]178 td_print_status(&uhci_batch->tds[i]);
[feb10c88]179
[17873ac7]180 endpoint_toggle_set(batch->ep,
[b991d37]181 td_toggle(&uhci_batch->tds[i]));
[c5b93dc]182 if (i > 0)
183 goto substract_ret;
[7dd3318]184 return true;
185 }
[c5b93dc]186
[17873ac7]187 batch->transfered_size
[b991d37]188 += td_act_size(&uhci_batch->tds[i]);
189 if (td_is_short(&uhci_batch->tds[i]))
[c5b93dc]190 goto substract_ret;
[4192d3d6]191 }
[c5b93dc]192substract_ret:
[17873ac7]193 if (batch->ep->transfer_type == USB_TRANSFER_CONTROL)
194 batch->transfered_size -= USB_SETUP_PACKET_SIZE;
195
196 fibril_mutex_lock(&batch->ep->guard);
197 usb_transfer_batch_reset_toggle(batch);
198 endpoint_deactivate_locked(batch->ep);
199 fibril_mutex_unlock(&batch->ep->guard);
200
201 if (batch->dir == USB_DIRECTION_IN) {
202 assert(batch->transfered_size <= batch->buffer_size);
203 memcpy(batch->buffer,
204 uhci_transfer_batch_data_buffer(uhci_batch),
205 batch->transfered_size);
206 }
207
[7dd3318]208 return true;
[4192d3d6]209}
[76fbd9a]210
[f7ac3f3]211/** Direction to pid conversion table */
[25d224c6]212static const usb_packet_id direction_pids[] = {
213 [USB_DIRECTION_IN] = USB_PID_IN,
214 [USB_DIRECTION_OUT] = USB_PID_OUT,
215};
[76fbd9a]216
[910ca3f]217/** Prepare generic data transfer
[a7e2f0d]218 *
[5f57929]219 * @param[in] uhci_batch Batch structure to use.
[25d224c6]220 * @param[in] dir Communication direction.
[17ceb72]221 *
[910ca3f]222 * Transactions with alternating toggle bit and supplied pid value.
[20a1e76]223 * The last transfer is marked with IOC flag.
[a7e2f0d]224 */
[5fd9c30]225static void batch_data(uhci_transfer_batch_t *uhci_batch)
[0e06a14]226{
[b991d37]227 assert(uhci_batch);
[5fd9c30]228
229 usb_direction_t dir = uhci_batch->base.dir;
[25d224c6]230 assert(dir == USB_DIRECTION_OUT || dir == USB_DIRECTION_IN);
[5d915b7]231
[9a790ad1]232
[25d224c6]233 const usb_packet_id pid = direction_pids[dir];
[b991d37]234 const bool low_speed =
[888238e9]235 uhci_batch->base.ep->device->speed == USB_SPEED_LOW;
[5fd9c30]236 const size_t mps = uhci_batch->base.ep->max_packet_size;
[b991d37]237
[5fd9c30]238 int toggle = endpoint_toggle_get(uhci_batch->base.ep);
[3e37964]239 assert(toggle == 0 || toggle == 1);
[0e06a14]240
[508a0ca]241 size_t td = 0;
[5fd9c30]242 size_t remain_size = uhci_batch->base.buffer_size;
[b991d37]243 char *buffer = uhci_transfer_batch_data_buffer(uhci_batch);
244
[0e06a14]245 while (remain_size > 0) {
[3f162ab]246 const size_t packet_size = min(remain_size, mps);
[c8dd5b1]247
[b991d37]248 const td_t *next_td = (td + 1 < uhci_batch->td_count)
249 ? &uhci_batch->tds[td + 1] : NULL;
[30a4301]250
[b991d37]251 assert(td < uhci_batch->td_count);
[bcaefe3]252 td_init(
[b991d37]253 &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, packet_size,
[a5b3de6]254 toggle, false, low_speed, uhci_batch->base.target, pid, buffer, next_td);
[bcaefe3]255
[910ca3f]256 ++td;
[bcaefe3]257 toggle = 1 - toggle;
[910ca3f]258 buffer += packet_size;
[0e06a14]259 remain_size -= packet_size;
260 }
[b991d37]261 td_set_ioc(&uhci_batch->tds[td - 1]);
[5fd9c30]262 endpoint_toggle_set(uhci_batch->base.ep, toggle);
[5f57929]263 usb_log_debug2(
264 "Batch %p %s %s " USB_TRANSFER_BATCH_FMT " initialized.\n", \
[58ac3ec]265 uhci_batch,
[5fd9c30]266 usb_str_transfer_type(uhci_batch->base.ep->transfer_type),
267 usb_str_direction(uhci_batch->base.ep->direction),
[58ac3ec]268 USB_TRANSFER_BATCH_ARGS(uhci_batch->base));
[4192d3d6]269}
[76fbd9a]270
[910ca3f]271/** Prepare generic control transfer
[a7e2f0d]272 *
[5f57929]273 * @param[in] uhci_batch Batch structure to use.
[25d224c6]274 * @param[in] dir Communication direction.
[17ceb72]275 *
276 * Setup stage with toggle 0 and USB_PID_SETUP.
[25d224c6]277 * Data stage with alternating toggle and pid determined by the communication
278 * direction.
279 * Status stage with toggle 1 and pid determined by the communication direction.
[20a1e76]280 * The last transfer is marked with IOC.
[a7e2f0d]281 */
[5fd9c30]282static void batch_control(uhci_transfer_batch_t *uhci_batch)
[bdc8ab1]283{
[b991d37]284 assert(uhci_batch);
[5fd9c30]285
286 usb_direction_t dir = uhci_batch->base.dir;
[25d224c6]287 assert(dir == USB_DIRECTION_OUT || dir == USB_DIRECTION_IN);
[b991d37]288 assert(uhci_batch->td_count >= 2);
[25d224c6]289 static const usb_packet_id status_stage_pids[] = {
290 [USB_DIRECTION_IN] = USB_PID_OUT,
291 [USB_DIRECTION_OUT] = USB_PID_IN,
292 };
[b991d37]293
[25d224c6]294 const usb_packet_id data_stage_pid = direction_pids[dir];
295 const usb_packet_id status_stage_pid = status_stage_pids[dir];
[b991d37]296 const bool low_speed =
[888238e9]297 uhci_batch->base.ep->device->speed == USB_SPEED_LOW;
[5fd9c30]298 const size_t mps = uhci_batch->base.ep->max_packet_size;
[a5b3de6]299 const usb_target_t target = uhci_batch->base.target;
[d017cea]300
[bdc8ab1]301 /* setup stage */
[81dce9f]302 td_init(
[b991d37]303 &uhci_batch->tds[0], DEFAULT_ERROR_COUNT,
[5fd9c30]304 USB_SETUP_PACKET_SIZE, 0, false,
[b991d37]305 low_speed, target, USB_PID_SETUP,
306 uhci_transfer_batch_setup_buffer(uhci_batch), &uhci_batch->tds[1]);
[bdc8ab1]307
308 /* data stage */
[508a0ca]309 size_t td = 1;
[910ca3f]310 unsigned toggle = 1;
[5fd9c30]311 size_t remain_size = uhci_batch->base.buffer_size;
[b991d37]312 char *buffer = uhci_transfer_batch_data_buffer(uhci_batch);
313
[bdc8ab1]314 while (remain_size > 0) {
[3f162ab]315 const size_t packet_size = min(remain_size, mps);
[bdc8ab1]316
[bcaefe3]317 td_init(
[b991d37]318 &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, packet_size,
319 toggle, false, low_speed, target, data_stage_pid,
320 buffer, &uhci_batch->tds[td + 1]);
[bdc8ab1]321
[508a0ca]322 ++td;
[910ca3f]323 toggle = 1 - toggle;
324 buffer += packet_size;
[bdc8ab1]325 remain_size -= packet_size;
[b991d37]326 assert(td < uhci_batch->td_count);
[bdc8ab1]327 }
328
329 /* status stage */
[b991d37]330 assert(td == uhci_batch->td_count - 1);
[4192d3d6]331
[81dce9f]332 td_init(
[b991d37]333 &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, 0, 1, false, low_speed,
334 target, status_stage_pid, NULL, NULL);
335 td_set_ioc(&uhci_batch->tds[td]);
[7dd3318]336
[81dce9f]337 usb_log_debug2("Control last TD status: %x.\n",
[b991d37]338 uhci_batch->tds[td].status);
[4192d3d6]339}
[76fbd9a]340
[5fd9c30]341static void (*const batch_setup[])(uhci_transfer_batch_t*) =
[b991d37]342{
[790318e]343 [USB_TRANSFER_CONTROL] = batch_control,
344 [USB_TRANSFER_BULK] = batch_data,
345 [USB_TRANSFER_INTERRUPT] = batch_data,
346 [USB_TRANSFER_ISOCHRONOUS] = NULL,
[b991d37]347};
[4192d3d6]348/**
349 * @}
350 */
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