source: mainline/uspace/drv/bus/usb/uhci/uhci_batch.c@ 11a3b5f

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 11a3b5f was 8064c2f6, checked in by Jan Vesely <jano.vesely@…>, 12 years ago

uhci: Sanitize headers.

Include what you use.

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[4192d3d6]1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
[17ceb72]28/** @addtogroup drvusbuhcihc
[4192d3d6]29 * @{
30 */
31/** @file
[910ca3f]32 * @brief UHCI driver USB transfer structure
[4192d3d6]33 */
[8064c2f6]34
35#include <assert.h>
[4192d3d6]36#include <errno.h>
[3f162ab]37#include <macros.h>
[8064c2f6]38#include <mem.h>
39#include <stdlib.h>
[4192d3d6]40
[bdc8ab1]41#include <usb/usb.h>
[4192d3d6]42#include <usb/debug.h>
[8064c2f6]43#include <usb/host/endpoint.h>
[4192d3d6]44
[07f49ae]45#include "uhci_batch.h"
[87644b4]46#include "hw_struct/transfer_descriptor.h"
[9a818a9]47#include "utils/malloc32.h"
[4192d3d6]48
49#define DEFAULT_ERROR_COUNT 3
[3afb758]50
[f7ac3f3]51/** Safely destructs uhci_transfer_batch_t structure.
52 *
53 * @param[in] uhci_batch Instance to destroy.
54 */
[b991d37]55static void uhci_transfer_batch_dispose(uhci_transfer_batch_t *uhci_batch)
[5fe0a697]56{
[b991d37]57 if (uhci_batch) {
[549ff23]58 usb_transfer_batch_destroy(uhci_batch->usb_batch);
[b991d37]59 free32(uhci_batch->device_buffer);
60 free(uhci_batch);
61 }
[5fe0a697]62}
[76fbd9a]63
[f7ac3f3]64/** Finishes usb_transfer_batch and destroys the structure.
[28d9c95]65 *
[f7ac3f3]66 * @param[in] uhci_batch Instance to finish and destroy.
[28d9c95]67 */
[6bba41d]68void uhci_transfer_batch_finish_dispose(uhci_transfer_batch_t *uhci_batch)
[2cc6e97]69{
[b991d37]70 assert(uhci_batch);
71 assert(uhci_batch->usb_batch);
[f18d82f0]72 usb_transfer_batch_finish(uhci_batch->usb_batch,
[5cfcc64]73 uhci_transfer_batch_data_buffer(uhci_batch));
[b991d37]74 uhci_transfer_batch_dispose(uhci_batch);
[2cc6e97]75}
[76fbd9a]76
[f7ac3f3]77/** Transfer batch setup table. */
[790318e]78static void (*const batch_setup[])(uhci_transfer_batch_t*, usb_direction_t);
[76fbd9a]79
[17ceb72]80/** Allocate memory and initialize internal data structure.
[a7e2f0d]81 *
[f7ac3f3]82 * @param[in] usb_batch Pointer to generic USB batch structure.
[f706355]83 * @return Valid pointer if all structures were successfully created,
[17ceb72]84 * NULL otherwise.
85 *
[508a0ca]86 * Determines the number of needed transfer descriptors (TDs).
87 * Prepares a transport buffer (that is accessible by the hardware).
[910ca3f]88 * Initializes parameters needed for the transfer and callback.
[a7e2f0d]89 */
[b991d37]90uhci_transfer_batch_t * uhci_transfer_batch_get(usb_transfer_batch_t *usb_batch)
[4192d3d6]91{
[b991d37]92 assert((sizeof(td_t) % 16) == 0);
[2ab6875]93#define CHECK_NULL_DISPOSE_RETURN(ptr, message...) \
94 if (ptr == NULL) { \
95 usb_log_error(message); \
[b991d37]96 uhci_transfer_batch_dispose(uhci_batch); \
97 return NULL; \
[2ab6875]98 } else (void)0
99
[b991d37]100 uhci_transfer_batch_t *uhci_batch =
[3afb758]101 calloc(1, sizeof(uhci_transfer_batch_t));
[b991d37]102 CHECK_NULL_DISPOSE_RETURN(uhci_batch,
[2cc6e97]103 "Failed to allocate UHCI batch.\n");
[9a790ad1]104 link_initialize(&uhci_batch->link);
[b991d37]105 uhci_batch->td_count =
106 (usb_batch->buffer_size + usb_batch->ep->max_packet_size - 1)
107 / usb_batch->ep->max_packet_size;
108 if (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) {
109 uhci_batch->td_count += 2;
[7dd3318]110 }
111
[b991d37]112 const size_t total_size = (sizeof(td_t) * uhci_batch->td_count)
113 + sizeof(qh_t) + usb_batch->setup_size + usb_batch->buffer_size;
114 uhci_batch->device_buffer = malloc32(total_size);
115 CHECK_NULL_DISPOSE_RETURN(uhci_batch->device_buffer,
[2cc6e97]116 "Failed to allocate UHCI buffer.\n");
[acdb5bac]117 memset(uhci_batch->device_buffer, 0, total_size);
[4192d3d6]118
[b991d37]119 uhci_batch->tds = uhci_batch->device_buffer;
120 uhci_batch->qh =
121 (uhci_batch->device_buffer + (sizeof(td_t) * uhci_batch->td_count));
[2cc6e97]122
[b991d37]123 qh_init(uhci_batch->qh);
124 qh_set_element_td(uhci_batch->qh, &uhci_batch->tds[0]);
[2cc6e97]125
[b991d37]126 void *dest =
127 uhci_batch->device_buffer + (sizeof(td_t) * uhci_batch->td_count)
[2cc6e97]128 + sizeof(qh_t);
[b991d37]129 /* Copy SETUP packet data to the device buffer */
130 memcpy(dest, usb_batch->setup_buffer, usb_batch->setup_size);
131 dest += usb_batch->setup_size;
[5d915b7]132 /* Copy generic data unless they are provided by the device */
[b991d37]133 if (usb_batch->ep->direction != USB_DIRECTION_IN) {
134 memcpy(dest, usb_batch->buffer, usb_batch->buffer_size);
135 }
136 uhci_batch->usb_batch = usb_batch;
[c4fb5ecd]137 usb_log_debug2("Batch %p " USB_TRANSFER_BATCH_FMT
[b991d37]138 " memory structures ready.\n", usb_batch,
139 USB_TRANSFER_BATCH_ARGS(*usb_batch));
[5d915b7]140
[25d224c6]141 const usb_direction_t dir = usb_transfer_batch_direction(usb_batch);
142
[790318e]143 assert(batch_setup[usb_batch->ep->transfer_type]);
144 batch_setup[usb_batch->ep->transfer_type](uhci_batch, dir);
[b991d37]145
146 return uhci_batch;
[4192d3d6]147}
[76fbd9a]148
[17ceb72]149/** Check batch TDs for activity.
[a7e2f0d]150 *
[5f57929]151 * @param[in] uhci_batch Batch structure to use.
[a7e2f0d]152 * @return False, if there is an active TD, true otherwise.
[17ceb72]153 *
154 * Walk all TDs. Stop with false if there is an active one (it is to be
[910ca3f]155 * processed). Stop with true if an error is found. Return true if the last TD
[17ceb72]156 * is reached.
[a7e2f0d]157 */
[ad91b806]158bool uhci_transfer_batch_is_complete(const uhci_transfer_batch_t *uhci_batch)
[4192d3d6]159{
[b991d37]160 assert(uhci_batch);
161 assert(uhci_batch->usb_batch);
[81dce9f]162
[b991d37]163 usb_log_debug2("Batch %p " USB_TRANSFER_BATCH_FMT
164 " checking %zu transfer(s) for completion.\n",
165 uhci_batch->usb_batch,
166 USB_TRANSFER_BATCH_ARGS(*uhci_batch->usb_batch),
167 uhci_batch->td_count);
168 uhci_batch->usb_batch->transfered_size = 0;
[75f9dcd]169
170 for (size_t i = 0;i < uhci_batch->td_count; ++i) {
[b991d37]171 if (td_is_active(&uhci_batch->tds[i])) {
[7dd3318]172 return false;
[600733e]173 }
[c5b93dc]174
[b991d37]175 uhci_batch->usb_batch->error = td_status(&uhci_batch->tds[i]);
176 if (uhci_batch->usb_batch->error != EOK) {
177 assert(uhci_batch->usb_batch->ep != NULL);
178
[b64fbc9]179 usb_log_debug("Batch %p found error TD(%zu->%p):%"
[b991d37]180 PRIx32 ".\n", uhci_batch->usb_batch, i,
[b64fbc9]181 &uhci_batch->tds[i], uhci_batch->tds[i].status);
[b991d37]182 td_print_status(&uhci_batch->tds[i]);
[feb10c88]183
[b991d37]184 endpoint_toggle_set(uhci_batch->usb_batch->ep,
185 td_toggle(&uhci_batch->tds[i]));
[c5b93dc]186 if (i > 0)
187 goto substract_ret;
[7dd3318]188 return true;
189 }
[c5b93dc]190
[b991d37]191 uhci_batch->usb_batch->transfered_size
192 += td_act_size(&uhci_batch->tds[i]);
193 if (td_is_short(&uhci_batch->tds[i]))
[c5b93dc]194 goto substract_ret;
[4192d3d6]195 }
[c5b93dc]196substract_ret:
[b991d37]197 uhci_batch->usb_batch->transfered_size
198 -= uhci_batch->usb_batch->setup_size;
[7dd3318]199 return true;
[4192d3d6]200}
[76fbd9a]201
[f7ac3f3]202/** Direction to pid conversion table */
[25d224c6]203static const usb_packet_id direction_pids[] = {
204 [USB_DIRECTION_IN] = USB_PID_IN,
205 [USB_DIRECTION_OUT] = USB_PID_OUT,
206};
[76fbd9a]207
[910ca3f]208/** Prepare generic data transfer
[a7e2f0d]209 *
[5f57929]210 * @param[in] uhci_batch Batch structure to use.
[25d224c6]211 * @param[in] dir Communication direction.
[17ceb72]212 *
[910ca3f]213 * Transactions with alternating toggle bit and supplied pid value.
[20a1e76]214 * The last transfer is marked with IOC flag.
[a7e2f0d]215 */
[25d224c6]216static void batch_data(uhci_transfer_batch_t *uhci_batch, usb_direction_t dir)
[0e06a14]217{
[b991d37]218 assert(uhci_batch);
219 assert(uhci_batch->usb_batch);
[5d915b7]220 assert(uhci_batch->usb_batch->ep);
[25d224c6]221 assert(dir == USB_DIRECTION_OUT || dir == USB_DIRECTION_IN);
[5d915b7]222
[9a790ad1]223
[25d224c6]224 const usb_packet_id pid = direction_pids[dir];
[b991d37]225 const bool low_speed =
226 uhci_batch->usb_batch->ep->speed == USB_SPEED_LOW;
227 const size_t mps = uhci_batch->usb_batch->ep->max_packet_size;
[56e9fb0]228 const usb_target_t target = {{
[b991d37]229 uhci_batch->usb_batch->ep->address,
[56e9fb0]230 uhci_batch->usb_batch->ep->endpoint }};
[b991d37]231
232 int toggle = endpoint_toggle_get(uhci_batch->usb_batch->ep);
[3e37964]233 assert(toggle == 0 || toggle == 1);
[0e06a14]234
[508a0ca]235 size_t td = 0;
[b991d37]236 size_t remain_size = uhci_batch->usb_batch->buffer_size;
237 char *buffer = uhci_transfer_batch_data_buffer(uhci_batch);
238
[0e06a14]239 while (remain_size > 0) {
[3f162ab]240 const size_t packet_size = min(remain_size, mps);
[c8dd5b1]241
[b991d37]242 const td_t *next_td = (td + 1 < uhci_batch->td_count)
243 ? &uhci_batch->tds[td + 1] : NULL;
[30a4301]244
[b991d37]245 assert(td < uhci_batch->td_count);
[bcaefe3]246 td_init(
[b991d37]247 &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, packet_size,
[910ca3f]248 toggle, false, low_speed, target, pid, buffer, next_td);
[bcaefe3]249
[910ca3f]250 ++td;
[bcaefe3]251 toggle = 1 - toggle;
[910ca3f]252 buffer += packet_size;
[0e06a14]253 remain_size -= packet_size;
254 }
[b991d37]255 td_set_ioc(&uhci_batch->tds[td - 1]);
256 endpoint_toggle_set(uhci_batch->usb_batch->ep, toggle);
[5f57929]257 usb_log_debug2(
258 "Batch %p %s %s " USB_TRANSFER_BATCH_FMT " initialized.\n", \
259 uhci_batch->usb_batch,
[9a790ad1]260 usb_str_transfer_type(uhci_batch->usb_batch->ep->transfer_type),
[5f57929]261 usb_str_direction(uhci_batch->usb_batch->ep->direction),
262 USB_TRANSFER_BATCH_ARGS(*uhci_batch->usb_batch));
[4192d3d6]263}
[76fbd9a]264
[910ca3f]265/** Prepare generic control transfer
[a7e2f0d]266 *
[5f57929]267 * @param[in] uhci_batch Batch structure to use.
[25d224c6]268 * @param[in] dir Communication direction.
[17ceb72]269 *
270 * Setup stage with toggle 0 and USB_PID_SETUP.
[25d224c6]271 * Data stage with alternating toggle and pid determined by the communication
272 * direction.
273 * Status stage with toggle 1 and pid determined by the communication direction.
[20a1e76]274 * The last transfer is marked with IOC.
[a7e2f0d]275 */
[25d224c6]276static void batch_control(uhci_transfer_batch_t *uhci_batch, usb_direction_t dir)
[bdc8ab1]277{
[b991d37]278 assert(uhci_batch);
279 assert(uhci_batch->usb_batch);
280 assert(uhci_batch->usb_batch->ep);
[25d224c6]281 assert(dir == USB_DIRECTION_OUT || dir == USB_DIRECTION_IN);
[b991d37]282 assert(uhci_batch->td_count >= 2);
[25d224c6]283 static const usb_packet_id status_stage_pids[] = {
284 [USB_DIRECTION_IN] = USB_PID_OUT,
285 [USB_DIRECTION_OUT] = USB_PID_IN,
286 };
[b991d37]287
[25d224c6]288 const usb_packet_id data_stage_pid = direction_pids[dir];
289 const usb_packet_id status_stage_pid = status_stage_pids[dir];
[b991d37]290 const bool low_speed =
291 uhci_batch->usb_batch->ep->speed == USB_SPEED_LOW;
292 const size_t mps = uhci_batch->usb_batch->ep->max_packet_size;
[56e9fb0]293 const usb_target_t target = {{
[b991d37]294 uhci_batch->usb_batch->ep->address,
[56e9fb0]295 uhci_batch->usb_batch->ep->endpoint }};
[d017cea]296
[bdc8ab1]297 /* setup stage */
[81dce9f]298 td_init(
[b991d37]299 &uhci_batch->tds[0], DEFAULT_ERROR_COUNT,
300 uhci_batch->usb_batch->setup_size, 0, false,
301 low_speed, target, USB_PID_SETUP,
302 uhci_transfer_batch_setup_buffer(uhci_batch), &uhci_batch->tds[1]);
[bdc8ab1]303
304 /* data stage */
[508a0ca]305 size_t td = 1;
[910ca3f]306 unsigned toggle = 1;
[b991d37]307 size_t remain_size = uhci_batch->usb_batch->buffer_size;
308 char *buffer = uhci_transfer_batch_data_buffer(uhci_batch);
309
[bdc8ab1]310 while (remain_size > 0) {
[3f162ab]311 const size_t packet_size = min(remain_size, mps);
[bdc8ab1]312
[bcaefe3]313 td_init(
[b991d37]314 &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, packet_size,
315 toggle, false, low_speed, target, data_stage_pid,
316 buffer, &uhci_batch->tds[td + 1]);
[bdc8ab1]317
[508a0ca]318 ++td;
[910ca3f]319 toggle = 1 - toggle;
320 buffer += packet_size;
[bdc8ab1]321 remain_size -= packet_size;
[b991d37]322 assert(td < uhci_batch->td_count);
[bdc8ab1]323 }
324
325 /* status stage */
[b991d37]326 assert(td == uhci_batch->td_count - 1);
[4192d3d6]327
[81dce9f]328 td_init(
[b991d37]329 &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, 0, 1, false, low_speed,
330 target, status_stage_pid, NULL, NULL);
331 td_set_ioc(&uhci_batch->tds[td]);
[7dd3318]332
[81dce9f]333 usb_log_debug2("Control last TD status: %x.\n",
[b991d37]334 uhci_batch->tds[td].status);
[4192d3d6]335}
[76fbd9a]336
[790318e]337static void (*const batch_setup[])(uhci_transfer_batch_t*, usb_direction_t) =
[b991d37]338{
[790318e]339 [USB_TRANSFER_CONTROL] = batch_control,
340 [USB_TRANSFER_BULK] = batch_data,
341 [USB_TRANSFER_INTERRUPT] = batch_data,
342 [USB_TRANSFER_ISOCHRONOUS] = NULL,
[b991d37]343};
[4192d3d6]344/**
345 * @}
346 */
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