source: mainline/uspace/drv/bus/usb/uhci/uhci_batch.c

Last change on this file was 0a520db, checked in by Jiří Zárevúcky <zarevucky.jiri@…>, 6 years ago

Change static_assert to its standard definition

  • Property mode set to 100644
File size: 10.2 KB
RevLine 
[4192d3d6]1/*
2 * Copyright (c) 2011 Jan Vesely
[e0a5d4c]3 * Copyright (c) 2018 Ondrej Hlavaty
[4192d3d6]4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
[58563585]29
[c8ea6eca]30/** @addtogroup drvusbuhci
[4192d3d6]31 * @{
32 */
33/** @file
[910ca3f]34 * @brief UHCI driver USB transfer structure
[4192d3d6]35 */
[8064c2f6]36
37#include <assert.h>
[4192d3d6]38#include <errno.h>
[3f162ab]39#include <macros.h>
[8064c2f6]40#include <mem.h>
41#include <stdlib.h>
[4192d3d6]42
[bdc8ab1]43#include <usb/usb.h>
[4192d3d6]44#include <usb/debug.h>
[8064c2f6]45#include <usb/host/endpoint.h>
[8fc61c8]46#include <usb/host/utils/malloc32.h>
[4192d3d6]47
[07f49ae]48#include "uhci_batch.h"
[c6f82e5]49#include "hc.h"
[87644b4]50#include "hw_struct/transfer_descriptor.h"
[4192d3d6]51
52#define DEFAULT_ERROR_COUNT 3
[3afb758]53
[5fd9c30]54/** Transfer batch setup table. */
[18b6a88]55static void (*const batch_setup[])(uhci_transfer_batch_t *);
[76fbd9a]56
[5fd9c30]57/** Destroys uhci_transfer_batch_t structure.
[28d9c95]58 *
[5fd9c30]59 * @param[in] uhci_batch Instance to destroy.
[28d9c95]60 */
[5fd9c30]61void uhci_transfer_batch_destroy(uhci_transfer_batch_t *uhci_batch)
[2cc6e97]62{
[b991d37]63 assert(uhci_batch);
[c21e6a5]64 dma_buffer_free(&uhci_batch->uhci_dma_buffer);
[5fd9c30]65 free(uhci_batch);
[2cc6e97]66}
[76fbd9a]67
[17ceb72]68/** Allocate memory and initialize internal data structure.
[a7e2f0d]69 *
[f7ac3f3]70 * @param[in] usb_batch Pointer to generic USB batch structure.
[f706355]71 * @return Valid pointer if all structures were successfully created,
[17ceb72]72 * NULL otherwise.
[5fd9c30]73 */
[18b6a88]74uhci_transfer_batch_t *uhci_transfer_batch_create(endpoint_t *ep)
[5fd9c30]75{
76 uhci_transfer_batch_t *uhci_batch =
77 calloc(1, sizeof(uhci_transfer_batch_t));
78 if (!uhci_batch) {
[a1732929]79 usb_log_error("Failed to allocate UHCI batch.");
[5fd9c30]80 return NULL;
81 }
82
83 usb_transfer_batch_init(&uhci_batch->base, ep);
84
85 link_initialize(&uhci_batch->link);
86 return uhci_batch;
87}
88
[7c3fb9b]89/*
90 * Prepares batch for committing.
[17ceb72]91 *
[508a0ca]92 * Determines the number of needed transfer descriptors (TDs).
93 * Prepares a transport buffer (that is accessible by the hardware).
[910ca3f]94 * Initializes parameters needed for the transfer and callback.
[a7e2f0d]95 */
[5fd9c30]96int uhci_transfer_batch_prepare(uhci_transfer_batch_t *uhci_batch)
[4192d3d6]97{
[0a520db]98 static_assert((sizeof(td_t) % 16) == 0, "");
[2ab6875]99
[5fd9c30]100 usb_transfer_batch_t *usb_batch = &uhci_batch->base;
101
[18b6a88]102 uhci_batch->td_count = (usb_batch->size + usb_batch->ep->max_packet_size - 1) /
103 usb_batch->ep->max_packet_size;
[5fd9c30]104
[b991d37]105 if (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) {
106 uhci_batch->td_count += 2;
[7dd3318]107 }
108
[18b6a88]109 const size_t setup_size = (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) ?
110 USB_SETUP_PACKET_SIZE :
111 0;
[5fd9c30]112
[18b6a88]113 const size_t total_size = (sizeof(td_t) * uhci_batch->td_count) +
114 sizeof(qh_t) + setup_size;
[c21e6a5]115
116 if (dma_buffer_alloc(&uhci_batch->uhci_dma_buffer, total_size)) {
[a1732929]117 usb_log_error("Failed to allocate UHCI buffer.");
[5fd9c30]118 return ENOMEM;
119 }
[c21e6a5]120 memset(uhci_batch->uhci_dma_buffer.virt, 0, total_size);
[4192d3d6]121
[c21e6a5]122 uhci_batch->tds = uhci_batch->uhci_dma_buffer.virt;
123 uhci_batch->qh = (qh_t *) &uhci_batch->tds[uhci_batch->td_count];
[2cc6e97]124
[b991d37]125 qh_init(uhci_batch->qh);
126 qh_set_element_td(uhci_batch->qh, &uhci_batch->tds[0]);
[2cc6e97]127
[c21e6a5]128 void *setup_buffer = uhci_transfer_batch_setup_buffer(uhci_batch);
129 assert(setup_buffer == (void *) (uhci_batch->qh + 1));
[b991d37]130 /* Copy SETUP packet data to the device buffer */
[c21e6a5]131 memcpy(setup_buffer, usb_batch->setup.buffer, setup_size);
132
[c4fb5ecd]133 usb_log_debug2("Batch %p " USB_TRANSFER_BATCH_FMT
[a1732929]134 " memory structures ready.", usb_batch,
[b991d37]135 USB_TRANSFER_BATCH_ARGS(*usb_batch));
[5d915b7]136
[790318e]137 assert(batch_setup[usb_batch->ep->transfer_type]);
[5fd9c30]138 batch_setup[usb_batch->ep->transfer_type](uhci_batch);
[b991d37]139
[5fd9c30]140 return EOK;
[4192d3d6]141}
[76fbd9a]142
[17ceb72]143/** Check batch TDs for activity.
[a7e2f0d]144 *
[5f57929]145 * @param[in] uhci_batch Batch structure to use.
[a7e2f0d]146 * @return False, if there is an active TD, true otherwise.
[17ceb72]147 *
148 * Walk all TDs. Stop with false if there is an active one (it is to be
[910ca3f]149 * processed). Stop with true if an error is found. Return true if the last TD
[17ceb72]150 * is reached.
[a7e2f0d]151 */
[5fd9c30]152bool uhci_transfer_batch_check_completed(uhci_transfer_batch_t *uhci_batch)
[4192d3d6]153{
[b991d37]154 assert(uhci_batch);
[17873ac7]155 usb_transfer_batch_t *batch = &uhci_batch->base;
[81dce9f]156
[b991d37]157 usb_log_debug2("Batch %p " USB_TRANSFER_BATCH_FMT
[a1732929]158 " checking %zu transfer(s) for completion.",
[17873ac7]159 uhci_batch, USB_TRANSFER_BATCH_ARGS(*batch),
[b991d37]160 uhci_batch->td_count);
[db51a6a6]161 batch->transferred_size = 0;
[75f9dcd]162
[c6f82e5]163 uhci_endpoint_t *uhci_ep = (uhci_endpoint_t *) batch->ep;
164
[18b6a88]165 for (size_t i = 0; i < uhci_batch->td_count; ++i) {
[b991d37]166 if (td_is_active(&uhci_batch->tds[i])) {
[7dd3318]167 return false;
[600733e]168 }
[c5b93dc]169
[17873ac7]170 batch->error = td_status(&uhci_batch->tds[i]);
171 if (batch->error != EOK) {
172 assert(batch->ep != NULL);
[b991d37]173
[b64fbc9]174 usb_log_debug("Batch %p found error TD(%zu->%p):%"
[a1732929]175 PRIx32 ".", uhci_batch, i,
[b64fbc9]176 &uhci_batch->tds[i], uhci_batch->tds[i].status);
[b991d37]177 td_print_status(&uhci_batch->tds[i]);
[feb10c88]178
[c6f82e5]179 uhci_ep->toggle = td_toggle(&uhci_batch->tds[i]);
[2755a622]180 goto substract_ret;
[7dd3318]181 }
[c5b93dc]182
[18b6a88]183 batch->transferred_size +=
184 td_act_size(&uhci_batch->tds[i]);
[b991d37]185 if (td_is_short(&uhci_batch->tds[i]))
[c5b93dc]186 goto substract_ret;
[4192d3d6]187 }
[c5b93dc]188substract_ret:
[db51a6a6]189 if (batch->transferred_size > 0 && batch->ep->transfer_type == USB_TRANSFER_CONTROL) {
190 assert(batch->transferred_size >= USB_SETUP_PACKET_SIZE);
191 batch->transferred_size -= USB_SETUP_PACKET_SIZE;
[2755a622]192 }
[17873ac7]193
[1d758fc]194 assert(batch->transferred_size <= batch->size);
[17873ac7]195
[7dd3318]196 return true;
[4192d3d6]197}
[76fbd9a]198
[f7ac3f3]199/** Direction to pid conversion table */
[25d224c6]200static const usb_packet_id direction_pids[] = {
201 [USB_DIRECTION_IN] = USB_PID_IN,
202 [USB_DIRECTION_OUT] = USB_PID_OUT,
203};
[76fbd9a]204
[910ca3f]205/** Prepare generic data transfer
[a7e2f0d]206 *
[5f57929]207 * @param[in] uhci_batch Batch structure to use.
[25d224c6]208 * @param[in] dir Communication direction.
[17ceb72]209 *
[910ca3f]210 * Transactions with alternating toggle bit and supplied pid value.
[20a1e76]211 * The last transfer is marked with IOC flag.
[a7e2f0d]212 */
[5fd9c30]213static void batch_data(uhci_transfer_batch_t *uhci_batch)
[0e06a14]214{
[b991d37]215 assert(uhci_batch);
[5fd9c30]216
217 usb_direction_t dir = uhci_batch->base.dir;
[25d224c6]218 assert(dir == USB_DIRECTION_OUT || dir == USB_DIRECTION_IN);
[5d915b7]219
[25d224c6]220 const usb_packet_id pid = direction_pids[dir];
[b991d37]221 const bool low_speed =
[888238e9]222 uhci_batch->base.ep->device->speed == USB_SPEED_LOW;
[5fd9c30]223 const size_t mps = uhci_batch->base.ep->max_packet_size;
[b991d37]224
[c6f82e5]225 uhci_endpoint_t *uhci_ep = (uhci_endpoint_t *) uhci_batch->base.ep;
226
227 int toggle = uhci_ep->toggle;
[3e37964]228 assert(toggle == 0 || toggle == 1);
[0e06a14]229
[508a0ca]230 size_t td = 0;
[1d758fc]231 size_t remain_size = uhci_batch->base.size;
[b991d37]232 char *buffer = uhci_transfer_batch_data_buffer(uhci_batch);
233
[0e06a14]234 while (remain_size > 0) {
[3f162ab]235 const size_t packet_size = min(remain_size, mps);
[c8dd5b1]236
[18b6a88]237 const td_t *next_td = (td + 1 < uhci_batch->td_count) ?
238 &uhci_batch->tds[td + 1] : NULL;
[30a4301]239
[b991d37]240 assert(td < uhci_batch->td_count);
[bcaefe3]241 td_init(
[b991d37]242 &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, packet_size,
[a5b3de6]243 toggle, false, low_speed, uhci_batch->base.target, pid, buffer, next_td);
[bcaefe3]244
[910ca3f]245 ++td;
[bcaefe3]246 toggle = 1 - toggle;
[910ca3f]247 buffer += packet_size;
[0e06a14]248 remain_size -= packet_size;
249 }
[b991d37]250 td_set_ioc(&uhci_batch->tds[td - 1]);
[c6f82e5]251 uhci_ep->toggle = toggle;
[5f57929]252 usb_log_debug2(
[5ef16903]253 "Batch %p %s %s " USB_TRANSFER_BATCH_FMT " initialized.",
[58ac3ec]254 uhci_batch,
[5fd9c30]255 usb_str_transfer_type(uhci_batch->base.ep->transfer_type),
256 usb_str_direction(uhci_batch->base.ep->direction),
[58ac3ec]257 USB_TRANSFER_BATCH_ARGS(uhci_batch->base));
[4192d3d6]258}
[76fbd9a]259
[910ca3f]260/** Prepare generic control transfer
[a7e2f0d]261 *
[5f57929]262 * @param[in] uhci_batch Batch structure to use.
[25d224c6]263 * @param[in] dir Communication direction.
[17ceb72]264 *
265 * Setup stage with toggle 0 and USB_PID_SETUP.
[25d224c6]266 * Data stage with alternating toggle and pid determined by the communication
267 * direction.
268 * Status stage with toggle 1 and pid determined by the communication direction.
[20a1e76]269 * The last transfer is marked with IOC.
[a7e2f0d]270 */
[5fd9c30]271static void batch_control(uhci_transfer_batch_t *uhci_batch)
[bdc8ab1]272{
[b991d37]273 assert(uhci_batch);
[5fd9c30]274
275 usb_direction_t dir = uhci_batch->base.dir;
[25d224c6]276 assert(dir == USB_DIRECTION_OUT || dir == USB_DIRECTION_IN);
[b991d37]277 assert(uhci_batch->td_count >= 2);
[25d224c6]278 static const usb_packet_id status_stage_pids[] = {
279 [USB_DIRECTION_IN] = USB_PID_OUT,
280 [USB_DIRECTION_OUT] = USB_PID_IN,
281 };
[b991d37]282
[25d224c6]283 const usb_packet_id data_stage_pid = direction_pids[dir];
284 const usb_packet_id status_stage_pid = status_stage_pids[dir];
[b991d37]285 const bool low_speed =
[888238e9]286 uhci_batch->base.ep->device->speed == USB_SPEED_LOW;
[5fd9c30]287 const size_t mps = uhci_batch->base.ep->max_packet_size;
[a5b3de6]288 const usb_target_t target = uhci_batch->base.target;
[d017cea]289
[bdc8ab1]290 /* setup stage */
[81dce9f]291 td_init(
[b991d37]292 &uhci_batch->tds[0], DEFAULT_ERROR_COUNT,
[5fd9c30]293 USB_SETUP_PACKET_SIZE, 0, false,
[b991d37]294 low_speed, target, USB_PID_SETUP,
295 uhci_transfer_batch_setup_buffer(uhci_batch), &uhci_batch->tds[1]);
[bdc8ab1]296
297 /* data stage */
[508a0ca]298 size_t td = 1;
[910ca3f]299 unsigned toggle = 1;
[1d758fc]300 size_t remain_size = uhci_batch->base.size;
[b991d37]301 char *buffer = uhci_transfer_batch_data_buffer(uhci_batch);
302
[bdc8ab1]303 while (remain_size > 0) {
[3f162ab]304 const size_t packet_size = min(remain_size, mps);
[bdc8ab1]305
[bcaefe3]306 td_init(
[b991d37]307 &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, packet_size,
308 toggle, false, low_speed, target, data_stage_pid,
309 buffer, &uhci_batch->tds[td + 1]);
[bdc8ab1]310
[508a0ca]311 ++td;
[910ca3f]312 toggle = 1 - toggle;
313 buffer += packet_size;
[bdc8ab1]314 remain_size -= packet_size;
[b991d37]315 assert(td < uhci_batch->td_count);
[bdc8ab1]316 }
317
318 /* status stage */
[b991d37]319 assert(td == uhci_batch->td_count - 1);
[4192d3d6]320
[81dce9f]321 td_init(
[b991d37]322 &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, 0, 1, false, low_speed,
323 target, status_stage_pid, NULL, NULL);
324 td_set_ioc(&uhci_batch->tds[td]);
[7dd3318]325
[a1732929]326 usb_log_debug2("Control last TD status: %x.",
[b991d37]327 uhci_batch->tds[td].status);
[4192d3d6]328}
[76fbd9a]329
[18b6a88]330static void (*const batch_setup[])(uhci_transfer_batch_t *) =
331 {
[790318e]332 [USB_TRANSFER_CONTROL] = batch_control,
333 [USB_TRANSFER_BULK] = batch_data,
334 [USB_TRANSFER_INTERRUPT] = batch_data,
335 [USB_TRANSFER_ISOCHRONOUS] = NULL,
[b991d37]336};
[4192d3d6]337/**
338 * @}
339 */
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