[4192d3d6] | 1 | /*
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| 2 | * Copyright (c) 2011 Jan Vesely
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[e0a5d4c] | 3 | * Copyright (c) 2018 Ondrej Hlavaty
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[4192d3d6] | 4 | * All rights reserved.
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| 5 | *
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| 6 | * Redistribution and use in source and binary forms, with or without
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| 7 | * modification, are permitted provided that the following conditions
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| 8 | * are met:
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| 9 | *
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| 10 | * - Redistributions of source code must retain the above copyright
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| 11 | * notice, this list of conditions and the following disclaimer.
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| 12 | * - Redistributions in binary form must reproduce the above copyright
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| 13 | * notice, this list of conditions and the following disclaimer in the
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| 14 | * documentation and/or other materials provided with the distribution.
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| 15 | * - The name of the author may not be used to endorse or promote products
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| 16 | * derived from this software without specific prior written permission.
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| 17 | *
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| 18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 28 | */
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[58563585] | 29 |
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[c8ea6eca] | 30 | /** @addtogroup drvusbuhci
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[4192d3d6] | 31 | * @{
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| 32 | */
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| 33 | /** @file
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[910ca3f] | 34 | * @brief UHCI driver USB transfer structure
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[4192d3d6] | 35 | */
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[8064c2f6] | 36 |
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| 37 | #include <assert.h>
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[4192d3d6] | 38 | #include <errno.h>
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[3f162ab] | 39 | #include <macros.h>
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[8064c2f6] | 40 | #include <mem.h>
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| 41 | #include <stdlib.h>
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[4192d3d6] | 42 |
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[bdc8ab1] | 43 | #include <usb/usb.h>
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[4192d3d6] | 44 | #include <usb/debug.h>
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[8064c2f6] | 45 | #include <usb/host/endpoint.h>
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[8fc61c8] | 46 | #include <usb/host/utils/malloc32.h>
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[4192d3d6] | 47 |
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[07f49ae] | 48 | #include "uhci_batch.h"
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[c6f82e5] | 49 | #include "hc.h"
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[87644b4] | 50 | #include "hw_struct/transfer_descriptor.h"
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[4192d3d6] | 51 |
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| 52 | #define DEFAULT_ERROR_COUNT 3
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[3afb758] | 53 |
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[5fd9c30] | 54 | /** Transfer batch setup table. */
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[18b6a88] | 55 | static void (*const batch_setup[])(uhci_transfer_batch_t *);
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[76fbd9a] | 56 |
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[5fd9c30] | 57 | /** Destroys uhci_transfer_batch_t structure.
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[28d9c95] | 58 | *
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[5fd9c30] | 59 | * @param[in] uhci_batch Instance to destroy.
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[28d9c95] | 60 | */
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[5fd9c30] | 61 | void uhci_transfer_batch_destroy(uhci_transfer_batch_t *uhci_batch)
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[2cc6e97] | 62 | {
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[b991d37] | 63 | assert(uhci_batch);
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[c21e6a5] | 64 | dma_buffer_free(&uhci_batch->uhci_dma_buffer);
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[5fd9c30] | 65 | free(uhci_batch);
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[2cc6e97] | 66 | }
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[76fbd9a] | 67 |
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[17ceb72] | 68 | /** Allocate memory and initialize internal data structure.
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[a7e2f0d] | 69 | *
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[f7ac3f3] | 70 | * @param[in] usb_batch Pointer to generic USB batch structure.
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[f706355] | 71 | * @return Valid pointer if all structures were successfully created,
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[17ceb72] | 72 | * NULL otherwise.
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[5fd9c30] | 73 | */
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[18b6a88] | 74 | uhci_transfer_batch_t *uhci_transfer_batch_create(endpoint_t *ep)
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[5fd9c30] | 75 | {
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| 76 | uhci_transfer_batch_t *uhci_batch =
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| 77 | calloc(1, sizeof(uhci_transfer_batch_t));
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| 78 | if (!uhci_batch) {
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[a1732929] | 79 | usb_log_error("Failed to allocate UHCI batch.");
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[5fd9c30] | 80 | return NULL;
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| 81 | }
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| 82 |
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| 83 | usb_transfer_batch_init(&uhci_batch->base, ep);
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| 84 |
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| 85 | link_initialize(&uhci_batch->link);
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| 86 | return uhci_batch;
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| 87 | }
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| 88 |
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[7c3fb9b] | 89 | /*
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| 90 | * Prepares batch for committing.
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[17ceb72] | 91 | *
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[508a0ca] | 92 | * Determines the number of needed transfer descriptors (TDs).
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| 93 | * Prepares a transport buffer (that is accessible by the hardware).
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[910ca3f] | 94 | * Initializes parameters needed for the transfer and callback.
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[a7e2f0d] | 95 | */
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[5fd9c30] | 96 | int uhci_transfer_batch_prepare(uhci_transfer_batch_t *uhci_batch)
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[4192d3d6] | 97 | {
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[0a520db] | 98 | static_assert((sizeof(td_t) % 16) == 0, "");
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[2ab6875] | 99 |
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[5fd9c30] | 100 | usb_transfer_batch_t *usb_batch = &uhci_batch->base;
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| 101 |
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[18b6a88] | 102 | uhci_batch->td_count = (usb_batch->size + usb_batch->ep->max_packet_size - 1) /
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| 103 | usb_batch->ep->max_packet_size;
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[5fd9c30] | 104 |
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[b991d37] | 105 | if (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) {
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| 106 | uhci_batch->td_count += 2;
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[7dd3318] | 107 | }
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| 108 |
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[18b6a88] | 109 | const size_t setup_size = (usb_batch->ep->transfer_type == USB_TRANSFER_CONTROL) ?
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| 110 | USB_SETUP_PACKET_SIZE :
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| 111 | 0;
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[5fd9c30] | 112 |
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[18b6a88] | 113 | const size_t total_size = (sizeof(td_t) * uhci_batch->td_count) +
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| 114 | sizeof(qh_t) + setup_size;
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[c21e6a5] | 115 |
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| 116 | if (dma_buffer_alloc(&uhci_batch->uhci_dma_buffer, total_size)) {
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[a1732929] | 117 | usb_log_error("Failed to allocate UHCI buffer.");
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[5fd9c30] | 118 | return ENOMEM;
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| 119 | }
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[c21e6a5] | 120 | memset(uhci_batch->uhci_dma_buffer.virt, 0, total_size);
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[4192d3d6] | 121 |
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[c21e6a5] | 122 | uhci_batch->tds = uhci_batch->uhci_dma_buffer.virt;
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| 123 | uhci_batch->qh = (qh_t *) &uhci_batch->tds[uhci_batch->td_count];
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[2cc6e97] | 124 |
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[b991d37] | 125 | qh_init(uhci_batch->qh);
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| 126 | qh_set_element_td(uhci_batch->qh, &uhci_batch->tds[0]);
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[2cc6e97] | 127 |
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[c21e6a5] | 128 | void *setup_buffer = uhci_transfer_batch_setup_buffer(uhci_batch);
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| 129 | assert(setup_buffer == (void *) (uhci_batch->qh + 1));
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[b991d37] | 130 | /* Copy SETUP packet data to the device buffer */
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[c21e6a5] | 131 | memcpy(setup_buffer, usb_batch->setup.buffer, setup_size);
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| 132 |
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[c4fb5ecd] | 133 | usb_log_debug2("Batch %p " USB_TRANSFER_BATCH_FMT
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[a1732929] | 134 | " memory structures ready.", usb_batch,
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[b991d37] | 135 | USB_TRANSFER_BATCH_ARGS(*usb_batch));
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[5d915b7] | 136 |
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[790318e] | 137 | assert(batch_setup[usb_batch->ep->transfer_type]);
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[5fd9c30] | 138 | batch_setup[usb_batch->ep->transfer_type](uhci_batch);
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[b991d37] | 139 |
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[5fd9c30] | 140 | return EOK;
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[4192d3d6] | 141 | }
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[76fbd9a] | 142 |
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[17ceb72] | 143 | /** Check batch TDs for activity.
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[a7e2f0d] | 144 | *
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[5f57929] | 145 | * @param[in] uhci_batch Batch structure to use.
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[a7e2f0d] | 146 | * @return False, if there is an active TD, true otherwise.
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[17ceb72] | 147 | *
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| 148 | * Walk all TDs. Stop with false if there is an active one (it is to be
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[910ca3f] | 149 | * processed). Stop with true if an error is found. Return true if the last TD
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[17ceb72] | 150 | * is reached.
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[a7e2f0d] | 151 | */
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[5fd9c30] | 152 | bool uhci_transfer_batch_check_completed(uhci_transfer_batch_t *uhci_batch)
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[4192d3d6] | 153 | {
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[b991d37] | 154 | assert(uhci_batch);
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[17873ac7] | 155 | usb_transfer_batch_t *batch = &uhci_batch->base;
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[81dce9f] | 156 |
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[b991d37] | 157 | usb_log_debug2("Batch %p " USB_TRANSFER_BATCH_FMT
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[a1732929] | 158 | " checking %zu transfer(s) for completion.",
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[17873ac7] | 159 | uhci_batch, USB_TRANSFER_BATCH_ARGS(*batch),
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[b991d37] | 160 | uhci_batch->td_count);
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[db51a6a6] | 161 | batch->transferred_size = 0;
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[75f9dcd] | 162 |
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[c6f82e5] | 163 | uhci_endpoint_t *uhci_ep = (uhci_endpoint_t *) batch->ep;
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| 164 |
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[18b6a88] | 165 | for (size_t i = 0; i < uhci_batch->td_count; ++i) {
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[b991d37] | 166 | if (td_is_active(&uhci_batch->tds[i])) {
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[7dd3318] | 167 | return false;
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[600733e] | 168 | }
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[c5b93dc] | 169 |
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[17873ac7] | 170 | batch->error = td_status(&uhci_batch->tds[i]);
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| 171 | if (batch->error != EOK) {
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| 172 | assert(batch->ep != NULL);
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[b991d37] | 173 |
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[b64fbc9] | 174 | usb_log_debug("Batch %p found error TD(%zu->%p):%"
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[a1732929] | 175 | PRIx32 ".", uhci_batch, i,
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[b64fbc9] | 176 | &uhci_batch->tds[i], uhci_batch->tds[i].status);
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[b991d37] | 177 | td_print_status(&uhci_batch->tds[i]);
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[feb10c88] | 178 |
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[c6f82e5] | 179 | uhci_ep->toggle = td_toggle(&uhci_batch->tds[i]);
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[2755a622] | 180 | goto substract_ret;
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[7dd3318] | 181 | }
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[c5b93dc] | 182 |
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[18b6a88] | 183 | batch->transferred_size +=
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| 184 | td_act_size(&uhci_batch->tds[i]);
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[b991d37] | 185 | if (td_is_short(&uhci_batch->tds[i]))
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[c5b93dc] | 186 | goto substract_ret;
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[4192d3d6] | 187 | }
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[c5b93dc] | 188 | substract_ret:
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[db51a6a6] | 189 | if (batch->transferred_size > 0 && batch->ep->transfer_type == USB_TRANSFER_CONTROL) {
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| 190 | assert(batch->transferred_size >= USB_SETUP_PACKET_SIZE);
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| 191 | batch->transferred_size -= USB_SETUP_PACKET_SIZE;
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[2755a622] | 192 | }
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[17873ac7] | 193 |
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[1d758fc] | 194 | assert(batch->transferred_size <= batch->size);
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[17873ac7] | 195 |
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[7dd3318] | 196 | return true;
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[4192d3d6] | 197 | }
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[76fbd9a] | 198 |
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[f7ac3f3] | 199 | /** Direction to pid conversion table */
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[25d224c6] | 200 | static const usb_packet_id direction_pids[] = {
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| 201 | [USB_DIRECTION_IN] = USB_PID_IN,
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| 202 | [USB_DIRECTION_OUT] = USB_PID_OUT,
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| 203 | };
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[76fbd9a] | 204 |
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[910ca3f] | 205 | /** Prepare generic data transfer
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[a7e2f0d] | 206 | *
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[5f57929] | 207 | * @param[in] uhci_batch Batch structure to use.
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[25d224c6] | 208 | * @param[in] dir Communication direction.
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[17ceb72] | 209 | *
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[910ca3f] | 210 | * Transactions with alternating toggle bit and supplied pid value.
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[20a1e76] | 211 | * The last transfer is marked with IOC flag.
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[a7e2f0d] | 212 | */
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[5fd9c30] | 213 | static void batch_data(uhci_transfer_batch_t *uhci_batch)
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[0e06a14] | 214 | {
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[b991d37] | 215 | assert(uhci_batch);
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[5fd9c30] | 216 |
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| 217 | usb_direction_t dir = uhci_batch->base.dir;
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[25d224c6] | 218 | assert(dir == USB_DIRECTION_OUT || dir == USB_DIRECTION_IN);
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[5d915b7] | 219 |
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[25d224c6] | 220 | const usb_packet_id pid = direction_pids[dir];
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[b991d37] | 221 | const bool low_speed =
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[888238e9] | 222 | uhci_batch->base.ep->device->speed == USB_SPEED_LOW;
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[5fd9c30] | 223 | const size_t mps = uhci_batch->base.ep->max_packet_size;
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[b991d37] | 224 |
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[c6f82e5] | 225 | uhci_endpoint_t *uhci_ep = (uhci_endpoint_t *) uhci_batch->base.ep;
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| 226 |
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| 227 | int toggle = uhci_ep->toggle;
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[3e37964] | 228 | assert(toggle == 0 || toggle == 1);
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[0e06a14] | 229 |
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[508a0ca] | 230 | size_t td = 0;
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[1d758fc] | 231 | size_t remain_size = uhci_batch->base.size;
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[b991d37] | 232 | char *buffer = uhci_transfer_batch_data_buffer(uhci_batch);
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| 233 |
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[0e06a14] | 234 | while (remain_size > 0) {
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[3f162ab] | 235 | const size_t packet_size = min(remain_size, mps);
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[c8dd5b1] | 236 |
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[18b6a88] | 237 | const td_t *next_td = (td + 1 < uhci_batch->td_count) ?
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| 238 | &uhci_batch->tds[td + 1] : NULL;
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[30a4301] | 239 |
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[b991d37] | 240 | assert(td < uhci_batch->td_count);
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[bcaefe3] | 241 | td_init(
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[b991d37] | 242 | &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, packet_size,
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[a5b3de6] | 243 | toggle, false, low_speed, uhci_batch->base.target, pid, buffer, next_td);
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[bcaefe3] | 244 |
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[910ca3f] | 245 | ++td;
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[bcaefe3] | 246 | toggle = 1 - toggle;
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[910ca3f] | 247 | buffer += packet_size;
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[0e06a14] | 248 | remain_size -= packet_size;
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| 249 | }
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[b991d37] | 250 | td_set_ioc(&uhci_batch->tds[td - 1]);
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[c6f82e5] | 251 | uhci_ep->toggle = toggle;
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[5f57929] | 252 | usb_log_debug2(
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[5ef16903] | 253 | "Batch %p %s %s " USB_TRANSFER_BATCH_FMT " initialized.",
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[58ac3ec] | 254 | uhci_batch,
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[5fd9c30] | 255 | usb_str_transfer_type(uhci_batch->base.ep->transfer_type),
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| 256 | usb_str_direction(uhci_batch->base.ep->direction),
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[58ac3ec] | 257 | USB_TRANSFER_BATCH_ARGS(uhci_batch->base));
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[4192d3d6] | 258 | }
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[76fbd9a] | 259 |
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[910ca3f] | 260 | /** Prepare generic control transfer
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[a7e2f0d] | 261 | *
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[5f57929] | 262 | * @param[in] uhci_batch Batch structure to use.
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[25d224c6] | 263 | * @param[in] dir Communication direction.
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[17ceb72] | 264 | *
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| 265 | * Setup stage with toggle 0 and USB_PID_SETUP.
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[25d224c6] | 266 | * Data stage with alternating toggle and pid determined by the communication
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| 267 | * direction.
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| 268 | * Status stage with toggle 1 and pid determined by the communication direction.
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[20a1e76] | 269 | * The last transfer is marked with IOC.
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[a7e2f0d] | 270 | */
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[5fd9c30] | 271 | static void batch_control(uhci_transfer_batch_t *uhci_batch)
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[bdc8ab1] | 272 | {
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[b991d37] | 273 | assert(uhci_batch);
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[5fd9c30] | 274 |
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| 275 | usb_direction_t dir = uhci_batch->base.dir;
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[25d224c6] | 276 | assert(dir == USB_DIRECTION_OUT || dir == USB_DIRECTION_IN);
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[b991d37] | 277 | assert(uhci_batch->td_count >= 2);
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[25d224c6] | 278 | static const usb_packet_id status_stage_pids[] = {
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| 279 | [USB_DIRECTION_IN] = USB_PID_OUT,
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| 280 | [USB_DIRECTION_OUT] = USB_PID_IN,
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| 281 | };
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[b991d37] | 282 |
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[25d224c6] | 283 | const usb_packet_id data_stage_pid = direction_pids[dir];
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| 284 | const usb_packet_id status_stage_pid = status_stage_pids[dir];
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[b991d37] | 285 | const bool low_speed =
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[888238e9] | 286 | uhci_batch->base.ep->device->speed == USB_SPEED_LOW;
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[5fd9c30] | 287 | const size_t mps = uhci_batch->base.ep->max_packet_size;
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[a5b3de6] | 288 | const usb_target_t target = uhci_batch->base.target;
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[d017cea] | 289 |
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[bdc8ab1] | 290 | /* setup stage */
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[81dce9f] | 291 | td_init(
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[b991d37] | 292 | &uhci_batch->tds[0], DEFAULT_ERROR_COUNT,
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[5fd9c30] | 293 | USB_SETUP_PACKET_SIZE, 0, false,
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[b991d37] | 294 | low_speed, target, USB_PID_SETUP,
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| 295 | uhci_transfer_batch_setup_buffer(uhci_batch), &uhci_batch->tds[1]);
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[bdc8ab1] | 296 |
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| 297 | /* data stage */
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[508a0ca] | 298 | size_t td = 1;
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[910ca3f] | 299 | unsigned toggle = 1;
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[1d758fc] | 300 | size_t remain_size = uhci_batch->base.size;
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[b991d37] | 301 | char *buffer = uhci_transfer_batch_data_buffer(uhci_batch);
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| 302 |
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[bdc8ab1] | 303 | while (remain_size > 0) {
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[3f162ab] | 304 | const size_t packet_size = min(remain_size, mps);
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[bdc8ab1] | 305 |
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[bcaefe3] | 306 | td_init(
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[b991d37] | 307 | &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, packet_size,
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| 308 | toggle, false, low_speed, target, data_stage_pid,
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| 309 | buffer, &uhci_batch->tds[td + 1]);
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[bdc8ab1] | 310 |
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[508a0ca] | 311 | ++td;
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[910ca3f] | 312 | toggle = 1 - toggle;
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| 313 | buffer += packet_size;
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[bdc8ab1] | 314 | remain_size -= packet_size;
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[b991d37] | 315 | assert(td < uhci_batch->td_count);
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[bdc8ab1] | 316 | }
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| 317 |
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| 318 | /* status stage */
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[b991d37] | 319 | assert(td == uhci_batch->td_count - 1);
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[4192d3d6] | 320 |
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[81dce9f] | 321 | td_init(
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[b991d37] | 322 | &uhci_batch->tds[td], DEFAULT_ERROR_COUNT, 0, 1, false, low_speed,
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| 323 | target, status_stage_pid, NULL, NULL);
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| 324 | td_set_ioc(&uhci_batch->tds[td]);
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[7dd3318] | 325 |
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[a1732929] | 326 | usb_log_debug2("Control last TD status: %x.",
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[b991d37] | 327 | uhci_batch->tds[td].status);
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[4192d3d6] | 328 | }
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[76fbd9a] | 329 |
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[18b6a88] | 330 | static void (*const batch_setup[])(uhci_transfer_batch_t *) =
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| 331 | {
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[790318e] | 332 | [USB_TRANSFER_CONTROL] = batch_control,
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| 333 | [USB_TRANSFER_BULK] = batch_data,
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| 334 | [USB_TRANSFER_INTERRUPT] = batch_data,
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| 335 | [USB_TRANSFER_ISOCHRONOUS] = NULL,
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[b991d37] | 336 | };
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[4192d3d6] | 337 | /**
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| 338 | * @}
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| 339 | */
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