source: mainline/uspace/drv/bus/usb/ohci/hc.c@ dbb9663

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since dbb9663 was aa81adc, checked in by Jan Vesely <jano.vesely@…>, 14 years ago

libusbhost: endpoint_t uses get/destroy pair, instead of init/destroy.

endpoint_init always returned EOK, thus allocation could be moved in.
Also, it makes no sense to create this structures on stack.

  • Property mode set to 100644
File size: 21.1 KB
Line 
1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvusbohcihc
29 * @{
30 */
31/** @file
32 * @brief OHCI Host controller driver routines
33 */
34#include <errno.h>
35#include <str_error.h>
36#include <adt/list.h>
37#include <libarch/ddi.h>
38
39#include <usb/debug.h>
40#include <usb/usb.h>
41#include <usb/ddfiface.h>
42
43#include "hc.h"
44#include "hcd_endpoint.h"
45
46#define OHCI_USED_INTERRUPTS \
47 (I_SO | I_WDH | I_UE | I_RHSC)
48
49static const irq_cmd_t ohci_irq_commands[] =
50{
51 { .cmd = CMD_MEM_READ_32, .dstarg = 1, .addr = NULL /*filled later*/ },
52 { .cmd = CMD_BTEST, .srcarg = 1, .dstarg = 2, .value = OHCI_USED_INTERRUPTS },
53 { .cmd = CMD_PREDICATE, .srcarg = 2, .value = 2 },
54 { .cmd = CMD_MEM_WRITE_A_32, .srcarg = 1, .addr = NULL /*filled later*/ },
55 { .cmd = CMD_ACCEPT },
56};
57
58static void hc_gain_control(hc_t *instance);
59static void hc_start(hc_t *instance);
60static int hc_init_transfer_lists(hc_t *instance);
61static int hc_init_memory(hc_t *instance);
62static int interrupt_emulator(hc_t *instance);
63
64/*----------------------------------------------------------------------------*/
65/** Get number of commands used in IRQ code.
66 * @return Number of commands.
67 */
68size_t hc_irq_cmd_count(void)
69{
70 return sizeof(ohci_irq_commands) / sizeof(irq_cmd_t);
71}
72/*----------------------------------------------------------------------------*/
73/** Generate IRQ code commands.
74 * @param[out] cmds Place to store the commands.
75 * @param[in] cmd_size Size of the place (bytes).
76 * @param[in] regs Physical address of device's registers.
77 * @param[in] reg_size Size of the register area (bytes).
78 *
79 * @return Error code.
80 */
81int hc_get_irq_commands(
82 irq_cmd_t cmds[], size_t cmd_size, uintptr_t regs, size_t reg_size)
83{
84 if (cmd_size < sizeof(ohci_irq_commands)
85 || reg_size < sizeof(ohci_regs_t))
86 return EOVERFLOW;
87
88 /* Create register mapping to use in IRQ handler.
89 * This mapping should be present in kernel only.
90 * Remove it from here when kernel knows how to create mappings
91 * and accepts physical addresses in IRQ code.
92 * TODO: remove */
93 ohci_regs_t *registers;
94 const int ret = pio_enable((void*)regs, reg_size, (void**)&registers);
95
96 /* Some bogus access to force create mapping. DO NOT remove,
97 * unless whole virtual addresses in irq is replaced
98 * NOTE: Compiler won't remove this as ohci_regs_t members
99 * are declared volatile. */
100 registers->revision;
101
102 if (ret != EOK)
103 return ret;
104
105 memcpy(cmds, ohci_irq_commands, sizeof(ohci_irq_commands));
106
107 void *address = (void*)&registers->interrupt_status;
108 cmds[0].addr = address;
109 cmds[3].addr = address;
110 return EOK;
111}
112/*----------------------------------------------------------------------------*/
113/** Announce OHCI root hub to the DDF
114 *
115 * @param[in] instance OHCI driver intance
116 * @param[in] hub_fun DDF fuction representing OHCI root hub
117 * @return Error code
118 */
119int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun)
120{
121 assert(instance);
122 assert(hub_fun);
123
124 const usb_address_t hub_address =
125 device_keeper_get_free_address(&instance->manager, USB_SPEED_FULL);
126 if (hub_address <= 0) {
127 usb_log_error("Failed to get OHCI root hub address: %s\n",
128 str_error(hub_address));
129 return hub_address;
130 }
131 instance->rh.address = hub_address;
132 usb_device_keeper_bind(
133 &instance->manager, hub_address, hub_fun->handle);
134
135#define CHECK_RET_RELEASE(ret, message...) \
136if (ret != EOK) { \
137 usb_log_error(message); \
138 hc_remove_endpoint(instance, hub_address, 0, USB_DIRECTION_BOTH); \
139 usb_device_keeper_release(&instance->manager, hub_address); \
140 return ret; \
141} else (void)0
142
143 int ret = hc_add_endpoint(instance, hub_address, 0, USB_SPEED_FULL,
144 USB_TRANSFER_CONTROL, USB_DIRECTION_BOTH, 64, 0, 0);
145 CHECK_RET_RELEASE(ret,
146 "Failed to add OHCI root hub endpoint 0: %s.\n", str_error(ret));
147
148 char *match_str = NULL;
149 /* DDF needs heap allocated string. */
150 ret = asprintf(&match_str, "usb&class=hub");
151 ret = ret > 0 ? 0 : ret;
152 CHECK_RET_RELEASE(ret,
153 "Failed to create match-id string: %s.\n", str_error(ret));
154
155 ret = ddf_fun_add_match_id(hub_fun, match_str, 100);
156 CHECK_RET_RELEASE(ret,
157 "Failed to add root hub match-id: %s.\n", str_error(ret));
158
159 ret = ddf_fun_bind(hub_fun);
160 CHECK_RET_RELEASE(ret,
161 "Failed to bind root hub function: %s.\n", str_error(ret));
162
163 return EOK;
164#undef CHECK_RET_RELEASE
165}
166/*----------------------------------------------------------------------------*/
167/** Initialize OHCI hc driver structure
168 *
169 * @param[in] instance Memory place for the structure.
170 * @param[in] regs Address of the memory mapped I/O registers.
171 * @param[in] reg_size Size of the memory mapped area.
172 * @param[in] interrupts True if w interrupts should be used
173 * @return Error code
174 */
175int hc_init(hc_t *instance, uintptr_t regs, size_t reg_size, bool interrupts)
176{
177 assert(instance);
178
179#define CHECK_RET_RETURN(ret, message...) \
180if (ret != EOK) { \
181 usb_log_error(message); \
182 return ret; \
183} else (void)0
184
185 int ret =
186 pio_enable((void*)regs, reg_size, (void**)&instance->registers);
187 CHECK_RET_RETURN(ret,
188 "Failed to gain access to device registers: %s.\n", str_error(ret));
189
190 list_initialize(&instance->pending_batches);
191 usb_device_keeper_init(&instance->manager);
192
193 ret = usb_endpoint_manager_init(&instance->ep_manager,
194 BANDWIDTH_AVAILABLE_USB11);
195 CHECK_RET_RETURN(ret, "Failed to initialize endpoint manager: %s.\n",
196 str_error(ret));
197
198 ret = hc_init_memory(instance);
199 CHECK_RET_RETURN(ret, "Failed to create OHCI memory structures: %s.\n",
200 str_error(ret));
201#undef CHECK_RET_RETURN
202
203 fibril_mutex_initialize(&instance->guard);
204
205 hc_gain_control(instance);
206
207 if (!interrupts) {
208 instance->interrupt_emulator =
209 fibril_create((int(*)(void*))interrupt_emulator, instance);
210 fibril_add_ready(instance->interrupt_emulator);
211 }
212
213 rh_init(&instance->rh, instance->registers);
214 hc_start(instance);
215
216 return EOK;
217}
218/*----------------------------------------------------------------------------*/
219/** Create and register endpoint structures.
220 *
221 * @param[in] instance OHCI driver structure.
222 * @param[in] address USB address of the device.
223 * @param[in] endpoint USB endpoint number.
224 * @param[in] speed Communication speeed of the device.
225 * @param[in] type Endpoint's transfer type.
226 * @param[in] direction Endpoint's direction.
227 * @param[in] mps Maximum packet size the endpoint accepts.
228 * @param[in] size Maximum allowed buffer size.
229 * @param[in] interval Time between transfers(interrupt transfers only).
230 * @return Error code
231 */
232int hc_add_endpoint(
233 hc_t *instance, usb_address_t address, usb_endpoint_t endpoint,
234 usb_speed_t speed, usb_transfer_type_t type, usb_direction_t direction,
235 size_t mps, size_t size, unsigned interval)
236{
237 endpoint_t *ep =
238 endpoint_get(address, endpoint, direction, type, speed, mps);
239 if (ep == NULL)
240 return ENOMEM;
241
242 hcd_endpoint_t *hcd_ep = hcd_endpoint_assign(ep);
243 if (hcd_ep == NULL) {
244 endpoint_destroy(ep);
245 return ENOMEM;
246 }
247
248 int ret =
249 usb_endpoint_manager_register_ep(&instance->ep_manager, ep, size);
250 if (ret != EOK) {
251 hcd_endpoint_clear(ep);
252 endpoint_destroy(ep);
253 return ret;
254 }
255
256 /* Enqueue hcd_ep */
257 switch (ep->transfer_type) {
258 case USB_TRANSFER_CONTROL:
259 instance->registers->control &= ~C_CLE;
260 endpoint_list_add_ep(
261 &instance->lists[ep->transfer_type], hcd_ep);
262 instance->registers->control_current = 0;
263 instance->registers->control |= C_CLE;
264 break;
265 case USB_TRANSFER_BULK:
266 instance->registers->control &= ~C_BLE;
267 endpoint_list_add_ep(
268 &instance->lists[ep->transfer_type], hcd_ep);
269 instance->registers->control |= C_BLE;
270 break;
271 case USB_TRANSFER_ISOCHRONOUS:
272 case USB_TRANSFER_INTERRUPT:
273 instance->registers->control &= (~C_PLE & ~C_IE);
274 endpoint_list_add_ep(
275 &instance->lists[ep->transfer_type], hcd_ep);
276 instance->registers->control |= C_PLE | C_IE;
277 break;
278 }
279
280 return EOK;
281}
282/*----------------------------------------------------------------------------*/
283/** Dequeue and delete endpoint structures
284 *
285 * @param[in] instance OHCI hc driver structure.
286 * @param[in] address USB address of the device.
287 * @param[in] endpoint USB endpoint number.
288 * @param[in] direction Direction of the endpoint.
289 * @return Error code
290 */
291int hc_remove_endpoint(hc_t *instance, usb_address_t address,
292 usb_endpoint_t endpoint, usb_direction_t direction)
293{
294 assert(instance);
295 fibril_mutex_lock(&instance->guard);
296 endpoint_t *ep = usb_endpoint_manager_get_ep(&instance->ep_manager,
297 address, endpoint, direction, NULL);
298 if (ep == NULL) {
299 usb_log_error("Endpoint unregister failed: No such EP.\n");
300 fibril_mutex_unlock(&instance->guard);
301 return ENOENT;
302 }
303
304 hcd_endpoint_t *hcd_ep = hcd_endpoint_get(ep);
305 if (hcd_ep) {
306 /* Dequeue hcd_ep */
307 switch (ep->transfer_type) {
308 case USB_TRANSFER_CONTROL:
309 instance->registers->control &= ~C_CLE;
310 endpoint_list_remove_ep(
311 &instance->lists[ep->transfer_type], hcd_ep);
312 instance->registers->control_current = 0;
313 instance->registers->control |= C_CLE;
314 break;
315 case USB_TRANSFER_BULK:
316 instance->registers->control &= ~C_BLE;
317 endpoint_list_remove_ep(
318 &instance->lists[ep->transfer_type], hcd_ep);
319 instance->registers->control |= C_BLE;
320 break;
321 case USB_TRANSFER_ISOCHRONOUS:
322 case USB_TRANSFER_INTERRUPT:
323 instance->registers->control &= (~C_PLE & ~C_IE);
324 endpoint_list_remove_ep(
325 &instance->lists[ep->transfer_type], hcd_ep);
326 instance->registers->control |= C_PLE | C_IE;
327 break;
328 default:
329 break;
330 }
331 hcd_endpoint_clear(ep);
332 } else {
333 usb_log_warning("Endpoint without hcd equivalent structure.\n");
334 }
335 int ret = usb_endpoint_manager_unregister_ep(&instance->ep_manager,
336 address, endpoint, direction);
337 fibril_mutex_unlock(&instance->guard);
338 return ret;
339}
340/*----------------------------------------------------------------------------*/
341/** Get access to endpoint structures
342 *
343 * @param[in] instance OHCI hc driver structure.
344 * @param[in] address USB address of the device.
345 * @param[in] endpoint USB endpoint number.
346 * @param[in] direction Direction of the endpoint.
347 * @param[out] bw Reserved bandwidth.
348 * @return Error code
349 */
350endpoint_t * hc_get_endpoint(hc_t *instance, usb_address_t address,
351 usb_endpoint_t endpoint, usb_direction_t direction, size_t *bw)
352{
353 assert(instance);
354 fibril_mutex_lock(&instance->guard);
355 endpoint_t *ep = usb_endpoint_manager_get_ep(&instance->ep_manager,
356 address, endpoint, direction, bw);
357 fibril_mutex_unlock(&instance->guard);
358 return ep;
359}
360/*----------------------------------------------------------------------------*/
361/** Add USB transfer to the schedule.
362 *
363 * @param[in] instance OHCI hc driver structure.
364 * @param[in] batch Batch representing the transfer.
365 * @return Error code.
366 */
367int hc_schedule(hc_t *instance, usb_transfer_batch_t *batch)
368{
369 assert(instance);
370 assert(batch);
371 assert(batch->ep);
372
373 /* Check for root hub communication */
374 if (batch->ep->address == instance->rh.address) {
375 return rh_request(&instance->rh, batch);
376 }
377
378 fibril_mutex_lock(&instance->guard);
379 list_append(&batch->link, &instance->pending_batches);
380 batch_commit(batch);
381
382 /* Control and bulk schedules need a kick to start working */
383 switch (batch->ep->transfer_type)
384 {
385 case USB_TRANSFER_CONTROL:
386 instance->registers->command_status |= CS_CLF;
387 break;
388 case USB_TRANSFER_BULK:
389 instance->registers->command_status |= CS_BLF;
390 break;
391 default:
392 break;
393 }
394 fibril_mutex_unlock(&instance->guard);
395 return EOK;
396}
397/*----------------------------------------------------------------------------*/
398/** Interrupt handling routine
399 *
400 * @param[in] instance OHCI hc driver structure.
401 * @param[in] status Value of the status register at the time of interrupt.
402 */
403void hc_interrupt(hc_t *instance, uint32_t status)
404{
405 assert(instance);
406 if ((status & ~I_SF) == 0) /* ignore sof status */
407 return;
408 usb_log_debug2("OHCI(%p) interrupt: %x.\n", instance, status);
409 if (status & I_RHSC)
410 rh_interrupt(&instance->rh);
411
412 if (status & I_WDH) {
413 fibril_mutex_lock(&instance->guard);
414 usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca,
415 instance->registers->hcca,
416 (void *) addr_to_phys(instance->hcca));
417 usb_log_debug2("Periodic current: %#" PRIx32 ".\n",
418 instance->registers->periodic_current);
419
420 link_t *current = instance->pending_batches.head.next;
421 while (current != &instance->pending_batches.head) {
422 link_t *next = current->next;
423 usb_transfer_batch_t *batch =
424 usb_transfer_batch_from_link(current);
425
426 if (batch_is_complete(batch)) {
427 list_remove(current);
428 usb_transfer_batch_finish(batch);
429 }
430
431 current = next;
432 }
433 fibril_mutex_unlock(&instance->guard);
434 }
435
436 if (status & I_UE) {
437 hc_start(instance);
438 }
439
440}
441/*----------------------------------------------------------------------------*/
442/** Check status register regularly
443 *
444 * @param[in] instance OHCI hc driver structure.
445 * @return Error code
446 */
447int interrupt_emulator(hc_t *instance)
448{
449 assert(instance);
450 usb_log_info("Started interrupt emulator.\n");
451 while (1) {
452 const uint32_t status = instance->registers->interrupt_status;
453 instance->registers->interrupt_status = status;
454 hc_interrupt(instance, status);
455 async_usleep(10000);
456 }
457 return EOK;
458}
459/*----------------------------------------------------------------------------*/
460/** Turn off any (BIOS)driver that might be in control of the device.
461 *
462 * This function implements routines described in chapter 5.1.1.3 of the OHCI
463 * specification (page 40, pdf page 54).
464 *
465 * @param[in] instance OHCI hc driver structure.
466 */
467void hc_gain_control(hc_t *instance)
468{
469 assert(instance);
470
471 usb_log_debug("Requesting OHCI control.\n");
472 if (instance->registers->revision & R_LEGACY_FLAG) {
473 /* Turn off legacy emulation, it should be enough to zero
474 * the lowest bit, but it caused problems. Thus clear all
475 * except GateA20 (causes restart on some hw).
476 * See page 145 of the specs for details.
477 */
478 volatile uint32_t *ohci_emulation_reg =
479 (uint32_t*)((char*)instance->registers + LEGACY_REGS_OFFSET);
480 usb_log_debug("OHCI legacy register %p: %x.\n",
481 ohci_emulation_reg, *ohci_emulation_reg);
482 /* Zero everything but A20State */
483 *ohci_emulation_reg &= 0x100;
484 usb_log_debug(
485 "OHCI legacy register (should be 0 or 0x100) %p: %x.\n",
486 ohci_emulation_reg, *ohci_emulation_reg);
487 }
488
489 /* Interrupt routing enabled => smm driver is active */
490 if (instance->registers->control & C_IR) {
491 usb_log_debug("SMM driver: request ownership change.\n");
492 instance->registers->command_status |= CS_OCR;
493 /* Hope that SMM actually knows its stuff or we can hang here */
494 while (instance->registers->control & C_IR) {
495 async_usleep(1000);
496 }
497 usb_log_info("SMM driver: Ownership taken.\n");
498 C_HCFS_SET(instance->registers->control, C_HCFS_RESET);
499 async_usleep(50000);
500 return;
501 }
502
503 const unsigned hc_status = C_HCFS_GET(instance->registers->control);
504 /* Interrupt routing disabled && status != USB_RESET => BIOS active */
505 if (hc_status != C_HCFS_RESET) {
506 usb_log_debug("BIOS driver found.\n");
507 if (hc_status == C_HCFS_OPERATIONAL) {
508 usb_log_info("BIOS driver: HC operational.\n");
509 return;
510 }
511 /* HC is suspended assert resume for 20ms, */
512 C_HCFS_SET(instance->registers->control, C_HCFS_RESUME);
513 async_usleep(20000);
514 usb_log_info("BIOS driver: HC resumed.\n");
515 return;
516 }
517
518 /* HC is in reset (hw startup) => no other driver
519 * maintain reset for at least the time specified in USB spec (50 ms)*/
520 usb_log_debug("Host controller found in reset state.\n");
521 async_usleep(50000);
522}
523/*----------------------------------------------------------------------------*/
524/** OHCI hw initialization routine.
525 *
526 * @param[in] instance OHCI hc driver structure.
527 */
528void hc_start(hc_t *instance)
529{
530 /* OHCI guide page 42 */
531 assert(instance);
532 usb_log_debug2("Started hc initialization routine.\n");
533
534 /* Save contents of fm_interval register */
535 const uint32_t fm_interval = instance->registers->fm_interval;
536 usb_log_debug2("Old value of HcFmInterval: %x.\n", fm_interval);
537
538 /* Reset hc */
539 usb_log_debug2("HC reset.\n");
540 size_t time = 0;
541 instance->registers->command_status = CS_HCR;
542 while (instance->registers->command_status & CS_HCR) {
543 async_usleep(10);
544 time += 10;
545 }
546 usb_log_debug2("HC reset complete in %zu us.\n", time);
547
548 /* Restore fm_interval */
549 instance->registers->fm_interval = fm_interval;
550 assert((instance->registers->command_status & CS_HCR) == 0);
551
552 /* hc is now in suspend state */
553 usb_log_debug2("HC should be in suspend state(%x).\n",
554 instance->registers->control);
555
556 /* Use HCCA */
557 instance->registers->hcca = addr_to_phys(instance->hcca);
558
559 /* Use queues */
560 instance->registers->bulk_head =
561 instance->lists[USB_TRANSFER_BULK].list_head_pa;
562 usb_log_debug2("Bulk HEAD set to: %p (%#" PRIx32 ").\n",
563 instance->lists[USB_TRANSFER_BULK].list_head,
564 instance->lists[USB_TRANSFER_BULK].list_head_pa);
565
566 instance->registers->control_head =
567 instance->lists[USB_TRANSFER_CONTROL].list_head_pa;
568 usb_log_debug2("Control HEAD set to: %p (%#" PRIx32 ").\n",
569 instance->lists[USB_TRANSFER_CONTROL].list_head,
570 instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
571
572 /* Enable queues */
573 instance->registers->control |= (C_PLE | C_IE | C_CLE | C_BLE);
574 usb_log_debug2("All queues enabled(%x).\n",
575 instance->registers->control);
576
577 /* Enable interrupts */
578 instance->registers->interrupt_enable = OHCI_USED_INTERRUPTS;
579 usb_log_debug2("Enabled interrupts: %x.\n",
580 instance->registers->interrupt_enable);
581 instance->registers->interrupt_enable = I_MI;
582
583 /* Set periodic start to 90% */
584 uint32_t frame_length = ((fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK);
585 instance->registers->periodic_start = (frame_length / 10) * 9;
586 usb_log_debug2("All periodic start set to: %x(%u - 90%% of %d).\n",
587 instance->registers->periodic_start,
588 instance->registers->periodic_start, frame_length);
589
590 C_HCFS_SET(instance->registers->control, C_HCFS_OPERATIONAL);
591 usb_log_debug("OHCI HC up and running (ctl_reg=0x%x).\n",
592 instance->registers->control);
593}
594/*----------------------------------------------------------------------------*/
595/** Initialize schedule queues
596 *
597 * @param[in] instance OHCI hc driver structure
598 * @return Error code
599 */
600int hc_init_transfer_lists(hc_t *instance)
601{
602 assert(instance);
603#define SETUP_ENDPOINT_LIST(type) \
604do { \
605 const char *name = usb_str_transfer_type(type); \
606 int ret = endpoint_list_init(&instance->lists[type], name); \
607 if (ret != EOK) { \
608 usb_log_error("Failed to setup %s endpoint list: %s.\n", \
609 name, str_error(ret)); \
610 endpoint_list_fini(&instance->lists[USB_TRANSFER_ISOCHRONOUS]);\
611 endpoint_list_fini(&instance->lists[USB_TRANSFER_INTERRUPT]); \
612 endpoint_list_fini(&instance->lists[USB_TRANSFER_CONTROL]); \
613 endpoint_list_fini(&instance->lists[USB_TRANSFER_BULK]); \
614 return ret; \
615 } \
616} while (0)
617
618 SETUP_ENDPOINT_LIST(USB_TRANSFER_ISOCHRONOUS);
619 SETUP_ENDPOINT_LIST(USB_TRANSFER_INTERRUPT);
620 SETUP_ENDPOINT_LIST(USB_TRANSFER_CONTROL);
621 SETUP_ENDPOINT_LIST(USB_TRANSFER_BULK);
622#undef SETUP_ENDPOINT_LIST
623 endpoint_list_set_next(&instance->lists[USB_TRANSFER_INTERRUPT],
624 &instance->lists[USB_TRANSFER_ISOCHRONOUS]);
625
626 return EOK;
627}
628/*----------------------------------------------------------------------------*/
629/** Initialize memory structures used by the OHCI hcd.
630 *
631 * @param[in] instance OHCI hc driver structure.
632 * @return Error code.
633 */
634int hc_init_memory(hc_t *instance)
635{
636 assert(instance);
637
638 bzero(&instance->rh, sizeof(instance->rh));
639 /* Init queues */
640 const int ret = hc_init_transfer_lists(instance);
641 if (ret != EOK) {
642 return ret;
643 }
644
645 /*Init HCCA */
646 instance->hcca = malloc32(sizeof(hcca_t));
647 if (instance->hcca == NULL)
648 return ENOMEM;
649 bzero(instance->hcca, sizeof(hcca_t));
650 usb_log_debug2("OHCI HCCA initialized at %p.\n", instance->hcca);
651
652 unsigned i = 0;
653 for (; i < 32; ++i) {
654 instance->hcca->int_ep[i] =
655 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa;
656 }
657 usb_log_debug2("Interrupt HEADs set to: %p (%#" PRIx32 ").\n",
658 instance->lists[USB_TRANSFER_INTERRUPT].list_head,
659 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
660
661 return EOK;
662}
663
664/**
665 * @}
666 */
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