source: mainline/uspace/drv/bus/usb/ohci/hc.c@ 1cb4f05

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 1cb4f05 was 1cb4f05, checked in by Jan Vesely <jano.vesely@…>, 14 years ago

OHCI: Make error messages consistent and some minor reshuffling.
  • Property mode set to 100644
File size: 21.2 KB
Line 
1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28/** @addtogroup drvusbohcihc
29 * @{
30 */
31/** @file
32 * @brief OHCI Host controller driver routines
33 */
34#include <errno.h>
35#include <str_error.h>
36#include <adt/list.h>
37#include <libarch/ddi.h>
38
39#include <usb/debug.h>
40#include <usb/usb.h>
41#include <usb/ddfiface.h>
42
43#include "hc.h"
44#include "hcd_endpoint.h"
45
46#define OHCI_USED_INTERRUPTS \
47 (I_SO | I_WDH | I_UE | I_RHSC)
48
49static const irq_cmd_t ohci_irq_commands[] =
50{
51 { .cmd = CMD_MEM_READ_32, .dstarg = 1, .addr = NULL /*filled later*/ },
52 { .cmd = CMD_BTEST, .srcarg = 1, .dstarg = 2, .value = OHCI_USED_INTERRUPTS },
53 { .cmd = CMD_PREDICATE, .srcarg = 2, .value = 2 },
54 { .cmd = CMD_MEM_WRITE_A_32, .srcarg = 1, .addr = NULL /*filled later*/ },
55 { .cmd = CMD_ACCEPT },
56};
57
58static void hc_gain_control(hc_t *instance);
59static void hc_start(hc_t *instance);
60static int hc_init_transfer_lists(hc_t *instance);
61static int hc_init_memory(hc_t *instance);
62static int interrupt_emulator(hc_t *instance);
63
64/*----------------------------------------------------------------------------*/
65/** Get number of commands used in IRQ code.
66 * @return Number of commands.
67 */
68size_t hc_irq_cmd_count(void)
69{
70 return sizeof(ohci_irq_commands) / sizeof(irq_cmd_t);
71}
72/*----------------------------------------------------------------------------*/
73/** Generate IRQ code commands.
74 * @param[out] cmds Place to store the commands.
75 * @param[in] cmd_size Size of the place (bytes).
76 * @param[in] regs Physical address of device's registers.
77 * @param[in] reg_size Size of the register area (bytes).
78 *
79 * @return Error code.
80 */
81int hc_get_irq_commands(
82 irq_cmd_t cmds[], size_t cmd_size, uintptr_t regs, size_t reg_size)
83{
84 if (cmd_size < sizeof(ohci_irq_commands)
85 || reg_size < sizeof(ohci_regs_t))
86 return EOVERFLOW;
87
88 /* Create register mapping to use in IRQ handler.
89 * This mapping should be present in kernel only.
90 * Remove it from here when kernel knows how to create mappings
91 * and accepts physical addresses in IRQ code.
92 * TODO: remove */
93 ohci_regs_t *registers;
94 const int ret = pio_enable((void*)regs, reg_size, (void**)&registers);
95
96 /* Some bogus access to force create mapping. DO NOT remove,
97 * unless whole virtual addresses in irq is replaced
98 * NOTE: Compiler won't remove this as ohci_regs_t members
99 * are declared volatile. */
100 registers->revision;
101
102 if (ret != EOK)
103 return ret;
104
105 memcpy(cmds, ohci_irq_commands, sizeof(ohci_irq_commands));
106
107 void *address = (void*)&registers->interrupt_status;
108 cmds[0].addr = address;
109 cmds[3].addr = address;
110 return EOK;
111}
112/*----------------------------------------------------------------------------*/
113/** Announce OHCI root hub to the DDF
114 *
115 * @param[in] instance OHCI driver intance
116 * @param[in] hub_fun DDF fuction representing OHCI root hub
117 * @return Error code
118 */
119int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun)
120{
121 assert(instance);
122 assert(hub_fun);
123
124 const usb_address_t hub_address =
125 device_keeper_get_free_address(&instance->manager, USB_SPEED_FULL);
126 if (hub_address <= 0) {
127 usb_log_error("Failed to get OHCI root hub address: %s\n",
128 str_error(hub_address));
129 return hub_address;
130 }
131 instance->rh.address = hub_address;
132 usb_device_keeper_bind(
133 &instance->manager, hub_address, hub_fun->handle);
134
135#define CHECK_RET_RELEASE(ret, message...) \
136if (ret != EOK) { \
137 usb_log_error(message); \
138 hc_remove_endpoint(instance, hub_address, 0, USB_DIRECTION_BOTH); \
139 usb_device_keeper_release(&instance->manager, hub_address); \
140 return ret; \
141} else (void)0
142
143 int ret = hc_add_endpoint(instance, hub_address, 0, USB_SPEED_FULL,
144 USB_TRANSFER_CONTROL, USB_DIRECTION_BOTH, 64, 0, 0);
145 CHECK_RET_RELEASE(ret,
146 "Failed to add OHCI root hub endpoint 0: %s.\n", str_error(ret));
147
148 char *match_str = NULL;
149 /* DDF needs heap allocated string. */
150 ret = asprintf(&match_str, "usb&class=hub");
151 ret = ret > 0 ? 0 : ret;
152 CHECK_RET_RELEASE(ret,
153 "Failed to create match-id string: %s.\n", str_error(ret));
154
155 ret = ddf_fun_add_match_id(hub_fun, match_str, 100);
156 CHECK_RET_RELEASE(ret,
157 "Failed to add root hub match-id: %s.\n", str_error(ret));
158
159 ret = ddf_fun_bind(hub_fun);
160 CHECK_RET_RELEASE(ret,
161 "Failed to bind root hub function: %s.\n", str_error(ret));
162
163 return EOK;
164#undef CHECK_RET_RELEASE
165}
166/*----------------------------------------------------------------------------*/
167/** Initialize OHCI hc driver structure
168 *
169 * @param[in] instance Memory place for the structure.
170 * @param[in] regs Address of the memory mapped I/O registers.
171 * @param[in] reg_size Size of the memory mapped area.
172 * @param[in] interrupts True if w interrupts should be used
173 * @return Error code
174 */
175int hc_init(hc_t *instance, uintptr_t regs, size_t reg_size, bool interrupts)
176{
177 assert(instance);
178
179#define CHECK_RET_RETURN(ret, message...) \
180if (ret != EOK) { \
181 usb_log_error(message); \
182 return ret; \
183} else (void)0
184
185 int ret =
186 pio_enable((void*)regs, reg_size, (void**)&instance->registers);
187 CHECK_RET_RETURN(ret,
188 "Failed to gain access to device registers: %s.\n", str_error(ret));
189
190 list_initialize(&instance->pending_batches);
191 usb_device_keeper_init(&instance->manager);
192
193 ret = usb_endpoint_manager_init(&instance->ep_manager,
194 BANDWIDTH_AVAILABLE_USB11);
195 CHECK_RET_RETURN(ret, "Failed to initialize endpoint manager: %s.\n",
196 str_error(ret));
197
198 ret = hc_init_memory(instance);
199 CHECK_RET_RETURN(ret, "Failed to create OHCI memory structures: %s.\n",
200 str_error(ret));
201#undef CHECK_RET_RETURN
202
203 fibril_mutex_initialize(&instance->guard);
204
205 hc_gain_control(instance);
206
207 if (!interrupts) {
208 instance->interrupt_emulator =
209 fibril_create((int(*)(void*))interrupt_emulator, instance);
210 fibril_add_ready(instance->interrupt_emulator);
211 }
212
213 rh_init(&instance->rh, instance->registers);
214 hc_start(instance);
215
216 return EOK;
217}
218/*----------------------------------------------------------------------------*/
219/** Create and register endpoint structures.
220 *
221 * @param[in] instance OHCI driver structure.
222 * @param[in] address USB address of the device.
223 * @param[in] endpoint USB endpoint number.
224 * @param[in] speed Communication speeed of the device.
225 * @param[in] type Endpoint's transfer type.
226 * @param[in] direction Endpoint's direction.
227 * @param[in] mps Maximum packet size the endpoint accepts.
228 * @param[in] size Maximum allowed buffer size.
229 * @param[in] interval Time between transfers(interrupt transfers only).
230 * @return Error code
231 */
232int hc_add_endpoint(
233 hc_t *instance, usb_address_t address, usb_endpoint_t endpoint,
234 usb_speed_t speed, usb_transfer_type_t type, usb_direction_t direction,
235 size_t mps, size_t size, unsigned interval)
236{
237 endpoint_t *ep = malloc(sizeof(endpoint_t));
238 if (ep == NULL)
239 return ENOMEM;
240 int ret =
241 endpoint_init(ep, address, endpoint, direction, type, speed, mps);
242 if (ret != EOK) {
243 free(ep);
244 return ret;
245 }
246
247 hcd_endpoint_t *hcd_ep = hcd_endpoint_assign(ep);
248 if (hcd_ep == NULL) {
249 endpoint_destroy(ep);
250 return ENOMEM;
251 }
252
253 ret = usb_endpoint_manager_register_ep(&instance->ep_manager, ep, size);
254 if (ret != EOK) {
255 hcd_endpoint_clear(ep);
256 endpoint_destroy(ep);
257 return ret;
258 }
259
260 /* Enqueue hcd_ep */
261 switch (ep->transfer_type) {
262 case USB_TRANSFER_CONTROL:
263 instance->registers->control &= ~C_CLE;
264 endpoint_list_add_ep(
265 &instance->lists[ep->transfer_type], hcd_ep);
266 instance->registers->control_current = 0;
267 instance->registers->control |= C_CLE;
268 break;
269 case USB_TRANSFER_BULK:
270 instance->registers->control &= ~C_BLE;
271 endpoint_list_add_ep(
272 &instance->lists[ep->transfer_type], hcd_ep);
273 instance->registers->control |= C_BLE;
274 break;
275 case USB_TRANSFER_ISOCHRONOUS:
276 case USB_TRANSFER_INTERRUPT:
277 instance->registers->control &= (~C_PLE & ~C_IE);
278 endpoint_list_add_ep(
279 &instance->lists[ep->transfer_type], hcd_ep);
280 instance->registers->control |= C_PLE | C_IE;
281 break;
282 default:
283 break;
284 }
285
286 return EOK;
287}
288/*----------------------------------------------------------------------------*/
289/** Dequeue and delete endpoint structures
290 *
291 * @param[in] instance OHCI hc driver structure.
292 * @param[in] address USB address of the device.
293 * @param[in] endpoint USB endpoint number.
294 * @param[in] direction Direction of the endpoint.
295 * @return Error code
296 */
297int hc_remove_endpoint(hc_t *instance, usb_address_t address,
298 usb_endpoint_t endpoint, usb_direction_t direction)
299{
300 assert(instance);
301 fibril_mutex_lock(&instance->guard);
302 endpoint_t *ep = usb_endpoint_manager_get_ep(&instance->ep_manager,
303 address, endpoint, direction, NULL);
304 if (ep == NULL) {
305 usb_log_error("Endpoint unregister failed: No such EP.\n");
306 fibril_mutex_unlock(&instance->guard);
307 return ENOENT;
308 }
309
310 hcd_endpoint_t *hcd_ep = hcd_endpoint_get(ep);
311 if (hcd_ep) {
312 /* Dequeue hcd_ep */
313 switch (ep->transfer_type) {
314 case USB_TRANSFER_CONTROL:
315 instance->registers->control &= ~C_CLE;
316 endpoint_list_remove_ep(
317 &instance->lists[ep->transfer_type], hcd_ep);
318 instance->registers->control_current = 0;
319 instance->registers->control |= C_CLE;
320 break;
321 case USB_TRANSFER_BULK:
322 instance->registers->control &= ~C_BLE;
323 endpoint_list_remove_ep(
324 &instance->lists[ep->transfer_type], hcd_ep);
325 instance->registers->control |= C_BLE;
326 break;
327 case USB_TRANSFER_ISOCHRONOUS:
328 case USB_TRANSFER_INTERRUPT:
329 instance->registers->control &= (~C_PLE & ~C_IE);
330 endpoint_list_remove_ep(
331 &instance->lists[ep->transfer_type], hcd_ep);
332 instance->registers->control |= C_PLE | C_IE;
333 break;
334 default:
335 break;
336 }
337 hcd_endpoint_clear(ep);
338 } else {
339 usb_log_warning("Endpoint without hcd equivalent structure.\n");
340 }
341 int ret = usb_endpoint_manager_unregister_ep(&instance->ep_manager,
342 address, endpoint, direction);
343 fibril_mutex_unlock(&instance->guard);
344 return ret;
345}
346/*----------------------------------------------------------------------------*/
347/** Get access to endpoint structures
348 *
349 * @param[in] instance OHCI hc driver structure.
350 * @param[in] address USB address of the device.
351 * @param[in] endpoint USB endpoint number.
352 * @param[in] direction Direction of the endpoint.
353 * @param[out] bw Reserved bandwidth.
354 * @return Error code
355 */
356endpoint_t * hc_get_endpoint(hc_t *instance, usb_address_t address,
357 usb_endpoint_t endpoint, usb_direction_t direction, size_t *bw)
358{
359 assert(instance);
360 fibril_mutex_lock(&instance->guard);
361 endpoint_t *ep = usb_endpoint_manager_get_ep(&instance->ep_manager,
362 address, endpoint, direction, bw);
363 fibril_mutex_unlock(&instance->guard);
364 return ep;
365}
366/*----------------------------------------------------------------------------*/
367/** Add USB transfer to the schedule.
368 *
369 * @param[in] instance OHCI hc driver structure.
370 * @param[in] batch Batch representing the transfer.
371 * @return Error code.
372 */
373int hc_schedule(hc_t *instance, usb_transfer_batch_t *batch)
374{
375 assert(instance);
376 assert(batch);
377 assert(batch->ep);
378
379 /* Check for root hub communication */
380 if (batch->ep->address == instance->rh.address) {
381 return rh_request(&instance->rh, batch);
382 }
383
384 fibril_mutex_lock(&instance->guard);
385 list_append(&batch->link, &instance->pending_batches);
386 batch_commit(batch);
387
388 /* Control and bulk schedules need a kick to start working */
389 switch (batch->ep->transfer_type)
390 {
391 case USB_TRANSFER_CONTROL:
392 instance->registers->command_status |= CS_CLF;
393 break;
394 case USB_TRANSFER_BULK:
395 instance->registers->command_status |= CS_BLF;
396 break;
397 default:
398 break;
399 }
400 fibril_mutex_unlock(&instance->guard);
401 return EOK;
402}
403/*----------------------------------------------------------------------------*/
404/** Interrupt handling routine
405 *
406 * @param[in] instance OHCI hc driver structure.
407 * @param[in] status Value of the status register at the time of interrupt.
408 */
409void hc_interrupt(hc_t *instance, uint32_t status)
410{
411 assert(instance);
412 if ((status & ~I_SF) == 0) /* ignore sof status */
413 return;
414 usb_log_debug2("OHCI(%p) interrupt: %x.\n", instance, status);
415 if (status & I_RHSC)
416 rh_interrupt(&instance->rh);
417
418 if (status & I_WDH) {
419 fibril_mutex_lock(&instance->guard);
420 usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca,
421 instance->registers->hcca,
422 (void *) addr_to_phys(instance->hcca));
423 usb_log_debug2("Periodic current: %#" PRIx32 ".\n",
424 instance->registers->periodic_current);
425
426 link_t *current = instance->pending_batches.head.next;
427 while (current != &instance->pending_batches.head) {
428 link_t *next = current->next;
429 usb_transfer_batch_t *batch =
430 usb_transfer_batch_from_link(current);
431
432 if (batch_is_complete(batch)) {
433 list_remove(current);
434 usb_transfer_batch_finish(batch);
435 }
436
437 current = next;
438 }
439 fibril_mutex_unlock(&instance->guard);
440 }
441
442 if (status & I_UE) {
443 hc_start(instance);
444 }
445
446}
447/*----------------------------------------------------------------------------*/
448/** Check status register regularly
449 *
450 * @param[in] instance OHCI hc driver structure.
451 * @return Error code
452 */
453int interrupt_emulator(hc_t *instance)
454{
455 assert(instance);
456 usb_log_info("Started interrupt emulator.\n");
457 while (1) {
458 const uint32_t status = instance->registers->interrupt_status;
459 instance->registers->interrupt_status = status;
460 hc_interrupt(instance, status);
461 async_usleep(10000);
462 }
463 return EOK;
464}
465/*----------------------------------------------------------------------------*/
466/** Turn off any (BIOS)driver that might be in control of the device.
467 *
468 * This function implements routines described in chapter 5.1.1.3 of the OHCI
469 * specification (page 40, pdf page 54).
470 *
471 * @param[in] instance OHCI hc driver structure.
472 */
473void hc_gain_control(hc_t *instance)
474{
475 assert(instance);
476
477 usb_log_debug("Requesting OHCI control.\n");
478 if (instance->registers->revision & R_LEGACY_FLAG) {
479 /* Turn off legacy emulation, it should be enough to zero
480 * the lowest bit, but it caused problems. Thus clear all
481 * except GateA20 (causes restart on some hw).
482 * See page 145 of the specs for details.
483 */
484 volatile uint32_t *ohci_emulation_reg =
485 (uint32_t*)((char*)instance->registers + LEGACY_REGS_OFFSET);
486 usb_log_debug("OHCI legacy register %p: %x.\n",
487 ohci_emulation_reg, *ohci_emulation_reg);
488 /* Zero everything but A20State */
489 *ohci_emulation_reg &= 0x100;
490 usb_log_debug(
491 "OHCI legacy register (should be 0 or 0x100) %p: %x.\n",
492 ohci_emulation_reg, *ohci_emulation_reg);
493 }
494
495 /* Interrupt routing enabled => smm driver is active */
496 if (instance->registers->control & C_IR) {
497 usb_log_debug("SMM driver: request ownership change.\n");
498 instance->registers->command_status |= CS_OCR;
499 /* Hope that SMM actually knows its stuff or we can hang here */
500 while (instance->registers->control & C_IR) {
501 async_usleep(1000);
502 }
503 usb_log_info("SMM driver: Ownership taken.\n");
504 C_HCFS_SET(instance->registers->control, C_HCFS_RESET);
505 async_usleep(50000);
506 return;
507 }
508
509 const unsigned hc_status = C_HCFS_GET(instance->registers->control);
510 /* Interrupt routing disabled && status != USB_RESET => BIOS active */
511 if (hc_status != C_HCFS_RESET) {
512 usb_log_debug("BIOS driver found.\n");
513 if (hc_status == C_HCFS_OPERATIONAL) {
514 usb_log_info("BIOS driver: HC operational.\n");
515 return;
516 }
517 /* HC is suspended assert resume for 20ms, */
518 C_HCFS_SET(instance->registers->control, C_HCFS_RESUME);
519 async_usleep(20000);
520 usb_log_info("BIOS driver: HC resumed.\n");
521 return;
522 }
523
524 /* HC is in reset (hw startup) => no other driver
525 * maintain reset for at least the time specified in USB spec (50 ms)*/
526 usb_log_debug("Host controller found in reset state.\n");
527 async_usleep(50000);
528}
529/*----------------------------------------------------------------------------*/
530/** OHCI hw initialization routine.
531 *
532 * @param[in] instance OHCI hc driver structure.
533 */
534void hc_start(hc_t *instance)
535{
536 /* OHCI guide page 42 */
537 assert(instance);
538 usb_log_debug2("Started hc initialization routine.\n");
539
540 /* Save contents of fm_interval register */
541 const uint32_t fm_interval = instance->registers->fm_interval;
542 usb_log_debug2("Old value of HcFmInterval: %x.\n", fm_interval);
543
544 /* Reset hc */
545 usb_log_debug2("HC reset.\n");
546 size_t time = 0;
547 instance->registers->command_status = CS_HCR;
548 while (instance->registers->command_status & CS_HCR) {
549 async_usleep(10);
550 time += 10;
551 }
552 usb_log_debug2("HC reset complete in %zu us.\n", time);
553
554 /* Restore fm_interval */
555 instance->registers->fm_interval = fm_interval;
556 assert((instance->registers->command_status & CS_HCR) == 0);
557
558 /* hc is now in suspend state */
559 usb_log_debug2("HC should be in suspend state(%x).\n",
560 instance->registers->control);
561
562 /* Use HCCA */
563 instance->registers->hcca = addr_to_phys(instance->hcca);
564
565 /* Use queues */
566 instance->registers->bulk_head =
567 instance->lists[USB_TRANSFER_BULK].list_head_pa;
568 usb_log_debug2("Bulk HEAD set to: %p (%#" PRIx32 ").\n",
569 instance->lists[USB_TRANSFER_BULK].list_head,
570 instance->lists[USB_TRANSFER_BULK].list_head_pa);
571
572 instance->registers->control_head =
573 instance->lists[USB_TRANSFER_CONTROL].list_head_pa;
574 usb_log_debug2("Control HEAD set to: %p (%#" PRIx32 ").\n",
575 instance->lists[USB_TRANSFER_CONTROL].list_head,
576 instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
577
578 /* Enable queues */
579 instance->registers->control |= (C_PLE | C_IE | C_CLE | C_BLE);
580 usb_log_debug2("All queues enabled(%x).\n",
581 instance->registers->control);
582
583 /* Enable interrupts */
584 instance->registers->interrupt_enable = OHCI_USED_INTERRUPTS;
585 usb_log_debug2("Enabled interrupts: %x.\n",
586 instance->registers->interrupt_enable);
587 instance->registers->interrupt_enable = I_MI;
588
589 /* Set periodic start to 90% */
590 uint32_t frame_length = ((fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK);
591 instance->registers->periodic_start = (frame_length / 10) * 9;
592 usb_log_debug2("All periodic start set to: %x(%u - 90%% of %d).\n",
593 instance->registers->periodic_start,
594 instance->registers->periodic_start, frame_length);
595
596 C_HCFS_SET(instance->registers->control, C_HCFS_OPERATIONAL);
597 usb_log_debug("OHCI HC up and running (ctl_reg=0x%x).\n",
598 instance->registers->control);
599}
600/*----------------------------------------------------------------------------*/
601/** Initialize schedule queues
602 *
603 * @param[in] instance OHCI hc driver structure
604 * @return Error code
605 */
606int hc_init_transfer_lists(hc_t *instance)
607{
608 assert(instance);
609#define SETUP_ENDPOINT_LIST(type) \
610do { \
611 const char *name = usb_str_transfer_type(type); \
612 int ret = endpoint_list_init(&instance->lists[type], name); \
613 if (ret != EOK) { \
614 usb_log_error("Failed to setup %s endpoint list: %s.\n", \
615 name, str_error(ret)); \
616 endpoint_list_fini(&instance->lists[USB_TRANSFER_ISOCHRONOUS]);\
617 endpoint_list_fini(&instance->lists[USB_TRANSFER_INTERRUPT]); \
618 endpoint_list_fini(&instance->lists[USB_TRANSFER_CONTROL]); \
619 endpoint_list_fini(&instance->lists[USB_TRANSFER_BULK]); \
620 return ret; \
621 } \
622} while (0)
623
624 SETUP_ENDPOINT_LIST(USB_TRANSFER_ISOCHRONOUS);
625 SETUP_ENDPOINT_LIST(USB_TRANSFER_INTERRUPT);
626 SETUP_ENDPOINT_LIST(USB_TRANSFER_CONTROL);
627 SETUP_ENDPOINT_LIST(USB_TRANSFER_BULK);
628#undef SETUP_ENDPOINT_LIST
629 endpoint_list_set_next(&instance->lists[USB_TRANSFER_INTERRUPT],
630 &instance->lists[USB_TRANSFER_ISOCHRONOUS]);
631
632 return EOK;
633}
634/*----------------------------------------------------------------------------*/
635/** Initialize memory structures used by the OHCI hcd.
636 *
637 * @param[in] instance OHCI hc driver structure.
638 * @return Error code.
639 */
640int hc_init_memory(hc_t *instance)
641{
642 assert(instance);
643
644 bzero(&instance->rh, sizeof(instance->rh));
645 /* Init queues */
646 const int ret = hc_init_transfer_lists(instance);
647 if (ret != EOK) {
648 return ret;
649 }
650
651 /*Init HCCA */
652 instance->hcca = malloc32(sizeof(hcca_t));
653 if (instance->hcca == NULL)
654 return ENOMEM;
655 bzero(instance->hcca, sizeof(hcca_t));
656 usb_log_debug2("OHCI HCCA initialized at %p.\n", instance->hcca);
657
658 unsigned i = 0;
659 for (; i < 32; ++i) {
660 instance->hcca->int_ep[i] =
661 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa;
662 }
663 usb_log_debug2("Interrupt HEADs set to: %p (%#" PRIx32 ").\n",
664 instance->lists[USB_TRANSFER_INTERRUPT].list_head,
665 instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
666
667 return EOK;
668}
669
670/**
671 * @}
672 */
Note: See TracBrowser for help on using the repository browser.