1 | /*
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2 | * Copyright (c) 2011 Jan Vesely
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 |
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29 | /** @addtogroup drvusbohcihc
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30 | * @{
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31 | */
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32 | /** @file
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33 | * @brief OHCI Host controller driver routines
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34 | */
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35 |
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36 | #include <errno.h>
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37 | #include <str_error.h>
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38 | #include <adt/list.h>
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39 | #include <libarch/ddi.h>
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40 |
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41 | #include <usb/debug.h>
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42 | #include <usb/usb.h>
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43 |
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44 | #include "hc.h"
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45 | #include "ohci_endpoint.h"
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46 |
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47 | #define OHCI_USED_INTERRUPTS \
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48 | (I_SO | I_WDH | I_UE | I_RHSC)
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49 |
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50 | static const irq_pio_range_t ohci_pio_ranges[] = {
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51 | {
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52 | .base = 0,
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53 | .size = sizeof(ohci_regs_t)
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54 | }
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55 | };
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56 |
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57 | static const irq_cmd_t ohci_irq_commands[] = {
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58 | {
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59 | .cmd = CMD_PIO_READ_32,
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60 | .dstarg = 1,
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61 | .addr = NULL
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62 | },
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63 | {
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64 | .cmd = CMD_AND,
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65 | .srcarg = 1,
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66 | .dstarg = 2,
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67 | .value = 0
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68 | },
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69 | {
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70 | .cmd = CMD_PREDICATE,
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71 | .srcarg = 2,
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72 | .value = 2
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73 | },
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74 | {
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75 | .cmd = CMD_PIO_WRITE_A_32,
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76 | .srcarg = 1,
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77 | .addr = NULL
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78 | },
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79 | {
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80 | .cmd = CMD_ACCEPT
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81 | }
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82 | };
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83 |
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84 | static void hc_gain_control(hc_t *instance);
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85 | static void hc_start(hc_t *instance);
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86 | static int hc_init_transfer_lists(hc_t *instance);
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87 | static int hc_init_memory(hc_t *instance);
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88 | static int interrupt_emulator(hc_t *instance);
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89 |
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90 | /** Get number of PIO ranges used in IRQ code.
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91 | * @return Number of ranges.
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92 | */
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93 | size_t hc_irq_pio_range_count(void)
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94 | {
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95 | return sizeof(ohci_pio_ranges) / sizeof(irq_pio_range_t);
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96 | }
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97 |
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98 | /** Get number of commands used in IRQ code.
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99 | * @return Number of commands.
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100 | */
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101 | size_t hc_irq_cmd_count(void)
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102 | {
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103 | return sizeof(ohci_irq_commands) / sizeof(irq_cmd_t);
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104 | }
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105 |
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106 | /** Generate IRQ code.
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107 | * @param[out] ranges PIO ranges buffer.
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108 | * @param[in] ranges_size Size of the ranges buffer (bytes).
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109 | * @param[out] cmds Commands buffer.
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110 | * @param[in] cmds_size Size of the commands buffer (bytes).
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111 | * @param[in] regs Device's register range.
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112 | *
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113 | * @return Error code.
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114 | */
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115 | int
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116 | hc_get_irq_code(irq_pio_range_t ranges[], size_t ranges_size, irq_cmd_t cmds[],
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117 | size_t cmds_size, addr_range_t *regs)
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118 | {
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119 | if ((ranges_size < sizeof(ohci_pio_ranges)) ||
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120 | (cmds_size < sizeof(ohci_irq_commands)) ||
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121 | (RNGSZ(*regs) < sizeof(ohci_regs_t)))
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122 | return EOVERFLOW;
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123 |
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124 | memcpy(ranges, ohci_pio_ranges, sizeof(ohci_pio_ranges));
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125 | ranges[0].base = RNGABS(*regs);
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126 |
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127 | memcpy(cmds, ohci_irq_commands, sizeof(ohci_irq_commands));
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128 | ohci_regs_t *registers = (ohci_regs_t *) RNGABSPTR(*regs);
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129 | cmds[0].addr = (void *) ®isters->interrupt_status;
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130 | cmds[3].addr = (void *) ®isters->interrupt_status;
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131 | OHCI_WR(cmds[1].value, OHCI_USED_INTERRUPTS);
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132 |
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133 | return EOK;
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134 | }
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135 |
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136 | /** Register interrupt handler.
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137 | *
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138 | * @param[in] device Host controller DDF device
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139 | * @param[in] regs Register range
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140 | * @param[in] irq Interrupt number
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141 | * @paran[in] handler Interrupt handler
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142 | *
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143 | * @return EOK on success or negative error code
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144 | */
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145 | int hc_register_irq_handler(ddf_dev_t *device, addr_range_t *regs, int irq,
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146 | interrupt_handler_t handler)
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147 | {
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148 | int rc;
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149 |
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150 | irq_pio_range_t irq_ranges[hc_irq_pio_range_count()];
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151 | irq_cmd_t irq_cmds[hc_irq_cmd_count()];
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152 |
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153 | irq_code_t irq_code = {
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154 | .rangecount = hc_irq_pio_range_count(),
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155 | .ranges = irq_ranges,
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156 | .cmdcount = hc_irq_cmd_count(),
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157 | .cmds = irq_cmds
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158 | };
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159 |
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160 | rc = hc_get_irq_code(irq_ranges, sizeof(irq_ranges), irq_cmds,
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161 | sizeof(irq_cmds), regs);
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162 | if (rc != EOK) {
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163 | usb_log_error("Failed to generate IRQ code: %s.\n",
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164 | str_error(rc));
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165 | return rc;
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166 | }
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167 |
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168 | /* Register handler to avoid interrupt lockup */
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169 | rc = register_interrupt_handler(device, irq, handler, &irq_code);
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170 | if (rc != EOK) {
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171 | usb_log_error("Failed to register interrupt handler: %s.\n",
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172 | str_error(rc));
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173 | return rc;
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174 | }
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175 |
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176 | return EOK;
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177 | }
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178 |
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179 | /** Initialize OHCI hc driver structure
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180 | *
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181 | * @param[in] instance Memory place for the structure.
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182 | * @param[in] regs Device's I/O registers range.
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183 | * @param[in] interrupts True if w interrupts should be used
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184 | * @return Error code
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185 | */
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186 | int hc_init(hc_t *instance, addr_range_t *regs, bool interrupts)
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187 | {
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188 | assert(instance);
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189 |
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190 | int ret = pio_enable_range(regs, (void **) &instance->registers);
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191 | if (ret != EOK) {
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192 | usb_log_error("Failed to gain access to device registers: %s.\n",
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193 | str_error(ret));
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194 | return ret;
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195 | }
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196 |
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197 | list_initialize(&instance->pending_batches);
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198 | fibril_mutex_initialize(&instance->guard);
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199 |
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200 | ret = hc_init_memory(instance);
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201 | if (ret != EOK) {
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202 | usb_log_error("Failed to create OHCI memory structures: %s.\n",
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203 | str_error(ret));
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204 | return ret;
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205 | }
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206 |
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207 | hc_gain_control(instance);
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208 |
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209 | if (!interrupts) {
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210 | instance->interrupt_emulator =
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211 | fibril_create((int(*)(void*))interrupt_emulator, instance);
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212 | fibril_add_ready(instance->interrupt_emulator);
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213 | }
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214 |
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215 | ohci_rh_init(&instance->rh, instance->registers, "ohci rh");
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216 | hc_start(instance);
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217 |
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218 | return EOK;
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219 | }
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220 |
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221 | void hc_enqueue_endpoint(hc_t *instance, const endpoint_t *ep)
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222 | {
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223 | assert(instance);
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224 | assert(ep);
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225 |
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226 | endpoint_list_t *list = &instance->lists[ep->transfer_type];
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227 | ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
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228 | assert(list);
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229 | assert(ohci_ep);
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230 |
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231 | /* Enqueue ep */
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232 | switch (ep->transfer_type) {
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233 | case USB_TRANSFER_CONTROL:
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234 | OHCI_CLR(instance->registers->control, C_CLE);
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235 | endpoint_list_add_ep(list, ohci_ep);
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236 | OHCI_WR(instance->registers->control_current, 0);
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237 | OHCI_SET(instance->registers->control, C_CLE);
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238 | break;
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239 | case USB_TRANSFER_BULK:
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240 | OHCI_CLR(instance->registers->control, C_BLE);
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241 | endpoint_list_add_ep(list, ohci_ep);
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242 | OHCI_WR(instance->registers->bulk_current, 0);
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243 | OHCI_SET(instance->registers->control, C_BLE);
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244 | break;
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245 | case USB_TRANSFER_ISOCHRONOUS:
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246 | case USB_TRANSFER_INTERRUPT:
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247 | OHCI_CLR(instance->registers->control, C_PLE | C_IE);
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248 | endpoint_list_add_ep(list, ohci_ep);
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249 | OHCI_SET(instance->registers->control, C_PLE | C_IE);
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250 | break;
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251 | }
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252 | }
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253 |
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254 | void hc_dequeue_endpoint(hc_t *instance, const endpoint_t *ep)
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255 | {
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256 | assert(instance);
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257 | assert(ep);
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258 |
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259 | /* Dequeue ep */
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260 | endpoint_list_t *list = &instance->lists[ep->transfer_type];
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261 | ohci_endpoint_t *ohci_ep = ohci_endpoint_get(ep);
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262 |
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263 | assert(list);
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264 | assert(ohci_ep);
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265 | switch (ep->transfer_type) {
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266 | case USB_TRANSFER_CONTROL:
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267 | OHCI_CLR(instance->registers->control, C_CLE);
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268 | endpoint_list_remove_ep(list, ohci_ep);
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269 | OHCI_WR(instance->registers->control_current, 0);
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270 | OHCI_SET(instance->registers->control, C_CLE);
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271 | break;
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272 | case USB_TRANSFER_BULK:
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273 | OHCI_CLR(instance->registers->control, C_BLE);
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274 | endpoint_list_remove_ep(list, ohci_ep);
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275 | OHCI_WR(instance->registers->bulk_current, 0);
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276 | OHCI_SET(instance->registers->control, C_BLE);
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277 | break;
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278 | case USB_TRANSFER_ISOCHRONOUS:
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279 | case USB_TRANSFER_INTERRUPT:
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280 | OHCI_CLR(instance->registers->control, C_PLE | C_IE);
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281 | endpoint_list_remove_ep(list, ohci_ep);
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282 | OHCI_SET(instance->registers->control, C_PLE | C_IE);
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283 | break;
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284 | default:
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285 | break;
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286 | }
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287 | }
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288 |
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289 | /** Add USB transfer to the schedule.
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290 | *
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291 | * @param[in] instance OHCI hc driver structure.
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292 | * @param[in] batch Batch representing the transfer.
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293 | * @return Error code.
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294 | */
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295 | int hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch)
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296 | {
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297 | assert(hcd);
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298 | hc_t *instance = hcd->driver.data;
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299 | assert(instance);
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300 |
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301 | /* Check for root hub communication */
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302 | if (batch->ep->address == ohci_rh_get_address(&instance->rh)) {
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303 | usb_log_debug("OHCI root hub request.\n");
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304 | return ohci_rh_schedule(&instance->rh, batch);
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305 | }
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306 | ohci_transfer_batch_t *ohci_batch = ohci_transfer_batch_get(batch);
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307 | if (!ohci_batch)
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308 | return ENOMEM;
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309 |
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310 | fibril_mutex_lock(&instance->guard);
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311 | list_append(&ohci_batch->link, &instance->pending_batches);
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312 | ohci_transfer_batch_commit(ohci_batch);
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313 |
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314 | /* Control and bulk schedules need a kick to start working */
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315 | switch (batch->ep->transfer_type)
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316 | {
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317 | case USB_TRANSFER_CONTROL:
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318 | OHCI_SET(instance->registers->command_status, CS_CLF);
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319 | break;
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320 | case USB_TRANSFER_BULK:
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321 | OHCI_SET(instance->registers->command_status, CS_BLF);
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322 | break;
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323 | default:
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324 | break;
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325 | }
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326 | fibril_mutex_unlock(&instance->guard);
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327 | return EOK;
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328 | }
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329 |
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330 | /** Interrupt handling routine
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331 | *
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332 | * @param[in] instance OHCI hc driver structure.
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333 | * @param[in] status Value of the status register at the time of interrupt.
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334 | */
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335 | void hc_interrupt(hc_t *instance, uint32_t status)
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336 | {
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337 | status = OHCI_RD(status);
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338 | assert(instance);
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339 | if ((status & ~I_SF) == 0) /* ignore sof status */
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340 | return;
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341 | usb_log_debug2("OHCI(%p) interrupt: %x.\n", instance, status);
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342 | if (status & I_RHSC)
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343 | ohci_rh_interrupt(&instance->rh);
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344 |
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345 | if (status & I_WDH) {
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346 | fibril_mutex_lock(&instance->guard);
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347 | usb_log_debug2("HCCA: %p-%#" PRIx32 " (%p).\n", instance->hcca,
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348 | OHCI_RD(instance->registers->hcca),
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349 | (void *) addr_to_phys(instance->hcca));
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350 | usb_log_debug2("Periodic current: %#" PRIx32 ".\n",
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351 | OHCI_RD(instance->registers->periodic_current));
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352 |
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353 | link_t *current = list_first(&instance->pending_batches);
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354 | while (current && current != &instance->pending_batches.head) {
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355 | link_t *next = current->next;
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356 | ohci_transfer_batch_t *batch =
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357 | ohci_transfer_batch_from_link(current);
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358 |
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359 | if (ohci_transfer_batch_is_complete(batch)) {
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360 | list_remove(current);
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361 | ohci_transfer_batch_finish_dispose(batch);
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362 | }
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363 |
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364 | current = next;
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365 | }
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366 | fibril_mutex_unlock(&instance->guard);
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367 | }
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368 |
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369 | if (status & I_UE) {
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370 | usb_log_fatal("Error like no other!\n");
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371 | hc_start(instance);
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372 | }
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373 |
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374 | }
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375 |
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376 | /** Check status register regularly
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377 | *
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378 | * @param[in] instance OHCI hc driver structure.
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379 | * @return Error code
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380 | */
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381 | int interrupt_emulator(hc_t *instance)
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382 | {
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383 | assert(instance);
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384 | usb_log_info("Started interrupt emulator.\n");
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385 | while (1) {
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386 | const uint32_t status = instance->registers->interrupt_status;
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387 | instance->registers->interrupt_status = status;
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388 | hc_interrupt(instance, status);
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389 | async_usleep(10000);
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390 | }
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391 | return EOK;
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392 | }
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393 |
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394 | /** Turn off any (BIOS)driver that might be in control of the device.
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395 | *
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396 | * This function implements routines described in chapter 5.1.1.3 of the OHCI
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397 | * specification (page 40, pdf page 54).
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398 | *
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399 | * @param[in] instance OHCI hc driver structure.
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400 | */
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401 | void hc_gain_control(hc_t *instance)
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402 | {
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403 | assert(instance);
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404 |
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405 | usb_log_debug("Requesting OHCI control.\n");
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406 | if (OHCI_RD(instance->registers->revision) & R_LEGACY_FLAG) {
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407 | /* Turn off legacy emulation, it should be enough to zero
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408 | * the lowest bit, but it caused problems. Thus clear all
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409 | * except GateA20 (causes restart on some hw).
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410 | * See page 145 of the specs for details.
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411 | */
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412 | volatile uint32_t *ohci_emulation_reg =
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413 | (uint32_t*)((char*)instance->registers + LEGACY_REGS_OFFSET);
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414 | usb_log_debug("OHCI legacy register %p: %x.\n",
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415 | ohci_emulation_reg, OHCI_RD(*ohci_emulation_reg));
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416 | /* Zero everything but A20State */
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417 | OHCI_CLR(*ohci_emulation_reg, ~0x100);
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418 | usb_log_debug(
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419 | "OHCI legacy register (should be 0 or 0x100) %p: %x.\n",
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420 | ohci_emulation_reg, OHCI_RD(*ohci_emulation_reg));
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421 | }
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422 |
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423 | /* Interrupt routing enabled => smm driver is active */
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424 | if (OHCI_RD(instance->registers->control) & C_IR) {
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425 | usb_log_debug("SMM driver: request ownership change.\n");
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426 | OHCI_SET(instance->registers->command_status, CS_OCR);
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427 | /* Hope that SMM actually knows its stuff or we can hang here */
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428 | while (OHCI_RD(instance->registers->control & C_IR)) {
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429 | async_usleep(1000);
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430 | }
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431 | usb_log_info("SMM driver: Ownership taken.\n");
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432 | C_HCFS_SET(instance->registers->control, C_HCFS_RESET);
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433 | async_usleep(50000);
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434 | return;
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435 | }
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436 |
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437 | const unsigned hc_status = C_HCFS_GET(instance->registers->control);
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438 | /* Interrupt routing disabled && status != USB_RESET => BIOS active */
|
---|
439 | if (hc_status != C_HCFS_RESET) {
|
---|
440 | usb_log_debug("BIOS driver found.\n");
|
---|
441 | if (hc_status == C_HCFS_OPERATIONAL) {
|
---|
442 | usb_log_info("BIOS driver: HC operational.\n");
|
---|
443 | return;
|
---|
444 | }
|
---|
445 | /* HC is suspended assert resume for 20ms */
|
---|
446 | C_HCFS_SET(instance->registers->control, C_HCFS_RESUME);
|
---|
447 | async_usleep(20000);
|
---|
448 | usb_log_info("BIOS driver: HC resumed.\n");
|
---|
449 | return;
|
---|
450 | }
|
---|
451 |
|
---|
452 | /* HC is in reset (hw startup) => no other driver
|
---|
453 | * maintain reset for at least the time specified in USB spec (50 ms)*/
|
---|
454 | usb_log_debug("Host controller found in reset state.\n");
|
---|
455 | async_usleep(50000);
|
---|
456 | }
|
---|
457 |
|
---|
458 | /** OHCI hw initialization routine.
|
---|
459 | *
|
---|
460 | * @param[in] instance OHCI hc driver structure.
|
---|
461 | */
|
---|
462 | void hc_start(hc_t *instance)
|
---|
463 | {
|
---|
464 | /* OHCI guide page 42 */
|
---|
465 | assert(instance);
|
---|
466 | usb_log_debug2("Started hc initialization routine.\n");
|
---|
467 |
|
---|
468 | /* Save contents of fm_interval register */
|
---|
469 | const uint32_t fm_interval = OHCI_RD(instance->registers->fm_interval);
|
---|
470 | usb_log_debug2("Old value of HcFmInterval: %x.\n", fm_interval);
|
---|
471 |
|
---|
472 | /* Reset hc */
|
---|
473 | usb_log_debug2("HC reset.\n");
|
---|
474 | size_t time = 0;
|
---|
475 | OHCI_WR(instance->registers->command_status, CS_HCR);
|
---|
476 | while (OHCI_RD(instance->registers->command_status) & CS_HCR) {
|
---|
477 | async_usleep(10);
|
---|
478 | time += 10;
|
---|
479 | }
|
---|
480 | usb_log_debug2("HC reset complete in %zu us.\n", time);
|
---|
481 |
|
---|
482 | /* Restore fm_interval */
|
---|
483 | OHCI_WR(instance->registers->fm_interval, fm_interval);
|
---|
484 | assert((OHCI_RD(instance->registers->command_status) & CS_HCR) == 0);
|
---|
485 |
|
---|
486 | /* hc is now in suspend state */
|
---|
487 | usb_log_debug2("HC should be in suspend state(%x).\n",
|
---|
488 | OHCI_RD(instance->registers->control));
|
---|
489 |
|
---|
490 | /* Use HCCA */
|
---|
491 | OHCI_WR(instance->registers->hcca, addr_to_phys(instance->hcca));
|
---|
492 |
|
---|
493 | /* Use queues */
|
---|
494 | OHCI_WR(instance->registers->bulk_head,
|
---|
495 | instance->lists[USB_TRANSFER_BULK].list_head_pa);
|
---|
496 | usb_log_debug2("Bulk HEAD set to: %p (%#" PRIx32 ").\n",
|
---|
497 | instance->lists[USB_TRANSFER_BULK].list_head,
|
---|
498 | instance->lists[USB_TRANSFER_BULK].list_head_pa);
|
---|
499 |
|
---|
500 | OHCI_WR(instance->registers->control_head,
|
---|
501 | instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
|
---|
502 | usb_log_debug2("Control HEAD set to: %p (%#" PRIx32 ").\n",
|
---|
503 | instance->lists[USB_TRANSFER_CONTROL].list_head,
|
---|
504 | instance->lists[USB_TRANSFER_CONTROL].list_head_pa);
|
---|
505 |
|
---|
506 | /* Enable queues */
|
---|
507 | OHCI_SET(instance->registers->control, (C_PLE | C_IE | C_CLE | C_BLE));
|
---|
508 | usb_log_debug("Queues enabled(%x).\n",
|
---|
509 | OHCI_RD(instance->registers->control));
|
---|
510 |
|
---|
511 | /* Enable interrupts */
|
---|
512 | OHCI_WR(instance->registers->interrupt_enable, OHCI_USED_INTERRUPTS);
|
---|
513 | usb_log_debug("Enabled interrupts: %x.\n",
|
---|
514 | OHCI_RD(instance->registers->interrupt_enable));
|
---|
515 | OHCI_WR(instance->registers->interrupt_enable, I_MI);
|
---|
516 |
|
---|
517 | /* Set periodic start to 90% */
|
---|
518 | const uint32_t frame_length =
|
---|
519 | (fm_interval >> FMI_FI_SHIFT) & FMI_FI_MASK;
|
---|
520 | OHCI_WR(instance->registers->periodic_start,
|
---|
521 | ((frame_length / 10) * 9) & PS_MASK << PS_SHIFT);
|
---|
522 | usb_log_debug2("All periodic start set to: %x(%u - 90%% of %d).\n",
|
---|
523 | OHCI_RD(instance->registers->periodic_start),
|
---|
524 | OHCI_RD(instance->registers->periodic_start), frame_length);
|
---|
525 | C_HCFS_SET(instance->registers->control, C_HCFS_OPERATIONAL);
|
---|
526 | usb_log_debug("OHCI HC up and running (ctl_reg=0x%x).\n",
|
---|
527 | OHCI_RD(instance->registers->control));
|
---|
528 | }
|
---|
529 |
|
---|
530 | /** Initialize schedule queues
|
---|
531 | *
|
---|
532 | * @param[in] instance OHCI hc driver structure
|
---|
533 | * @return Error code
|
---|
534 | */
|
---|
535 | int hc_init_transfer_lists(hc_t *instance)
|
---|
536 | {
|
---|
537 | assert(instance);
|
---|
538 | #define SETUP_ENDPOINT_LIST(type) \
|
---|
539 | do { \
|
---|
540 | const char *name = usb_str_transfer_type(type); \
|
---|
541 | const int ret = endpoint_list_init(&instance->lists[type], name); \
|
---|
542 | if (ret != EOK) { \
|
---|
543 | usb_log_error("Failed to setup %s endpoint list: %s.\n", \
|
---|
544 | name, str_error(ret)); \
|
---|
545 | endpoint_list_fini(&instance->lists[USB_TRANSFER_ISOCHRONOUS]);\
|
---|
546 | endpoint_list_fini(&instance->lists[USB_TRANSFER_INTERRUPT]); \
|
---|
547 | endpoint_list_fini(&instance->lists[USB_TRANSFER_CONTROL]); \
|
---|
548 | endpoint_list_fini(&instance->lists[USB_TRANSFER_BULK]); \
|
---|
549 | return ret; \
|
---|
550 | } \
|
---|
551 | } while (0)
|
---|
552 |
|
---|
553 | SETUP_ENDPOINT_LIST(USB_TRANSFER_ISOCHRONOUS);
|
---|
554 | SETUP_ENDPOINT_LIST(USB_TRANSFER_INTERRUPT);
|
---|
555 | SETUP_ENDPOINT_LIST(USB_TRANSFER_CONTROL);
|
---|
556 | SETUP_ENDPOINT_LIST(USB_TRANSFER_BULK);
|
---|
557 | #undef SETUP_ENDPOINT_LIST
|
---|
558 | endpoint_list_set_next(&instance->lists[USB_TRANSFER_INTERRUPT],
|
---|
559 | &instance->lists[USB_TRANSFER_ISOCHRONOUS]);
|
---|
560 |
|
---|
561 | return EOK;
|
---|
562 | }
|
---|
563 |
|
---|
564 | /** Initialize memory structures used by the OHCI hcd.
|
---|
565 | *
|
---|
566 | * @param[in] instance OHCI hc driver structure.
|
---|
567 | * @return Error code.
|
---|
568 | */
|
---|
569 | int hc_init_memory(hc_t *instance)
|
---|
570 | {
|
---|
571 | assert(instance);
|
---|
572 |
|
---|
573 | memset(&instance->rh, 0, sizeof(instance->rh));
|
---|
574 | /* Init queues */
|
---|
575 | const int ret = hc_init_transfer_lists(instance);
|
---|
576 | if (ret != EOK) {
|
---|
577 | return ret;
|
---|
578 | }
|
---|
579 |
|
---|
580 | /*Init HCCA */
|
---|
581 | instance->hcca = hcca_get();
|
---|
582 | if (instance->hcca == NULL)
|
---|
583 | return ENOMEM;
|
---|
584 | usb_log_debug2("OHCI HCCA initialized at %p.\n", instance->hcca);
|
---|
585 |
|
---|
586 | for (unsigned i = 0; i < HCCA_INT_EP_COUNT; ++i) {
|
---|
587 | hcca_set_int_ep(instance->hcca, i,
|
---|
588 | instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
|
---|
589 | }
|
---|
590 | usb_log_debug2("Interrupt HEADs set to: %p (%#" PRIx32 ").\n",
|
---|
591 | instance->lists[USB_TRANSFER_INTERRUPT].list_head,
|
---|
592 | instance->lists[USB_TRANSFER_INTERRUPT].list_head_pa);
|
---|
593 |
|
---|
594 | return EOK;
|
---|
595 | }
|
---|
596 |
|
---|
597 | /**
|
---|
598 | * @}
|
---|
599 | */
|
---|