source: mainline/uspace/drv/bus/usb/ehci/hc.c@ d97f91f

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since d97f91f was d97f91f, checked in by Jan Vesely <jano.vesely@…>, 12 years ago

ehci: promote register information to info level
  • Property mode set to 100644
File size: 13.2 KB
Line 
1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbehcihc
30 * @{
31 */
32/** @file
33 * @brief EHCI Host controller driver routines
34 */
35
36#include <assert.h>
37#include <async.h>
38#include <errno.h>
39#include <macros.h>
40#include <mem.h>
41#include <stdlib.h>
42#include <str_error.h>
43#include <sys/types.h>
44
45#include <usb/debug.h>
46#include <usb/usb.h>
47
48//#include "ehci_endpoint.h"
49#include "ehci_batch.h"
50#include "utils/malloc32.h"
51
52#include "hc.h"
53
54#define EHCI_USED_INTERRUPTS \
55 (USB_INTR_IRQ_FLAG | USB_INTR_ERR_IRQ_FLAG | USB_INTR_PORT_CHANGE_FLAG | \
56 USB_INTR_ASYNC_ADVANCE_FLAG | USB_INTR_HOST_ERR_FLAG)
57
58static const irq_pio_range_t ehci_pio_ranges[] = {
59 {
60 .base = 0,
61 .size = sizeof(ehci_regs_t)
62 }
63};
64
65static const irq_cmd_t ehci_irq_commands[] = {
66 {
67 .cmd = CMD_PIO_READ_32,
68 .dstarg = 1,
69 .addr = NULL
70 },
71 {
72 .cmd = CMD_AND,
73 .srcarg = 1,
74 .dstarg = 2,
75 .value = 0
76 },
77 {
78 .cmd = CMD_PREDICATE,
79 .srcarg = 2,
80 .value = 2
81 },
82 {
83 .cmd = CMD_PIO_WRITE_A_32,
84 .srcarg = 1,
85 .addr = NULL
86 },
87 {
88 .cmd = CMD_ACCEPT
89 }
90};
91
92static void hc_start(hc_t *instance);
93static int hc_init_memory(hc_t *instance);
94
95/** Generate IRQ code.
96 * @param[out] ranges PIO ranges buffer.
97 * @param[in] hw_res Device's resources.
98 *
99 * @return Error code.
100 */
101int ehci_hc_gen_irq_code(irq_code_t *code, const hw_res_list_parsed_t *hw_res)
102{
103 assert(code);
104 assert(hw_res);
105
106 if (hw_res->irqs.count != 1 || hw_res->mem_ranges.count != 1)
107 return EINVAL;
108
109 addr_range_t regs = hw_res->mem_ranges.ranges[0];
110
111 if (RNGSZ(regs) < sizeof(ehci_regs_t))
112 return EOVERFLOW;
113
114 code->ranges = malloc(sizeof(ehci_pio_ranges));
115 if (code->ranges == NULL)
116 return ENOMEM;
117
118 code->cmds = malloc(sizeof(ehci_irq_commands));
119 if (code->cmds == NULL) {
120 free(code->ranges);
121 return ENOMEM;
122 }
123
124 code->rangecount = ARRAY_SIZE(ehci_pio_ranges);
125 code->cmdcount = ARRAY_SIZE(ehci_irq_commands);
126
127 memcpy(code->ranges, ehci_pio_ranges, sizeof(ehci_pio_ranges));
128 code->ranges[0].base = RNGABS(regs);
129
130 memcpy(code->cmds, ehci_irq_commands, sizeof(ehci_irq_commands));
131 ehci_caps_regs_t *caps = NULL;
132 int ret = pio_enable_range(&regs, (void**)&caps);
133 if (ret != EOK) {
134 return ret;
135 }
136 ehci_regs_t *registers =
137 (ehci_regs_t *)(RNGABSPTR(regs) + EHCI_RD8(caps->caplength));
138 code->cmds[0].addr = (void *) &registers->usbsts;
139 code->cmds[3].addr = (void *) &registers->usbsts;
140 EHCI_WR(code->cmds[1].value, EHCI_USED_INTERRUPTS);
141
142 usb_log_debug("Memory mapped regs at %p (size %zu), IRQ %d.\n",
143 RNGABSPTR(regs), RNGSZ(regs), hw_res->irqs.irqs[0]);
144
145 return hw_res->irqs.irqs[0];
146}
147
148/** Initialize EHCI hc driver structure
149 *
150 * @param[in] instance Memory place for the structure.
151 * @param[in] regs Device's I/O registers range.
152 * @param[in] interrupts True if w interrupts should be used
153 * @return Error code
154 */
155int hc_init(hc_t *instance, const hw_res_list_parsed_t *hw_res, bool interrupts)
156{
157 assert(instance);
158 assert(hw_res);
159 if (hw_res->mem_ranges.count != 1 ||
160 hw_res->mem_ranges.ranges[0].size <
161 (sizeof(ehci_caps_regs_t) + sizeof(ehci_regs_t)))
162 return EINVAL;
163
164 int ret = pio_enable_range(&hw_res->mem_ranges.ranges[0],
165 (void **)&instance->caps);
166 if (ret != EOK) {
167 usb_log_error("Failed to gain access to device registers: %s.\n",
168 str_error(ret));
169 return ret;
170 }
171 usb_log_info("Device registers at %" PRIx64 " (%zuB) accessible.\n",
172 hw_res->mem_ranges.ranges[0].address.absolute,
173 hw_res->mem_ranges.ranges[0].size);
174 instance->registers =
175 (void*)instance->caps + EHCI_RD8(instance->caps->caplength);
176 usb_log_info("Device control registers at %" PRIx64 "\n",
177 hw_res->mem_ranges.ranges[0].address.absolute
178 + EHCI_RD8(instance->caps->caplength));
179
180 list_initialize(&instance->pending_batches);
181 fibril_mutex_initialize(&instance->guard);
182 fibril_condvar_initialize(&instance->async_doorbell);
183
184 ret = hc_init_memory(instance);
185 if (ret != EOK) {
186 usb_log_error("Failed to create EHCI memory structures: %s.\n",
187 str_error(ret));
188 return ret;
189 }
190
191 ehci_rh_init(
192 &instance->rh, instance->caps, instance->registers, "ehci rh");
193 hc_start(instance);
194
195 return EOK;
196}
197
198/** Safely dispose host controller internal structures
199 *
200 * @param[in] instance Host controller structure to use.
201 */
202void hc_fini(hc_t *instance)
203{
204 assert(instance);
205 //TODO: stop the hw
206#if 0
207 endpoint_list_fini(&instance->async_list);
208 endpoint_list_fini(&instance->int_list);
209 return_page(instance->periodic_list_base);
210#endif
211};
212
213void hc_enqueue_endpoint(hc_t *instance, const endpoint_t *ep)
214{
215 assert(instance);
216 assert(ep);
217 ehci_endpoint_t *ehci_ep = ehci_endpoint_get(ep);
218 switch (ep->transfer_type)
219 {
220 case USB_TRANSFER_CONTROL:
221 case USB_TRANSFER_BULK:
222 endpoint_list_append_ep(&instance->async_list, ehci_ep);
223 break;
224 case USB_TRANSFER_INTERRUPT:
225 endpoint_list_append_ep(&instance->int_list, ehci_ep);
226 break;
227 case USB_TRANSFER_ISOCHRONOUS:
228 /* NOT SUPPORTED */
229 break;
230 }
231}
232
233void hc_dequeue_endpoint(hc_t *instance, const endpoint_t *ep)
234{
235 assert(instance);
236 assert(ep);
237 ehci_endpoint_t *ehci_ep = ehci_endpoint_get(ep);
238 switch (ep->transfer_type)
239 {
240 case USB_TRANSFER_INTERRUPT:
241 endpoint_list_remove_ep(&instance->int_list, ehci_ep);
242 /* Fall through */
243 case USB_TRANSFER_ISOCHRONOUS:
244 /* NOT SUPPORTED */
245 return;
246 case USB_TRANSFER_CONTROL:
247 case USB_TRANSFER_BULK:
248 endpoint_list_remove_ep(&instance->async_list, ehci_ep);
249 break;
250 }
251 fibril_mutex_lock(&instance->guard);
252 EHCI_SET(instance->registers->usbcmd, USB_CMD_ASYNC_SCHEDULE_FLAG);
253 fibril_condvar_wait(&instance->async_doorbell, &instance->guard);
254 fibril_mutex_unlock(&instance->guard);
255}
256
257int ehci_hc_status(hcd_t *hcd, uint32_t *status)
258{
259 assert(hcd);
260 hc_t *instance = hcd->driver.data;
261 assert(instance);
262 assert(status);
263 *status = 0;
264 if (instance->registers) {
265 *status = EHCI_RD(instance->registers->usbsts);
266 EHCI_WR(instance->registers->usbsts, *status);
267 }
268 return EOK;
269}
270
271/** Add USB transfer to the schedule.
272 *
273 * @param[in] hcd HCD driver structure.
274 * @param[in] batch Batch representing the transfer.
275 * @return Error code.
276 */
277int ehci_hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch)
278{
279 assert(hcd);
280 hc_t *instance = hcd->driver.data;
281 assert(instance);
282
283 /* Check for root hub communication */
284 if (batch->ep->address == ehci_rh_get_address(&instance->rh)) {
285 return ehci_rh_schedule(&instance->rh, batch);
286 }
287 ehci_transfer_batch_t *ehci_batch = ehci_transfer_batch_get(batch);
288 if (!ehci_batch)
289 return ENOMEM;
290
291 fibril_mutex_lock(&instance->guard);
292 list_append(&ehci_batch->link, &instance->pending_batches);
293 ehci_transfer_batch_commit(ehci_batch);
294
295 fibril_mutex_unlock(&instance->guard);
296 return EOK;
297}
298
299/** Interrupt handling routine
300 *
301 * @param[in] hcd HCD driver structure.
302 * @param[in] status Value of the status register at the time of interrupt.
303 */
304void ehci_hc_interrupt(hcd_t *hcd, uint32_t status)
305{
306 assert(hcd);
307 hc_t *instance = hcd->driver.data;
308 status = EHCI_RD(status);
309 assert(instance);
310 if (status & USB_STS_PORT_CHANGE_FLAG) {
311 ehci_rh_interrupt(&instance->rh);
312 }
313 if (status & USB_STS_ASYNC_SCHED_FLAG) {
314 fibril_condvar_signal(&instance->async_doorbell);
315 }
316 if (status & (USB_STS_IRQ_FLAG | USB_STS_ERR_IRQ_FLAG)) {
317 fibril_mutex_lock(&instance->guard);
318
319 link_t *current = list_first(&instance->pending_batches);
320 while (current && current != &instance->pending_batches.head) {
321 link_t *next = current->next;
322 ehci_transfer_batch_t *batch =
323 ehci_transfer_batch_from_link(current);
324
325 if (ehci_transfer_batch_is_complete(batch)) {
326 list_remove(current);
327 ehci_transfer_batch_finish_dispose(batch);
328 }
329 current = next;
330 }
331 fibril_mutex_unlock(&instance->guard);
332 }
333
334}
335
336/** EHCI hw initialization routine.
337 *
338 * @param[in] instance EHCI hc driver structure.
339 */
340void hc_start(hc_t *instance)
341{
342 assert(instance);
343 /* Turn of the HC if it's running, Reseting a running device is
344 * undefined */
345 if (!(EHCI_RD(instance->registers->usbsts) & USB_STS_HC_HALTED_FLAG)) {
346 /* disable all interrupts */
347 EHCI_WR(instance->registers->usbintr, 0);
348 /* ack all interrupts */
349 EHCI_WR(instance->registers->usbsts, 0x3f);
350 /* Stop HC hw */
351 EHCI_WR(instance->registers->usbcmd, 0);
352 /* Wait until hc is halted */
353 while ((EHCI_RD(instance->registers->usbsts) & USB_STS_HC_HALTED_FLAG) == 0) {
354 async_usleep(1);
355 }
356 usb_log_info("EHCI turned off.\n");
357 } else {
358 usb_log_info("EHCI was not running.\n");
359 }
360
361 /* Hw initialization sequence, see page 53 (pdf 63) */
362 EHCI_SET(instance->registers->usbcmd, USB_CMD_HC_RESET_FLAG);
363 while (EHCI_RD(instance->registers->usbcmd) & USB_CMD_HC_RESET_FLAG) {
364 async_usleep(1);
365 }
366 /* Enable interrupts */
367 EHCI_WR(instance->registers->usbintr, EHCI_USED_INTERRUPTS);
368 /* Use the lowest 4G segment */
369 EHCI_WR(instance->registers->ctrldssegment, 0);
370 /* Set periodic list */
371 assert(instance->periodic_list_base);
372 const uintptr_t phys_base =
373 addr_to_phys((void*)instance->periodic_list_base);
374 assert((phys_base & USB_PERIODIC_LIST_BASE_MASK) == phys_base);
375 EHCI_WR(instance->registers->periodiclistbase, phys_base);
376 EHCI_SET(instance->registers->usbcmd, USB_CMD_PERIODIC_SCHEDULE_FLAG);
377
378
379 /* Enable Async schedule */
380 assert((instance->async_list.list_head_pa & USB_ASYNCLIST_MASK) ==
381 instance->async_list.list_head_pa);
382 EHCI_WR(instance->registers->asynclistaddr,
383 instance->async_list.list_head_pa);
384 EHCI_SET(instance->registers->usbcmd, USB_CMD_ASYNC_SCHEDULE_FLAG);
385
386 /* start hc and get all ports */
387 EHCI_SET(instance->registers->usbcmd, USB_CMD_RUN_FLAG);
388 EHCI_SET(instance->registers->configflag, USB_CONFIG_FLAG_FLAG);
389#if 0
390 /*
391 * TURN OFF EHCI FOR NOW
392 */
393 usb_log_debug("USBCMD value: %x.\n",
394 EHCI_RD(instance->registers->usbcmd));
395 if (EHCI_RD(instance->registers->usbcmd) & USB_CMD_RUN_FLAG) {
396 /* disable all interrupts */
397 EHCI_WR(instance->registers->usbintr, 0);
398 /* ack all interrupts */
399 EHCI_WR(instance->registers->usbsts, 0x3f);
400 /* release RH ports */
401 EHCI_WR(instance->registers->configflag, 0);
402 EHCI_WR(instance->registers->usbcmd, 0);
403 /* Wait until hc is halted */
404 while ((EHCI_RD(instance->registers->usbsts) & USB_STS_HC_HALTED_FLAG) == 0);
405 usb_log_info("EHCI turned off.\n");
406 } else {
407 usb_log_info("EHCI was not running.\n");
408 }
409#endif
410 usb_log_debug("Registers: \n"
411 "\t USBCMD(%p): %x(0x00080000 = at least 1ms between interrupts)\n"
412 "\t USBSTS(%p): %x(0x00001000 = HC halted)\n"
413 "\t USBINT(%p): %x(0x0 = no interrupts).\n"
414 "\t CONFIG(%p): %x(0x0 = ports controlled by companion hc).\n",
415 &instance->registers->usbcmd, EHCI_RD(instance->registers->usbcmd),
416 &instance->registers->usbsts, EHCI_RD(instance->registers->usbsts),
417 &instance->registers->usbintr, EHCI_RD(instance->registers->usbintr),
418 &instance->registers->configflag, EHCI_RD(instance->registers->configflag));
419}
420
421/** Initialize memory structures used by the EHCI hcd.
422 *
423 * @param[in] instance EHCI hc driver structure.
424 * @return Error code.
425 */
426int hc_init_memory(hc_t *instance)
427{
428 assert(instance);
429 int ret = endpoint_list_init(&instance->async_list, "ASYNC");
430 if (ret != EOK) {
431 usb_log_error("Failed to setup ASYNC list: %s", str_error(ret));
432 return ret;
433 }
434
435 ret = endpoint_list_init(&instance->int_list, "INT");
436 if (ret != EOK) {
437 usb_log_error("Failed to setup INT list: %s", str_error(ret));
438 endpoint_list_fini(&instance->async_list);
439 return ret;
440 }
441 /* Loop async list */
442 endpoint_list_chain(&instance->async_list, &instance->async_list);
443
444 /* Take 1024 periodic list heads, we ignore low mem options */
445 instance->periodic_list_base = get_page();
446 if (!instance->periodic_list_base) {
447 usb_log_error("Failed to get ISO schedule page.");
448 endpoint_list_fini(&instance->async_list);
449 endpoint_list_fini(&instance->int_list);
450 return ENOMEM;
451 }
452 for (unsigned i = 0;
453 i < PAGE_SIZE/sizeof(instance->periodic_list_base[0]); ++i)
454 {
455 /* Disable everything for now */
456 instance->periodic_list_base[i] =
457 LINK_POINTER_QH(instance->int_list.list_head_pa);
458 }
459 return EOK;
460}
461
462/**
463 * @}
464 */
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