source: mainline/uspace/drv/bus/usb/ehci/hc.c@ bd41b192

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since bd41b192 was 615abda, checked in by Jan Vesely <jano.vesely@…>, 12 years ago

ehci: plug legacy disabling code

Remove CHECK_RET macro
  • Property mode set to 100644
File size: 8.6 KB
Line 
1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbehcihc
30 * @{
31 */
32/** @file
33 * @brief EHCI Host controller driver routines
34 */
35
36#include <assert.h>
37#include <async.h>
38#include <errno.h>
39#include <macros.h>
40#include <mem.h>
41#include <stdlib.h>
42#include <str_error.h>
43#include <sys/types.h>
44
45#include <usb/debug.h>
46#include <usb/usb.h>
47
48//#include "ehci_endpoint.h"
49//#include "ehci_batch.h"
50#include "utils/malloc32.h"
51
52#include "hc.h"
53
54#define EHCI_USED_INTERRUPTS \
55 (USB_INTR_IRQ_FLAG | USB_INTR_ERR_IRQ_FLAG | USB_INTR_PORT_CHANGE_FLAG)
56
57static const irq_pio_range_t ehci_pio_ranges[] = {
58 {
59 .base = 0,
60 .size = sizeof(ehci_regs_t)
61 }
62};
63
64static const irq_cmd_t ehci_irq_commands[] = {
65 {
66 .cmd = CMD_PIO_READ_32,
67 .dstarg = 1,
68 .addr = NULL
69 },
70 {
71 .cmd = CMD_AND,
72 .srcarg = 1,
73 .dstarg = 2,
74 .value = 0
75 },
76 {
77 .cmd = CMD_PREDICATE,
78 .srcarg = 2,
79 .value = 2
80 },
81 {
82 .cmd = CMD_PIO_WRITE_A_32,
83 .srcarg = 1,
84 .addr = NULL
85 },
86 {
87 .cmd = CMD_ACCEPT
88 }
89};
90
91static void hc_gain_control(hc_t *instance);
92static void hc_start(hc_t *instance);
93static int hc_init_memory(hc_t *instance);
94
95/** Generate IRQ code.
96 * @param[out] ranges PIO ranges buffer.
97 * @param[in] hw_res Device's resources.
98 *
99 * @return Error code.
100 */
101int ehci_hc_gen_irq_code(irq_code_t *code, const hw_res_list_parsed_t *hw_res)
102{
103 assert(code);
104 assert(hw_res);
105
106 if (hw_res->irqs.count != 1 || hw_res->mem_ranges.count != 1)
107 return EINVAL;
108
109 addr_range_t regs = hw_res->mem_ranges.ranges[0];
110
111 if (RNGSZ(regs) < sizeof(ehci_regs_t))
112 return EOVERFLOW;
113
114 code->ranges = malloc(sizeof(ehci_pio_ranges));
115 if (code->ranges == NULL)
116 return ENOMEM;
117
118 code->cmds = malloc(sizeof(ehci_irq_commands));
119 if (code->cmds == NULL) {
120 free(code->ranges);
121 return ENOMEM;
122 }
123
124 code->rangecount = ARRAY_SIZE(ehci_pio_ranges);
125 code->cmdcount = ARRAY_SIZE(ehci_irq_commands);
126
127 memcpy(code->ranges, ehci_pio_ranges, sizeof(ehci_pio_ranges));
128 code->ranges[0].base = RNGABS(regs);
129
130 memcpy(code->cmds, ehci_irq_commands, sizeof(ehci_irq_commands));
131 ehci_caps_regs_t *caps = NULL;
132 int ret = pio_enable_range(&regs, (void**)&caps);
133 if (ret != EOK) {
134 return ret;
135 }
136 ehci_regs_t *registers =
137 (ehci_regs_t *)(RNGABSPTR(regs) + EHCI_RD8(caps->caplength));
138 code->cmds[0].addr = (void *) &registers->usbsts;
139 code->cmds[3].addr = (void *) &registers->usbsts;
140 EHCI_WR(code->cmds[1].value, EHCI_USED_INTERRUPTS);
141
142 usb_log_debug("Memory mapped regs at %p (size %zu), IRQ %d.\n",
143 RNGABSPTR(regs), RNGSZ(regs), hw_res->irqs.irqs[0]);
144
145 return hw_res->irqs.irqs[0];
146}
147
148/** Initialize EHCI hc driver structure
149 *
150 * @param[in] instance Memory place for the structure.
151 * @param[in] regs Device's I/O registers range.
152 * @param[in] interrupts True if w interrupts should be used
153 * @return Error code
154 */
155int hc_init(hc_t *instance, const hw_res_list_parsed_t *hw_res, bool interrupts)
156{
157 assert(instance);
158 assert(hw_res);
159 if (hw_res->mem_ranges.count != 1 ||
160 hw_res->mem_ranges.ranges[0].size <
161 (sizeof(ehci_caps_regs_t) + sizeof(ehci_regs_t)))
162 return EINVAL;
163
164 int ret = pio_enable_range(&hw_res->mem_ranges.ranges[0],
165 (void **)&instance->caps);
166 if (ret != EOK) {
167 usb_log_error("Failed to gain access to device registers: %s.\n",
168 str_error(ret));
169 return ret;
170 }
171 usb_log_debug("Device registers at %" PRIx64 " (%zuB) accessible.\n",
172 hw_res->mem_ranges.ranges[0].address.absolute,
173 hw_res->mem_ranges.ranges[0].size);
174 instance->registers =
175 (void*)instance->caps + EHCI_RD8(instance->caps->caplength);
176
177 list_initialize(&instance->pending_batches);
178 fibril_mutex_initialize(&instance->guard);
179
180 ret = hc_init_memory(instance);
181 if (ret != EOK) {
182 usb_log_error("Failed to create EHCI memory structures: %s.\n",
183 str_error(ret));
184 return ret;
185 }
186
187 hc_gain_control(instance);
188
189 ehci_rh_init(
190 &instance->rh, instance->caps, instance->registers, "ehci rh");
191 hc_start(instance);
192
193 return EOK;
194}
195
196/** Safely dispose host controller internal structures
197 *
198 * @param[in] instance Host controller structure to use.
199 */
200void hc_fini(hc_t *instance)
201{
202 assert(instance);
203 /* TODO: implement*/
204};
205
206void hc_enqueue_endpoint(hc_t *instance, const endpoint_t *ep)
207{
208}
209
210void hc_dequeue_endpoint(hc_t *instance, const endpoint_t *ep)
211{
212}
213
214int ehci_hc_status(hcd_t *hcd, uint32_t *status)
215{
216 assert(hcd);
217 hc_t *instance = hcd->driver.data;
218 assert(instance);
219 assert(status);
220 *status = 0;
221 if (instance->registers) {
222 *status = EHCI_RD(instance->registers->usbsts);
223 EHCI_WR(instance->registers->usbsts, *status);
224 }
225 return EOK;
226}
227
228/** Add USB transfer to the schedule.
229 *
230 * @param[in] hcd HCD driver structure.
231 * @param[in] batch Batch representing the transfer.
232 * @return Error code.
233 */
234int ehci_hc_schedule(hcd_t *hcd, usb_transfer_batch_t *batch)
235{
236 assert(hcd);
237 hc_t *instance = hcd->driver.data;
238 assert(instance);
239
240 /* Check for root hub communication */
241 if (batch->ep->address == ehci_rh_get_address(&instance->rh)) {
242 usb_log_debug("EHCI root hub request.\n");
243 return ehci_rh_schedule(&instance->rh, batch);
244 }
245 return ENOTSUP;
246}
247
248/** Interrupt handling routine
249 *
250 * @param[in] hcd HCD driver structure.
251 * @param[in] status Value of the status register at the time of interrupt.
252 */
253void ehci_hc_interrupt(hcd_t *hcd, uint32_t status)
254{
255 assert(hcd);
256 hc_t *instance = hcd->driver.data;
257 status = EHCI_RD(status);
258 assert(instance);
259 if (status & USB_STS_PORT_CHANGE_FLAG) {
260 ehci_rh_interrupt(&instance->rh);
261 }
262}
263
264/** Turn off any (BIOS)driver that might be in control of the device.
265 *
266 * This function implements routines described in chapter 5.1.1.3 of the EHCI
267 * specification (page 40, pdf page 54).
268 *
269 * @param[in] instance EHCI hc driver structure.
270 */
271void hc_gain_control(hc_t *instance)
272{
273 assert(instance);
274}
275
276/** EHCI hw initialization routine.
277 *
278 * @param[in] instance EHCI hc driver structure.
279 */
280void hc_start(hc_t *instance)
281{
282 assert(instance);
283 /*
284 * TURN OFF EHCI FOR NOW
285 */
286
287 usb_log_debug("USBCMD value: %x.\n",
288 EHCI_RD(instance->registers->usbcmd));
289 if (EHCI_RD(instance->registers->usbcmd) & USB_CMD_RUN_FLAG) {
290 /* disable all interrupts */
291 EHCI_WR(instance->registers->usbintr, 0);
292 /* ack all interrupts */
293 EHCI_WR(instance->registers->usbsts, 0x3f);
294 /* release RH ports */
295 EHCI_WR(instance->registers->configflag, 0);
296 EHCI_WR(instance->registers->usbcmd, 0);
297 /* Wait until hc is halted */
298 while ((EHCI_RD(instance->registers->usbsts) & USB_STS_HC_HALTED_FLAG) == 0);
299 usb_log_info("EHCI turned off.\n");
300 } else {
301 usb_log_info("EHCI was not running.\n");
302 }
303 usb_log_debug("Registers: \n"
304 "\t USBCMD(%p): %x(0x00080000 = at least 1ms between interrupts)\n"
305 "\t USBSTS(%p): %x(0x00001000 = HC halted)\n"
306 "\t USBINT(%p): %x(0x0 = no interrupts).\n"
307 "\t CONFIG(%p): %x(0x0 = ports controlled by companion hc).\n",
308 &instance->registers->usbcmd, EHCI_RD(instance->registers->usbcmd),
309 &instance->registers->usbsts, EHCI_RD(instance->registers->usbsts),
310 &instance->registers->usbintr, EHCI_RD(instance->registers->usbintr),
311 &instance->registers->configflag, EHCI_RD(instance->registers->configflag));
312}
313
314/** Initialize memory structures used by the EHCI hcd.
315 *
316 * @param[in] instance EHCI hc driver structure.
317 * @return Error code.
318 */
319int hc_init_memory(hc_t *instance)
320{
321 return EOK;
322}
323
324/**
325 * @}
326 */
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