source: mainline/uspace/drv/bus/usb/ehci/hc.c@ b10a434

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since b10a434 was 32fb6bce, checked in by Ondřej Hlavatý <aearsis@…>, 8 years ago

usbhost: refactoring

This commit moves interrupt, status and schedule to bus
operations. Then the purpose of hcd_t is better defined, and split into
hc_driver_t and hc_device_t. hc_driver_t is used to wrap driver
implementation by the library (similar to how usb_driver_t is used to
wrap usb device drivers). hc_device_t is used as a parent for hc_t
inside drivers, and is allocated inside the DDF device node.

To support these changes, some local identifiers were renamed, some
functions were moved and/or renamed and their arguments changed. The
most notable one being hcd_send_batch → bus_device_send_batch.
  • Property mode set to 100644
File size: 14.7 KB
Line 
1/*
2 * Copyright (c) 2011 Jan Vesely
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup drvusbehcihc
30 * @{
31 */
32/** @file
33 * @brief EHCI Host controller driver routines
34 */
35
36#include <assert.h>
37#include <async.h>
38#include <errno.h>
39#include <macros.h>
40#include <mem.h>
41#include <stdlib.h>
42#include <stdint.h>
43#include <str_error.h>
44
45#include <usb/debug.h>
46#include <usb/usb.h>
47#include <usb/host/utils/malloc32.h>
48
49#include "ehci_batch.h"
50
51#include "hc.h"
52
53#define EHCI_USED_INTERRUPTS \
54 (USB_INTR_IRQ_FLAG | USB_INTR_ERR_IRQ_FLAG | USB_INTR_PORT_CHANGE_FLAG | \
55 USB_INTR_ASYNC_ADVANCE_FLAG | USB_INTR_HOST_ERR_FLAG)
56
57static const irq_pio_range_t ehci_pio_ranges[] = {
58 {
59 .base = 0,
60 .size = sizeof(ehci_regs_t)
61 }
62};
63
64static const irq_cmd_t ehci_irq_commands[] = {
65 {
66 .cmd = CMD_PIO_READ_32,
67 .dstarg = 1,
68 .addr = NULL
69 },
70 {
71 .cmd = CMD_AND,
72 .srcarg = 1,
73 .dstarg = 2,
74 .value = 0
75 },
76 {
77 .cmd = CMD_PREDICATE,
78 .srcarg = 2,
79 .value = 2
80 },
81 {
82 .cmd = CMD_PIO_WRITE_A_32,
83 .srcarg = 1,
84 .addr = NULL
85 },
86 {
87 .cmd = CMD_ACCEPT
88 }
89};
90
91static int hc_init_memory(hc_t *instance);
92
93/** Generate IRQ code.
94 * @param[out] ranges PIO ranges buffer.
95 * @param[in] hw_res Device's resources.
96 *
97 * @return Error code.
98 */
99int hc_gen_irq_code(irq_code_t *code, hc_device_t *hcd, const hw_res_list_parsed_t *hw_res)
100{
101 assert(code);
102 assert(hw_res);
103 hc_t *instance = hcd_to_hc(hcd);
104
105 if (hw_res->irqs.count != 1 || hw_res->mem_ranges.count != 1)
106 return EINVAL;
107
108 addr_range_t regs = hw_res->mem_ranges.ranges[0];
109
110 if (RNGSZ(regs) < sizeof(ehci_regs_t))
111 return EOVERFLOW;
112
113 code->ranges = malloc(sizeof(ehci_pio_ranges));
114 if (code->ranges == NULL)
115 return ENOMEM;
116
117 code->cmds = malloc(sizeof(ehci_irq_commands));
118 if (code->cmds == NULL) {
119 free(code->ranges);
120 return ENOMEM;
121 }
122
123 code->rangecount = ARRAY_SIZE(ehci_pio_ranges);
124 code->cmdcount = ARRAY_SIZE(ehci_irq_commands);
125
126 memcpy(code->ranges, ehci_pio_ranges, sizeof(ehci_pio_ranges));
127 code->ranges[0].base = RNGABS(regs);
128
129 memcpy(code->cmds, ehci_irq_commands, sizeof(ehci_irq_commands));
130
131 ehci_regs_t *registers =
132 (ehci_regs_t *)(RNGABSPTR(regs) + EHCI_RD8(instance->caps->caplength));
133 code->cmds[0].addr = (void *) &registers->usbsts;
134 code->cmds[3].addr = (void *) &registers->usbsts;
135 EHCI_WR(code->cmds[1].value, EHCI_USED_INTERRUPTS);
136
137 usb_log_debug("Memory mapped regs at %p (size %zu), IRQ %d.\n",
138 RNGABSPTR(regs), RNGSZ(regs), hw_res->irqs.irqs[0]);
139
140 return hw_res->irqs.irqs[0];
141}
142
143/** Initialize EHCI hc driver structure
144 *
145 * @param[in] instance Memory place for the structure.
146 * @param[in] regs Device's I/O registers range.
147 * @param[in] interrupts True if w interrupts should be used
148 * @return Error code
149 */
150int hc_add(hc_device_t *hcd, const hw_res_list_parsed_t *hw_res)
151{
152 hc_t *instance = hcd_to_hc(hcd);
153 assert(hw_res);
154 if (hw_res->mem_ranges.count != 1 ||
155 hw_res->mem_ranges.ranges[0].size <
156 (sizeof(ehci_caps_regs_t) + sizeof(ehci_regs_t)))
157 return EINVAL;
158
159 int ret = pio_enable_range(&hw_res->mem_ranges.ranges[0],
160 (void **)&instance->caps);
161 if (ret != EOK) {
162 usb_log_error("HC(%p): Failed to gain access to device "
163 "registers: %s.\n", instance, str_error(ret));
164 return ret;
165 }
166
167 usb_log_info("HC(%p): Device registers at %"PRIx64" (%zuB) accessible.",
168 instance, hw_res->mem_ranges.ranges[0].address.absolute,
169 hw_res->mem_ranges.ranges[0].size);
170 instance->registers =
171 (void*)instance->caps + EHCI_RD8(instance->caps->caplength);
172 usb_log_info("HC(%p): Device control registers at %" PRIx64, instance,
173 hw_res->mem_ranges.ranges[0].address.absolute
174 + EHCI_RD8(instance->caps->caplength));
175
176 list_initialize(&instance->pending_batches);
177 fibril_mutex_initialize(&instance->guard);
178 fibril_condvar_initialize(&instance->async_doorbell);
179
180 ret = hc_init_memory(instance);
181 if (ret != EOK) {
182 usb_log_error("HC(%p): Failed to create EHCI memory structures:"
183 " %s.", instance, str_error(ret));
184 return ret;
185 }
186
187 usb_log_info("HC(%p): Initializing RH(%p).", instance, &instance->rh);
188 ehci_rh_init(
189 &instance->rh, instance->caps, instance->registers, "ehci rh");
190
191 ehci_bus_init(&instance->bus, instance);
192 hc_device_setup(hcd, (bus_t *) &instance->bus);
193 return EOK;
194}
195
196/** Safely dispose host controller internal structures
197 *
198 * @param[in] instance Host controller structure to use.
199 */
200int hc_gone(hc_device_t *instance)
201{
202 assert(instance);
203 return EOK;
204 //TODO: stop the hw
205#if 0
206 endpoint_list_fini(&instance->async_list);
207 endpoint_list_fini(&instance->int_list);
208 return_page(instance->periodic_list_base);
209#endif
210};
211
212void hc_enqueue_endpoint(hc_t *instance, const endpoint_t *ep)
213{
214 assert(instance);
215 assert(ep);
216 ehci_endpoint_t *ehci_ep = ehci_endpoint_get(ep);
217 usb_log_debug("HC(%p) enqueue EP(%d:%d:%s:%s)\n", instance,
218 ep->device->address, ep->endpoint,
219 usb_str_transfer_type_short(ep->transfer_type),
220 usb_str_direction(ep->direction));
221 switch (ep->transfer_type)
222 {
223 case USB_TRANSFER_CONTROL:
224 case USB_TRANSFER_BULK:
225 endpoint_list_append_ep(&instance->async_list, ehci_ep);
226 break;
227 case USB_TRANSFER_INTERRUPT:
228 endpoint_list_append_ep(&instance->int_list, ehci_ep);
229 break;
230 case USB_TRANSFER_ISOCHRONOUS:
231 /* NOT SUPPORTED */
232 break;
233 }
234}
235
236void hc_dequeue_endpoint(hc_t *instance, const endpoint_t *ep)
237{
238 assert(instance);
239 assert(ep);
240 ehci_endpoint_t *ehci_ep = ehci_endpoint_get(ep);
241 usb_log_debug("HC(%p) dequeue EP(?:%d:%s:%s)\n", instance,
242 ep->endpoint,
243 usb_str_transfer_type_short(ep->transfer_type),
244 usb_str_direction(ep->direction));
245 switch (ep->transfer_type)
246 {
247 case USB_TRANSFER_INTERRUPT:
248 endpoint_list_remove_ep(&instance->int_list, ehci_ep);
249 /* Fall through */
250 case USB_TRANSFER_ISOCHRONOUS:
251 /* NOT SUPPORTED */
252 return;
253 case USB_TRANSFER_CONTROL:
254 case USB_TRANSFER_BULK:
255 endpoint_list_remove_ep(&instance->async_list, ehci_ep);
256 break;
257 }
258 fibril_mutex_lock(&instance->guard);
259 usb_log_debug("HC(%p): Waiting for doorbell", instance);
260 EHCI_SET(instance->registers->usbcmd, USB_CMD_IRQ_ASYNC_DOORBELL);
261 fibril_condvar_wait(&instance->async_doorbell, &instance->guard);
262 usb_log_debug2("HC(%p): Got doorbell", instance);
263 fibril_mutex_unlock(&instance->guard);
264}
265
266int ehci_hc_status(bus_t *bus_base, uint32_t *status)
267{
268 assert(bus_base);
269 assert(status);
270
271 ehci_bus_t *bus = (ehci_bus_t *) bus_base;
272 hc_t *hc = bus->hc;
273 assert(hc);
274
275 *status = 0;
276 if (hc->registers) {
277 *status = EHCI_RD(hc->registers->usbsts);
278 EHCI_WR(hc->registers->usbsts, *status);
279 }
280 usb_log_debug2("HC(%p): Read status: %x", hc, *status);
281 return EOK;
282}
283
284/** Add USB transfer to the schedule.
285 *
286 * @param[in] hcd HCD driver structure.
287 * @param[in] batch Batch representing the transfer.
288 * @return Error code.
289 */
290int ehci_hc_schedule(usb_transfer_batch_t *batch)
291{
292 assert(batch);
293
294 ehci_bus_t *bus = (ehci_bus_t *) endpoint_get_bus(batch->ep);
295 hc_t *hc = bus->hc;
296 assert(hc);
297
298 /* Check for root hub communication */
299 if (batch->target.address == ehci_rh_get_address(&hc->rh)) {
300 usb_log_debug("HC(%p): Scheduling BATCH(%p) for RH(%p)",
301 hc, batch, &hc->rh);
302 return ehci_rh_schedule(&hc->rh, batch);
303 }
304
305 ehci_transfer_batch_t *ehci_batch = ehci_transfer_batch_get(batch);
306
307 const int err = ehci_transfer_batch_prepare(ehci_batch);
308 if (err)
309 return err;
310
311 fibril_mutex_lock(&hc->guard);
312 usb_log_debug2("HC(%p): Appending BATCH(%p)", hc, batch);
313 list_append(&ehci_batch->link, &hc->pending_batches);
314 usb_log_debug("HC(%p): Committing BATCH(%p)", hc, batch);
315 ehci_transfer_batch_commit(ehci_batch);
316
317 fibril_mutex_unlock(&hc->guard);
318 return EOK;
319}
320
321/** Interrupt handling routine
322 *
323 * @param[in] hcd HCD driver structure.
324 * @param[in] status Value of the status register at the time of interrupt.
325 */
326void ehci_hc_interrupt(bus_t *bus_base, uint32_t status)
327{
328 assert(bus_base);
329
330 ehci_bus_t *bus = (ehci_bus_t *) bus_base;
331 hc_t *hc = bus->hc;
332 assert(hc);
333
334 usb_log_debug2("HC(%p): Interrupt: %"PRIx32, hc, status);
335 if (status & USB_STS_PORT_CHANGE_FLAG) {
336 ehci_rh_interrupt(&hc->rh);
337 }
338
339 if (status & USB_STS_IRQ_ASYNC_ADVANCE_FLAG) {
340 fibril_mutex_lock(&hc->guard);
341 usb_log_debug2("HC(%p): Signaling doorbell", hc);
342 fibril_condvar_broadcast(&hc->async_doorbell);
343 fibril_mutex_unlock(&hc->guard);
344 }
345
346 if (status & (USB_STS_IRQ_FLAG | USB_STS_ERR_IRQ_FLAG)) {
347 fibril_mutex_lock(&hc->guard);
348
349 usb_log_debug2("HC(%p): Scanning %lu pending batches", hc,
350 list_count(&hc->pending_batches));
351 list_foreach_safe(hc->pending_batches, current, next) {
352 ehci_transfer_batch_t *batch =
353 ehci_transfer_batch_from_link(current);
354
355 if (ehci_transfer_batch_check_completed(batch)) {
356 list_remove(current);
357 usb_transfer_batch_finish(&batch->base);
358 }
359 }
360 fibril_mutex_unlock(&hc->guard);
361 }
362
363 if (status & USB_STS_HOST_ERROR_FLAG) {
364 usb_log_fatal("HCD(%p): HOST SYSTEM ERROR!", hc);
365 //TODO do something here
366 }
367}
368
369/** EHCI hw initialization routine.
370 *
371 * @param[in] instance EHCI hc driver structure.
372 */
373int hc_start(hc_device_t *hcd)
374{
375 hc_t *instance = hcd_to_hc(hcd);
376 usb_log_debug("HC(%p): Starting HW.", instance);
377
378 /* Turn off the HC if it's running, Reseting a running device is
379 * undefined */
380 if (!(EHCI_RD(instance->registers->usbsts) & USB_STS_HC_HALTED_FLAG)) {
381 /* disable all interrupts */
382 EHCI_WR(instance->registers->usbintr, 0);
383 /* ack all interrupts */
384 EHCI_WR(instance->registers->usbsts, 0x3f);
385 /* Stop HC hw */
386 EHCI_WR(instance->registers->usbcmd, 0);
387 /* Wait until hc is halted */
388 while ((EHCI_RD(instance->registers->usbsts) & USB_STS_HC_HALTED_FLAG) == 0) {
389 async_usleep(1);
390 }
391 usb_log_info("HC(%p): EHCI turned off.", instance);
392 } else {
393 usb_log_info("HC(%p): EHCI was not running.", instance);
394 }
395
396 /* Hw initialization sequence, see page 53 (pdf 63) */
397 EHCI_SET(instance->registers->usbcmd, USB_CMD_HC_RESET_FLAG);
398 usb_log_info("HC(%p): Waiting for HW reset.", instance);
399 while (EHCI_RD(instance->registers->usbcmd) & USB_CMD_HC_RESET_FLAG) {
400 async_usleep(1);
401 }
402 usb_log_debug("HC(%p): HW reset OK.", instance);
403
404 /* Use the lowest 4G segment */
405 EHCI_WR(instance->registers->ctrldssegment, 0);
406
407 /* Enable periodic list */
408 assert(instance->periodic_list_base);
409 uintptr_t phys_base =
410 addr_to_phys((void*)instance->periodic_list_base);
411 assert((phys_base & USB_PERIODIC_LIST_BASE_MASK) == phys_base);
412 EHCI_WR(instance->registers->periodiclistbase, phys_base);
413 EHCI_SET(instance->registers->usbcmd, USB_CMD_PERIODIC_SCHEDULE_FLAG);
414 usb_log_debug("HC(%p): Enabled periodic list.", instance);
415
416
417 /* Enable Async schedule */
418 phys_base = addr_to_phys((void*)instance->async_list.list_head);
419 assert((phys_base & USB_ASYNCLIST_MASK) == phys_base);
420 EHCI_WR(instance->registers->asynclistaddr, phys_base);
421 EHCI_SET(instance->registers->usbcmd, USB_CMD_ASYNC_SCHEDULE_FLAG);
422 usb_log_debug("HC(%p): Enabled async list.", instance);
423
424 /* Start hc and get all ports */
425 EHCI_SET(instance->registers->usbcmd, USB_CMD_RUN_FLAG);
426 EHCI_SET(instance->registers->configflag, USB_CONFIG_FLAG_FLAG);
427 usb_log_debug("HC(%p): HW started.", instance);
428
429 usb_log_debug2("HC(%p): Registers: \n"
430 "\tUSBCMD(%p): %x(0x00080000 = at least 1ms between interrupts)\n"
431 "\tUSBSTS(%p): %x(0x00001000 = HC halted)\n"
432 "\tUSBINT(%p): %x(0x0 = no interrupts).\n"
433 "\tCONFIG(%p): %x(0x0 = ports controlled by companion hc).\n",
434 instance,
435 &instance->registers->usbcmd, EHCI_RD(instance->registers->usbcmd),
436 &instance->registers->usbsts, EHCI_RD(instance->registers->usbsts),
437 &instance->registers->usbintr, EHCI_RD(instance->registers->usbintr),
438 &instance->registers->configflag, EHCI_RD(instance->registers->configflag));
439 /* Clear and Enable interrupts */
440 EHCI_WR(instance->registers->usbsts, EHCI_RD(instance->registers->usbsts));
441 EHCI_WR(instance->registers->usbintr, EHCI_USED_INTERRUPTS);
442
443 return EOK;
444}
445
446/** Initialize memory structures used by the EHCI hcd.
447 *
448 * @param[in] instance EHCI hc driver structure.
449 * @return Error code.
450 */
451int hc_init_memory(hc_t *instance)
452{
453 assert(instance);
454 usb_log_debug2("HC(%p): Initializing Async list(%p).", instance,
455 &instance->async_list);
456 int ret = endpoint_list_init(&instance->async_list, "ASYNC");
457 if (ret != EOK) {
458 usb_log_error("HC(%p): Failed to setup ASYNC list: %s",
459 instance, str_error(ret));
460 return ret;
461 }
462 /* Specs say "Software must set queue head horizontal pointer T-bits to
463 * a zero for queue heads in the asynchronous schedule" (4.4.0).
464 * So we must maintain circular buffer (all horizontal pointers
465 * have to be valid */
466 endpoint_list_chain(&instance->async_list, &instance->async_list);
467
468 usb_log_debug2("HC(%p): Initializing Interrupt list (%p).", instance,
469 &instance->int_list);
470 ret = endpoint_list_init(&instance->int_list, "INT");
471 if (ret != EOK) {
472 usb_log_error("HC(%p): Failed to setup INT list: %s",
473 instance, str_error(ret));
474 endpoint_list_fini(&instance->async_list);
475 return ret;
476 }
477
478 /* Take 1024 periodic list heads, we ignore low mem options */
479 instance->periodic_list_base = get_page();
480 if (!instance->periodic_list_base) {
481 usb_log_error("HC(%p): Failed to get ISO schedule page.",
482 instance);
483 endpoint_list_fini(&instance->async_list);
484 endpoint_list_fini(&instance->int_list);
485 return ENOMEM;
486 }
487
488 usb_log_debug2("HC(%p): Initializing Periodic list.", instance);
489 for (unsigned i = 0;
490 i < PAGE_SIZE/sizeof(instance->periodic_list_base[0]); ++i)
491 {
492 /* Disable everything for now */
493 instance->periodic_list_base[i] =
494 LINK_POINTER_QH(addr_to_phys(instance->int_list.list_head));
495 }
496 return EOK;
497}
498
499/**
500 * @}
501 */
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