1 | /*
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2 | * Copyright (c) 2011 Jan Vesely
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 |
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29 | /** @addtogroup drvusbehcihc
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30 | * @{
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31 | */
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32 | /** @file
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33 | * @brief EHCI Host controller driver routines
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34 | */
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35 |
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36 | #include <assert.h>
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37 | #include <async.h>
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38 | #include <errno.h>
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39 | #include <macros.h>
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40 | #include <mem.h>
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41 | #include <stdlib.h>
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42 | #include <stdint.h>
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43 | #include <str_error.h>
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44 |
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45 | #include <usb/debug.h>
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46 | #include <usb/usb.h>
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47 | #include <usb/host/utility.h>
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48 |
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49 | #include "ehci_batch.h"
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50 |
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51 | #include "hc.h"
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52 |
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53 | #define EHCI_USED_INTERRUPTS \
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54 | (USB_INTR_IRQ_FLAG | USB_INTR_ERR_IRQ_FLAG | USB_INTR_PORT_CHANGE_FLAG | \
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55 | USB_INTR_ASYNC_ADVANCE_FLAG | USB_INTR_HOST_ERR_FLAG)
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56 |
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57 | static const irq_pio_range_t ehci_pio_ranges[] = {
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58 | {
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59 | .base = 0,
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60 | .size = sizeof(ehci_regs_t)
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61 | }
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62 | };
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63 |
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64 | static const irq_cmd_t ehci_irq_commands[] = {
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65 | {
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66 | .cmd = CMD_PIO_READ_32,
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67 | .dstarg = 1,
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68 | .addr = NULL
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69 | },
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70 | {
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71 | .cmd = CMD_AND,
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72 | .srcarg = 1,
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73 | .dstarg = 2,
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74 | .value = 0
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75 | },
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76 | {
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77 | .cmd = CMD_PREDICATE,
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78 | .srcarg = 2,
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79 | .value = 2
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80 | },
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81 | {
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82 | .cmd = CMD_PIO_WRITE_A_32,
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83 | .srcarg = 1,
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84 | .addr = NULL
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85 | },
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86 | {
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87 | .cmd = CMD_ACCEPT
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88 | }
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89 | };
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90 |
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91 | static errno_t hc_init_memory(hc_t *instance);
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92 |
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93 | /** Generate IRQ code.
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94 | * @param[out] ranges PIO ranges buffer.
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95 | * @param[in] hw_res Device's resources.
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96 | *
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97 | * @param[out] irq
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98 | *
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99 | * @return Error code.
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100 | */
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101 | errno_t hc_gen_irq_code(irq_code_t *code, hc_device_t *hcd, const hw_res_list_parsed_t *hw_res, int *irq)
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102 | {
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103 | assert(code);
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104 | assert(hw_res);
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105 | hc_t *instance = hcd_to_hc(hcd);
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106 |
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107 | if (hw_res->irqs.count != 1 || hw_res->mem_ranges.count != 1)
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108 | return EINVAL;
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109 |
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110 | addr_range_t regs = hw_res->mem_ranges.ranges[0];
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111 |
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112 | if (RNGSZ(regs) < sizeof(ehci_regs_t))
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113 | return EOVERFLOW;
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114 |
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115 | code->ranges = malloc(sizeof(ehci_pio_ranges));
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116 | if (code->ranges == NULL)
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117 | return ENOMEM;
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118 |
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119 | code->cmds = malloc(sizeof(ehci_irq_commands));
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120 | if (code->cmds == NULL) {
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121 | free(code->ranges);
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122 | return ENOMEM;
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123 | }
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124 |
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125 | code->rangecount = ARRAY_SIZE(ehci_pio_ranges);
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126 | code->cmdcount = ARRAY_SIZE(ehci_irq_commands);
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127 |
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128 | memcpy(code->ranges, ehci_pio_ranges, sizeof(ehci_pio_ranges));
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129 | code->ranges[0].base = RNGABS(regs);
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130 |
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131 | memcpy(code->cmds, ehci_irq_commands, sizeof(ehci_irq_commands));
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132 |
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133 | ehci_regs_t *registers =
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134 | (ehci_regs_t *)(RNGABSPTR(regs) + EHCI_RD8(instance->caps->caplength));
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135 | code->cmds[0].addr = (void *) ®isters->usbsts;
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136 | code->cmds[3].addr = (void *) ®isters->usbsts;
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137 | EHCI_WR(code->cmds[1].value, EHCI_USED_INTERRUPTS);
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138 |
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139 | usb_log_debug("Memory mapped regs at %p (size %zu), IRQ %d.",
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140 | RNGABSPTR(regs), RNGSZ(regs), hw_res->irqs.irqs[0]);
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141 |
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142 | *irq = hw_res->irqs.irqs[0];
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143 | return EOK;
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144 | }
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145 |
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146 | /** Initialize EHCI hc driver structure
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147 | *
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148 | * @param[in] instance Memory place for the structure.
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149 | * @param[in] regs Device's I/O registers range.
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150 | * @param[in] interrupts True if w interrupts should be used
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151 | * @return Error code
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152 | */
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153 | errno_t hc_add(hc_device_t *hcd, const hw_res_list_parsed_t *hw_res)
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154 | {
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155 | hc_t *instance = hcd_to_hc(hcd);
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156 | assert(hw_res);
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157 | if (hw_res->mem_ranges.count != 1 ||
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158 | hw_res->mem_ranges.ranges[0].size <
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159 | (sizeof(ehci_caps_regs_t) + sizeof(ehci_regs_t)))
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160 | return EINVAL;
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161 |
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162 | errno_t ret = pio_enable_range(&hw_res->mem_ranges.ranges[0],
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163 | (void **)&instance->caps);
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164 | if (ret != EOK) {
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165 | usb_log_error("HC(%p): Failed to gain access to device "
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166 | "registers: %s.", instance, str_error(ret));
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167 | return ret;
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168 | }
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169 |
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170 | usb_log_info("HC(%p): Device registers at %"PRIx64" (%zuB) accessible.",
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171 | instance, hw_res->mem_ranges.ranges[0].address.absolute,
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172 | hw_res->mem_ranges.ranges[0].size);
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173 | instance->registers =
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174 | (void*)instance->caps + EHCI_RD8(instance->caps->caplength);
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175 | usb_log_info("HC(%p): Device control registers at %" PRIx64, instance,
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176 | hw_res->mem_ranges.ranges[0].address.absolute
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177 | + EHCI_RD8(instance->caps->caplength));
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178 |
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179 | list_initialize(&instance->pending_endpoints);
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180 | fibril_mutex_initialize(&instance->guard);
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181 | fibril_condvar_initialize(&instance->async_doorbell);
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182 |
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183 | ret = hc_init_memory(instance);
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184 | if (ret != EOK) {
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185 | usb_log_error("HC(%p): Failed to create EHCI memory structures:"
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186 | " %s.", instance, str_error(ret));
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187 | return ret;
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188 | }
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189 |
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190 | usb_log_info("HC(%p): Initializing RH(%p).", instance, &instance->rh);
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191 | ehci_rh_init(
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192 | &instance->rh, instance->caps, instance->registers, &instance->guard,
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193 | "ehci rh");
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194 |
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195 | ehci_bus_init(&instance->bus, instance);
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196 | hc_device_setup(hcd, (bus_t *) &instance->bus);
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197 | return EOK;
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198 | }
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199 |
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200 | /** Safely dispose host controller internal structures
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201 | *
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202 | * @param[in] instance Host controller structure to use.
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203 | */
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204 | int hc_gone(hc_device_t *hcd)
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205 | {
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206 | hc_t *hc = hcd_to_hc(hcd);
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207 | endpoint_list_fini(&hc->async_list);
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208 | endpoint_list_fini(&hc->int_list);
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209 | dma_buffer_free(&hc->dma_buffer);
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210 | return EOK;
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211 | };
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212 |
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213 | void hc_enqueue_endpoint(hc_t *instance, const endpoint_t *ep)
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214 | {
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215 | assert(instance);
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216 | assert(ep);
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217 | ehci_endpoint_t *ehci_ep = ehci_endpoint_get(ep);
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218 | usb_log_debug("HC(%p) enqueue EP(%d:%d:%s:%s)", instance,
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219 | ep->device->address, ep->endpoint,
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220 | usb_str_transfer_type_short(ep->transfer_type),
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221 | usb_str_direction(ep->direction));
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222 | switch (ep->transfer_type)
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223 | {
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224 | case USB_TRANSFER_CONTROL:
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225 | case USB_TRANSFER_BULK:
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226 | endpoint_list_append_ep(&instance->async_list, ehci_ep);
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227 | break;
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228 | case USB_TRANSFER_INTERRUPT:
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229 | endpoint_list_append_ep(&instance->int_list, ehci_ep);
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230 | break;
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231 | case USB_TRANSFER_ISOCHRONOUS:
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232 | /* NOT SUPPORTED */
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233 | break;
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234 | }
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235 | }
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236 |
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237 | void hc_dequeue_endpoint(hc_t *instance, const endpoint_t *ep)
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238 | {
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239 | assert(instance);
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240 | assert(ep);
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241 | ehci_endpoint_t *ehci_ep = ehci_endpoint_get(ep);
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242 | usb_log_debug("HC(%p) dequeue EP(%d:%d:%s:%s)", instance,
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243 | ep->device->address, ep->endpoint,
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244 | usb_str_transfer_type_short(ep->transfer_type),
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245 | usb_str_direction(ep->direction));
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246 | switch (ep->transfer_type)
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247 | {
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248 | case USB_TRANSFER_INTERRUPT:
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249 | endpoint_list_remove_ep(&instance->int_list, ehci_ep);
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250 | /* Fall through */
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251 | case USB_TRANSFER_ISOCHRONOUS:
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252 | /* NOT SUPPORTED */
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253 | return;
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254 | case USB_TRANSFER_CONTROL:
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255 | case USB_TRANSFER_BULK:
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256 | endpoint_list_remove_ep(&instance->async_list, ehci_ep);
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257 | break;
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258 | }
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259 | fibril_mutex_lock(&instance->guard);
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260 | usb_log_debug("HC(%p): Waiting for doorbell", instance);
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261 | EHCI_SET(instance->registers->usbcmd, USB_CMD_IRQ_ASYNC_DOORBELL);
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262 | fibril_condvar_wait(&instance->async_doorbell, &instance->guard);
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263 | usb_log_debug2("HC(%p): Got doorbell", instance);
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264 | fibril_mutex_unlock(&instance->guard);
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265 | }
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266 |
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267 | errno_t ehci_hc_status(bus_t *bus_base, uint32_t *status)
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268 | {
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269 | assert(bus_base);
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270 | assert(status);
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271 |
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272 | ehci_bus_t *bus = (ehci_bus_t *) bus_base;
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273 | hc_t *hc = bus->hc;
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274 | assert(hc);
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275 |
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276 | *status = 0;
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277 | if (hc->registers) {
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278 | *status = EHCI_RD(hc->registers->usbsts);
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279 | EHCI_WR(hc->registers->usbsts, *status);
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280 | }
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281 | usb_log_debug2("HC(%p): Read status: %x", hc, *status);
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282 | return EOK;
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283 | }
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284 |
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285 | /** Add USB transfer to the schedule.
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286 | *
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287 | * @param[in] hcd HCD driver structure.
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288 | * @param[in] batch Batch representing the transfer.
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289 | * @return Error code.
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290 | */
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291 | errno_t ehci_hc_schedule(usb_transfer_batch_t *batch)
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292 | {
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293 | assert(batch);
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294 |
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295 | ehci_bus_t *bus = (ehci_bus_t *) endpoint_get_bus(batch->ep);
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296 | hc_t *hc = bus->hc;
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297 | assert(hc);
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298 |
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299 | /* Check for root hub communication */
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300 | if (batch->target.address == ehci_rh_get_address(&hc->rh)) {
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301 | usb_log_debug("HC(%p): Scheduling BATCH(%p) for RH(%p)",
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302 | hc, batch, &hc->rh);
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303 | return ehci_rh_schedule(&hc->rh, batch);
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304 | }
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305 |
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306 | endpoint_t * const ep = batch->ep;
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307 | ehci_endpoint_t * const ehci_ep = ehci_endpoint_get(ep);
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308 | ehci_transfer_batch_t *ehci_batch = ehci_transfer_batch_get(batch);
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309 |
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310 | int err;
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311 |
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312 | if ((err = ehci_transfer_batch_prepare(ehci_batch)))
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313 | return err;
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314 |
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315 | fibril_mutex_lock(&hc->guard);
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316 |
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317 | if ((err = endpoint_activate_locked(ep, batch))) {
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318 | fibril_mutex_unlock(&hc->guard);
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319 | return err;
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320 | }
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321 |
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322 | usb_log_debug("HC(%p): Committing BATCH(%p)", hc, batch);
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323 | ehci_transfer_batch_commit(ehci_batch);
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324 |
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325 | /* Enqueue endpoint to the checked list */
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326 | usb_log_debug2("HC(%p): Appending BATCH(%p)", hc, batch);
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327 | list_append(&ehci_ep->pending_link, &hc->pending_endpoints);
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328 |
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329 | fibril_mutex_unlock(&hc->guard);
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330 | return EOK;
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331 | }
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332 |
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333 | /** Interrupt handling routine
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334 | *
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335 | * @param[in] hcd HCD driver structure.
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336 | * @param[in] status Value of the status register at the time of interrupt.
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337 | */
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338 | void ehci_hc_interrupt(bus_t *bus_base, uint32_t status)
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339 | {
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340 | assert(bus_base);
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341 |
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342 | ehci_bus_t *bus = (ehci_bus_t *) bus_base;
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343 | hc_t *hc = bus->hc;
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344 | assert(hc);
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345 |
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346 | usb_log_debug2("HC(%p): Interrupt: %"PRIx32, hc, status);
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347 | if (status & USB_STS_PORT_CHANGE_FLAG) {
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348 | ehci_rh_interrupt(&hc->rh);
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349 | }
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350 |
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351 | if (status & USB_STS_IRQ_ASYNC_ADVANCE_FLAG) {
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352 | fibril_mutex_lock(&hc->guard);
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353 | usb_log_debug2("HC(%p): Signaling doorbell", hc);
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354 | fibril_condvar_broadcast(&hc->async_doorbell);
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355 | fibril_mutex_unlock(&hc->guard);
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356 | }
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357 |
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358 | if (status & (USB_STS_IRQ_FLAG | USB_STS_ERR_IRQ_FLAG)) {
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359 | fibril_mutex_lock(&hc->guard);
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360 |
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361 | usb_log_debug2("HC(%p): Scanning %lu pending endpoints", hc,
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362 | list_count(&hc->pending_endpoints));
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363 | list_foreach_safe(hc->pending_endpoints, current, next) {
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364 | ehci_endpoint_t *ep
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365 | = list_get_instance(current, ehci_endpoint_t, pending_link);
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366 |
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367 | ehci_transfer_batch_t *batch
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368 | = ehci_transfer_batch_get(ep->base.active_batch);
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369 | assert(batch);
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370 |
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371 | if (ehci_transfer_batch_check_completed(batch)) {
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372 | endpoint_deactivate_locked(&ep->base);
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373 | list_remove(current);
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374 | hc_reset_toggles(&batch->base, &ehci_ep_toggle_reset);
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375 | usb_transfer_batch_finish(&batch->base);
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376 | }
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377 | }
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378 | fibril_mutex_unlock(&hc->guard);
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379 |
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380 |
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381 | }
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382 |
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383 | if (status & USB_STS_HOST_ERROR_FLAG) {
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384 | usb_log_fatal("HCD(%p): HOST SYSTEM ERROR!", hc);
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385 | //TODO do something here
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386 | }
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387 | }
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388 |
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389 | /** EHCI hw initialization routine.
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390 | *
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391 | * @param[in] instance EHCI hc driver structure.
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392 | */
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393 | int hc_start(hc_device_t *hcd)
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394 | {
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395 | hc_t *instance = hcd_to_hc(hcd);
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396 | usb_log_debug("HC(%p): Starting HW.", instance);
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397 |
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398 | /* Turn off the HC if it's running, Reseting a running device is
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399 | * undefined */
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400 | if (!(EHCI_RD(instance->registers->usbsts) & USB_STS_HC_HALTED_FLAG)) {
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401 | /* disable all interrupts */
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402 | EHCI_WR(instance->registers->usbintr, 0);
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403 | /* ack all interrupts */
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404 | EHCI_WR(instance->registers->usbsts, 0x3f);
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405 | /* Stop HC hw */
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406 | EHCI_WR(instance->registers->usbcmd, 0);
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407 | /* Wait until hc is halted */
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408 | while ((EHCI_RD(instance->registers->usbsts) & USB_STS_HC_HALTED_FLAG) == 0) {
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409 | async_usleep(1);
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410 | }
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411 | usb_log_info("HC(%p): EHCI turned off.", instance);
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412 | } else {
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413 | usb_log_info("HC(%p): EHCI was not running.", instance);
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414 | }
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415 |
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416 | /* Hw initialization sequence, see page 53 (pdf 63) */
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417 | EHCI_SET(instance->registers->usbcmd, USB_CMD_HC_RESET_FLAG);
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418 | usb_log_info("HC(%p): Waiting for HW reset.", instance);
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419 | while (EHCI_RD(instance->registers->usbcmd) & USB_CMD_HC_RESET_FLAG) {
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420 | async_usleep(1);
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421 | }
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422 | usb_log_debug("HC(%p): HW reset OK.", instance);
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423 |
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424 | /* Use the lowest 4G segment */
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425 | EHCI_WR(instance->registers->ctrldssegment, 0);
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426 |
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427 | /* Enable periodic list */
|
---|
428 | assert(instance->periodic_list);
|
---|
429 | uintptr_t phys_base =
|
---|
430 | addr_to_phys((void*)instance->periodic_list);
|
---|
431 | assert((phys_base & USB_PERIODIC_LIST_BASE_MASK) == phys_base);
|
---|
432 | EHCI_WR(instance->registers->periodiclistbase, phys_base);
|
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433 | EHCI_SET(instance->registers->usbcmd, USB_CMD_PERIODIC_SCHEDULE_FLAG);
|
---|
434 | usb_log_debug("HC(%p): Enabled periodic list.", instance);
|
---|
435 |
|
---|
436 |
|
---|
437 | /* Enable Async schedule */
|
---|
438 | phys_base = addr_to_phys((void*)instance->async_list.list_head);
|
---|
439 | assert((phys_base & USB_ASYNCLIST_MASK) == phys_base);
|
---|
440 | EHCI_WR(instance->registers->asynclistaddr, phys_base);
|
---|
441 | EHCI_SET(instance->registers->usbcmd, USB_CMD_ASYNC_SCHEDULE_FLAG);
|
---|
442 | usb_log_debug("HC(%p): Enabled async list.", instance);
|
---|
443 |
|
---|
444 | /* Start hc and get all ports */
|
---|
445 | EHCI_SET(instance->registers->usbcmd, USB_CMD_RUN_FLAG);
|
---|
446 | EHCI_SET(instance->registers->configflag, USB_CONFIG_FLAG_FLAG);
|
---|
447 | usb_log_debug("HC(%p): HW started.", instance);
|
---|
448 |
|
---|
449 | usb_log_debug2("HC(%p): Registers: "
|
---|
450 | "\tUSBCMD(%p): %x(0x00080000 = at least 1ms between interrupts)"
|
---|
451 | "\tUSBSTS(%p): %x(0x00001000 = HC halted)"
|
---|
452 | "\tUSBINT(%p): %x(0x0 = no interrupts)."
|
---|
453 | "\tCONFIG(%p): %x(0x0 = ports controlled by companion hc).",
|
---|
454 | instance,
|
---|
455 | &instance->registers->usbcmd, EHCI_RD(instance->registers->usbcmd),
|
---|
456 | &instance->registers->usbsts, EHCI_RD(instance->registers->usbsts),
|
---|
457 | &instance->registers->usbintr, EHCI_RD(instance->registers->usbintr),
|
---|
458 | &instance->registers->configflag, EHCI_RD(instance->registers->configflag));
|
---|
459 | /* Clear and Enable interrupts */
|
---|
460 | EHCI_WR(instance->registers->usbsts, EHCI_RD(instance->registers->usbsts));
|
---|
461 | EHCI_WR(instance->registers->usbintr, EHCI_USED_INTERRUPTS);
|
---|
462 |
|
---|
463 | return EOK;
|
---|
464 | }
|
---|
465 |
|
---|
466 | /**
|
---|
467 | * Setup roothub as a virtual hub.
|
---|
468 | */
|
---|
469 | int hc_setup_roothub(hc_device_t *hcd)
|
---|
470 | {
|
---|
471 | return hc_setup_virtual_root_hub(hcd, USB_SPEED_HIGH);
|
---|
472 | }
|
---|
473 |
|
---|
474 | /** Initialize memory structures used by the EHCI hcd.
|
---|
475 | *
|
---|
476 | * @param[in] instance EHCI hc driver structure.
|
---|
477 | * @return Error code.
|
---|
478 | */
|
---|
479 | errno_t hc_init_memory(hc_t *instance)
|
---|
480 | {
|
---|
481 | assert(instance);
|
---|
482 | usb_log_debug2("HC(%p): Initializing Async list(%p).", instance,
|
---|
483 | &instance->async_list);
|
---|
484 | errno_t ret = endpoint_list_init(&instance->async_list, "ASYNC");
|
---|
485 | if (ret != EOK) {
|
---|
486 | usb_log_error("HC(%p): Failed to setup ASYNC list: %s",
|
---|
487 | instance, str_error(ret));
|
---|
488 | return ret;
|
---|
489 | }
|
---|
490 | /* Specs say "Software must set queue head horizontal pointer T-bits to
|
---|
491 | * a zero for queue heads in the asynchronous schedule" (4.4.0).
|
---|
492 | * So we must maintain circular buffer (all horizontal pointers
|
---|
493 | * have to be valid */
|
---|
494 | endpoint_list_chain(&instance->async_list, &instance->async_list);
|
---|
495 |
|
---|
496 | usb_log_debug2("HC(%p): Initializing Interrupt list (%p).", instance,
|
---|
497 | &instance->int_list);
|
---|
498 | ret = endpoint_list_init(&instance->int_list, "INT");
|
---|
499 | if (ret != EOK) {
|
---|
500 | usb_log_error("HC(%p): Failed to setup INT list: %s",
|
---|
501 | instance, str_error(ret));
|
---|
502 | endpoint_list_fini(&instance->async_list);
|
---|
503 | return ret;
|
---|
504 | }
|
---|
505 |
|
---|
506 | /* Take 1024 periodic list heads, we ignore low mem options */
|
---|
507 | if (dma_buffer_alloc(&instance->dma_buffer, PAGE_SIZE)) {
|
---|
508 | usb_log_error("HC(%p): Failed to get ISO schedule page.",
|
---|
509 | instance);
|
---|
510 | endpoint_list_fini(&instance->async_list);
|
---|
511 | endpoint_list_fini(&instance->int_list);
|
---|
512 | return ENOMEM;
|
---|
513 | }
|
---|
514 | instance->periodic_list = instance->dma_buffer.virt;
|
---|
515 |
|
---|
516 | usb_log_debug2("HC(%p): Initializing Periodic list.", instance);
|
---|
517 | for (unsigned i = 0; i < PAGE_SIZE/sizeof(link_pointer_t); ++i)
|
---|
518 | {
|
---|
519 | /* Disable everything for now */
|
---|
520 | instance->periodic_list[i] =
|
---|
521 | LINK_POINTER_QH(addr_to_phys(instance->int_list.list_head));
|
---|
522 | }
|
---|
523 | return EOK;
|
---|
524 | }
|
---|
525 |
|
---|
526 | /**
|
---|
527 | * @}
|
---|
528 | */
|
---|