source: mainline/uspace/drv/bus/usb/ehci/hc.c@ 09ab0a9a

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 09ab0a9a was 09ab0a9a, checked in by Jiri Svoboda <jiri@…>, 7 years ago

Fix vertical spacing with new Ccheck revision.
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1/*
2 * Copyright (c) 2011 Jan Vesely
3 * Copyright (c) 2018 Ondrej Hlavaty
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30/** @addtogroup drvusbehci
31 * @{
32 */
33/** @file
34 * @brief EHCI Host controller driver routines
35 */
36
37#include <assert.h>
38#include <async.h>
39#include <errno.h>
40#include <macros.h>
41#include <mem.h>
42#include <stdlib.h>
43#include <stdint.h>
44#include <str_error.h>
45
46#include <usb/debug.h>
47#include <usb/usb.h>
48#include <usb/host/utility.h>
49
50#include "ehci_batch.h"
51
52#include "hc.h"
53
54#define EHCI_USED_INTERRUPTS \
55 (USB_INTR_IRQ_FLAG | USB_INTR_ERR_IRQ_FLAG | USB_INTR_PORT_CHANGE_FLAG | \
56 USB_INTR_ASYNC_ADVANCE_FLAG | USB_INTR_HOST_ERR_FLAG)
57
58static const irq_pio_range_t ehci_pio_ranges[] = {
59 {
60 .base = 0,
61 .size = sizeof(ehci_regs_t)
62 }
63};
64
65static const irq_cmd_t ehci_irq_commands[] = {
66 {
67 .cmd = CMD_PIO_READ_32,
68 .dstarg = 1,
69 .addr = NULL
70 },
71 {
72 .cmd = CMD_AND,
73 .srcarg = 1,
74 .dstarg = 2,
75 .value = 0
76 },
77 {
78 .cmd = CMD_PREDICATE,
79 .srcarg = 2,
80 .value = 2
81 },
82 {
83 .cmd = CMD_PIO_WRITE_A_32,
84 .srcarg = 1,
85 .addr = NULL
86 },
87 {
88 .cmd = CMD_ACCEPT
89 }
90};
91
92static errno_t hc_init_memory(hc_t *instance);
93
94/** Generate IRQ code.
95 * @param[out] ranges PIO ranges buffer.
96 * @param[in] hw_res Device's resources.
97 *
98 * @param[out] irq
99 *
100 * @return Error code.
101 */
102errno_t hc_gen_irq_code(irq_code_t *code, hc_device_t *hcd, const hw_res_list_parsed_t *hw_res, int *irq)
103{
104 assert(code);
105 assert(hw_res);
106 hc_t *instance = hcd_to_hc(hcd);
107
108 if (hw_res->irqs.count != 1 || hw_res->mem_ranges.count != 1)
109 return EINVAL;
110
111 addr_range_t regs = hw_res->mem_ranges.ranges[0];
112
113 if (RNGSZ(regs) < sizeof(ehci_regs_t))
114 return EOVERFLOW;
115
116 code->ranges = malloc(sizeof(ehci_pio_ranges));
117 if (code->ranges == NULL)
118 return ENOMEM;
119
120 code->cmds = malloc(sizeof(ehci_irq_commands));
121 if (code->cmds == NULL) {
122 free(code->ranges);
123 return ENOMEM;
124 }
125
126 code->rangecount = ARRAY_SIZE(ehci_pio_ranges);
127 code->cmdcount = ARRAY_SIZE(ehci_irq_commands);
128
129 memcpy(code->ranges, ehci_pio_ranges, sizeof(ehci_pio_ranges));
130 code->ranges[0].base = RNGABS(regs);
131
132 memcpy(code->cmds, ehci_irq_commands, sizeof(ehci_irq_commands));
133
134 ehci_regs_t *registers =
135 (ehci_regs_t *)(RNGABSPTR(regs) + EHCI_RD8(instance->caps->caplength));
136 code->cmds[0].addr = (void *) &registers->usbsts;
137 code->cmds[3].addr = (void *) &registers->usbsts;
138 EHCI_WR(code->cmds[1].value, EHCI_USED_INTERRUPTS);
139
140 usb_log_debug("Memory mapped regs at %p (size %zu), IRQ %d.",
141 RNGABSPTR(regs), RNGSZ(regs), hw_res->irqs.irqs[0]);
142
143 *irq = hw_res->irqs.irqs[0];
144 return EOK;
145}
146
147/** Initialize EHCI hc driver structure
148 *
149 * @param[in] instance Memory place for the structure.
150 * @param[in] regs Device's I/O registers range.
151 * @param[in] interrupts True if w interrupts should be used
152 * @return Error code
153 */
154errno_t hc_add(hc_device_t *hcd, const hw_res_list_parsed_t *hw_res)
155{
156 hc_t *instance = hcd_to_hc(hcd);
157 assert(hw_res);
158 if (hw_res->mem_ranges.count != 1 ||
159 hw_res->mem_ranges.ranges[0].size <
160 (sizeof(ehci_caps_regs_t) + sizeof(ehci_regs_t)))
161 return EINVAL;
162
163 errno_t ret = pio_enable_range(&hw_res->mem_ranges.ranges[0],
164 (void **)&instance->caps);
165 if (ret != EOK) {
166 usb_log_error("HC(%p): Failed to gain access to device "
167 "registers: %s.", instance, str_error(ret));
168 return ret;
169 }
170
171 usb_log_info("HC(%p): Device registers at %" PRIx64 " (%zuB) accessible.",
172 instance, hw_res->mem_ranges.ranges[0].address.absolute,
173 hw_res->mem_ranges.ranges[0].size);
174 instance->registers =
175 (void *)instance->caps + EHCI_RD8(instance->caps->caplength);
176 usb_log_info("HC(%p): Device control registers at %" PRIx64, instance,
177 hw_res->mem_ranges.ranges[0].address.absolute +
178 EHCI_RD8(instance->caps->caplength));
179
180 list_initialize(&instance->pending_endpoints);
181 fibril_mutex_initialize(&instance->guard);
182 fibril_condvar_initialize(&instance->async_doorbell);
183
184 ret = hc_init_memory(instance);
185 if (ret != EOK) {
186 usb_log_error("HC(%p): Failed to create EHCI memory structures:"
187 " %s.", instance, str_error(ret));
188 return ret;
189 }
190
191 usb_log_info("HC(%p): Initializing RH(%p).", instance, &instance->rh);
192 ehci_rh_init(
193 &instance->rh, instance->caps, instance->registers, &instance->guard,
194 "ehci rh");
195
196 ehci_bus_init(&instance->bus, instance);
197 hc_device_setup(hcd, (bus_t *) &instance->bus);
198 return EOK;
199}
200
201/** Safely dispose host controller internal structures
202 *
203 * @param[in] instance Host controller structure to use.
204 */
205int hc_gone(hc_device_t *hcd)
206{
207 hc_t *hc = hcd_to_hc(hcd);
208 endpoint_list_fini(&hc->async_list);
209 endpoint_list_fini(&hc->int_list);
210 dma_buffer_free(&hc->dma_buffer);
211 return EOK;
212}
213
214void hc_enqueue_endpoint(hc_t *instance, const endpoint_t *ep)
215{
216 assert(instance);
217 assert(ep);
218 ehci_endpoint_t *ehci_ep = ehci_endpoint_get(ep);
219 usb_log_debug("HC(%p) enqueue EP(%d:%d:%s:%s)", instance,
220 ep->device->address, ep->endpoint,
221 usb_str_transfer_type_short(ep->transfer_type),
222 usb_str_direction(ep->direction));
223 switch (ep->transfer_type) {
224 case USB_TRANSFER_CONTROL:
225 case USB_TRANSFER_BULK:
226 endpoint_list_append_ep(&instance->async_list, ehci_ep);
227 break;
228 case USB_TRANSFER_INTERRUPT:
229 endpoint_list_append_ep(&instance->int_list, ehci_ep);
230 break;
231 case USB_TRANSFER_ISOCHRONOUS:
232 /* NOT SUPPORTED */
233 break;
234 }
235}
236
237void hc_dequeue_endpoint(hc_t *instance, const endpoint_t *ep)
238{
239 assert(instance);
240 assert(ep);
241 ehci_endpoint_t *ehci_ep = ehci_endpoint_get(ep);
242 usb_log_debug("HC(%p) dequeue EP(%d:%d:%s:%s)", instance,
243 ep->device->address, ep->endpoint,
244 usb_str_transfer_type_short(ep->transfer_type),
245 usb_str_direction(ep->direction));
246 switch (ep->transfer_type) {
247 case USB_TRANSFER_INTERRUPT:
248 endpoint_list_remove_ep(&instance->int_list, ehci_ep);
249 /* Fall through */
250 case USB_TRANSFER_ISOCHRONOUS:
251 /* NOT SUPPORTED */
252 return;
253 case USB_TRANSFER_CONTROL:
254 case USB_TRANSFER_BULK:
255 endpoint_list_remove_ep(&instance->async_list, ehci_ep);
256 break;
257 }
258 fibril_mutex_lock(&instance->guard);
259 usb_log_debug("HC(%p): Waiting for doorbell", instance);
260 EHCI_SET(instance->registers->usbcmd, USB_CMD_IRQ_ASYNC_DOORBELL);
261 fibril_condvar_wait(&instance->async_doorbell, &instance->guard);
262 usb_log_debug2("HC(%p): Got doorbell", instance);
263 fibril_mutex_unlock(&instance->guard);
264}
265
266errno_t ehci_hc_status(bus_t *bus_base, uint32_t *status)
267{
268 assert(bus_base);
269 assert(status);
270
271 ehci_bus_t *bus = (ehci_bus_t *) bus_base;
272 hc_t *hc = bus->hc;
273 assert(hc);
274
275 *status = 0;
276 if (hc->registers) {
277 *status = EHCI_RD(hc->registers->usbsts);
278 EHCI_WR(hc->registers->usbsts, *status);
279 }
280 usb_log_debug2("HC(%p): Read status: %x", hc, *status);
281 return EOK;
282}
283
284/** Add USB transfer to the schedule.
285 *
286 * @param[in] hcd HCD driver structure.
287 * @param[in] batch Batch representing the transfer.
288 * @return Error code.
289 */
290errno_t ehci_hc_schedule(usb_transfer_batch_t *batch)
291{
292 assert(batch);
293
294 ehci_bus_t *bus = (ehci_bus_t *) endpoint_get_bus(batch->ep);
295 hc_t *hc = bus->hc;
296 assert(hc);
297
298 /* Check for root hub communication */
299 if (batch->target.address == ehci_rh_get_address(&hc->rh)) {
300 usb_log_debug("HC(%p): Scheduling BATCH(%p) for RH(%p)",
301 hc, batch, &hc->rh);
302 return ehci_rh_schedule(&hc->rh, batch);
303 }
304
305 endpoint_t *const ep = batch->ep;
306 ehci_endpoint_t *const ehci_ep = ehci_endpoint_get(ep);
307 ehci_transfer_batch_t *ehci_batch = ehci_transfer_batch_get(batch);
308
309 int err;
310
311 if ((err = ehci_transfer_batch_prepare(ehci_batch)))
312 return err;
313
314 fibril_mutex_lock(&hc->guard);
315
316 if ((err = endpoint_activate_locked(ep, batch))) {
317 fibril_mutex_unlock(&hc->guard);
318 return err;
319 }
320
321 usb_log_debug("HC(%p): Committing BATCH(%p)", hc, batch);
322 ehci_transfer_batch_commit(ehci_batch);
323
324 /* Enqueue endpoint to the checked list */
325 usb_log_debug2("HC(%p): Appending BATCH(%p)", hc, batch);
326 list_append(&ehci_ep->pending_link, &hc->pending_endpoints);
327
328 fibril_mutex_unlock(&hc->guard);
329 return EOK;
330}
331
332/** Interrupt handling routine
333 *
334 * @param[in] hcd HCD driver structure.
335 * @param[in] status Value of the status register at the time of interrupt.
336 */
337void ehci_hc_interrupt(bus_t *bus_base, uint32_t status)
338{
339 assert(bus_base);
340
341 ehci_bus_t *bus = (ehci_bus_t *) bus_base;
342 hc_t *hc = bus->hc;
343 assert(hc);
344
345 usb_log_debug2("HC(%p): Interrupt: %" PRIx32, hc, status);
346 if (status & USB_STS_PORT_CHANGE_FLAG) {
347 ehci_rh_interrupt(&hc->rh);
348 }
349
350 if (status & USB_STS_IRQ_ASYNC_ADVANCE_FLAG) {
351 fibril_mutex_lock(&hc->guard);
352 usb_log_debug2("HC(%p): Signaling doorbell", hc);
353 fibril_condvar_broadcast(&hc->async_doorbell);
354 fibril_mutex_unlock(&hc->guard);
355 }
356
357 if (status & (USB_STS_IRQ_FLAG | USB_STS_ERR_IRQ_FLAG)) {
358 fibril_mutex_lock(&hc->guard);
359
360 usb_log_debug2("HC(%p): Scanning %lu pending endpoints", hc,
361 list_count(&hc->pending_endpoints));
362 list_foreach_safe(hc->pending_endpoints, current, next) {
363 ehci_endpoint_t *ep =
364 list_get_instance(current, ehci_endpoint_t, pending_link);
365
366 ehci_transfer_batch_t *batch =
367 ehci_transfer_batch_get(ep->base.active_batch);
368 assert(batch);
369
370 if (ehci_transfer_batch_check_completed(batch)) {
371 endpoint_deactivate_locked(&ep->base);
372 list_remove(current);
373 hc_reset_toggles(&batch->base, &ehci_ep_toggle_reset);
374 usb_transfer_batch_finish(&batch->base);
375 }
376 }
377 fibril_mutex_unlock(&hc->guard);
378
379 }
380
381 if (status & USB_STS_HOST_ERROR_FLAG) {
382 usb_log_fatal("HCD(%p): HOST SYSTEM ERROR!", hc);
383 //TODO do something here
384 }
385}
386
387/** EHCI hw initialization routine.
388 *
389 * @param[in] instance EHCI hc driver structure.
390 */
391int hc_start(hc_device_t *hcd)
392{
393 hc_t *instance = hcd_to_hc(hcd);
394 usb_log_debug("HC(%p): Starting HW.", instance);
395
396 /*
397 * Turn off the HC if it's running, Reseting a running device is
398 * undefined
399 */
400 if (!(EHCI_RD(instance->registers->usbsts) & USB_STS_HC_HALTED_FLAG)) {
401 /* disable all interrupts */
402 EHCI_WR(instance->registers->usbintr, 0);
403 /* ack all interrupts */
404 EHCI_WR(instance->registers->usbsts, 0x3f);
405 /* Stop HC hw */
406 EHCI_WR(instance->registers->usbcmd, 0);
407 /* Wait until hc is halted */
408 while ((EHCI_RD(instance->registers->usbsts) & USB_STS_HC_HALTED_FLAG) == 0) {
409 fibril_usleep(1);
410 }
411 usb_log_info("HC(%p): EHCI turned off.", instance);
412 } else {
413 usb_log_info("HC(%p): EHCI was not running.", instance);
414 }
415
416 /* Hw initialization sequence, see page 53 (pdf 63) */
417 EHCI_SET(instance->registers->usbcmd, USB_CMD_HC_RESET_FLAG);
418 usb_log_info("HC(%p): Waiting for HW reset.", instance);
419 while (EHCI_RD(instance->registers->usbcmd) & USB_CMD_HC_RESET_FLAG) {
420 fibril_usleep(1);
421 }
422 usb_log_debug("HC(%p): HW reset OK.", instance);
423
424 /* Use the lowest 4G segment */
425 EHCI_WR(instance->registers->ctrldssegment, 0);
426
427 /* Enable periodic list */
428 assert(instance->periodic_list);
429 uintptr_t phys_base =
430 addr_to_phys((void *)instance->periodic_list);
431 assert((phys_base & USB_PERIODIC_LIST_BASE_MASK) == phys_base);
432 EHCI_WR(instance->registers->periodiclistbase, phys_base);
433 EHCI_SET(instance->registers->usbcmd, USB_CMD_PERIODIC_SCHEDULE_FLAG);
434 usb_log_debug("HC(%p): Enabled periodic list.", instance);
435
436 /* Enable Async schedule */
437 phys_base = addr_to_phys((void *)instance->async_list.list_head);
438 assert((phys_base & USB_ASYNCLIST_MASK) == phys_base);
439 EHCI_WR(instance->registers->asynclistaddr, phys_base);
440 EHCI_SET(instance->registers->usbcmd, USB_CMD_ASYNC_SCHEDULE_FLAG);
441 usb_log_debug("HC(%p): Enabled async list.", instance);
442
443 /* Start hc and get all ports */
444 EHCI_SET(instance->registers->usbcmd, USB_CMD_RUN_FLAG);
445 EHCI_SET(instance->registers->configflag, USB_CONFIG_FLAG_FLAG);
446 usb_log_debug("HC(%p): HW started.", instance);
447
448 usb_log_debug2("HC(%p): Registers: "
449 "\tUSBCMD(%p): %x(0x00080000 = at least 1ms between interrupts)"
450 "\tUSBSTS(%p): %x(0x00001000 = HC halted)"
451 "\tUSBINT(%p): %x(0x0 = no interrupts)."
452 "\tCONFIG(%p): %x(0x0 = ports controlled by companion hc).",
453 instance,
454 &instance->registers->usbcmd, EHCI_RD(instance->registers->usbcmd),
455 &instance->registers->usbsts, EHCI_RD(instance->registers->usbsts),
456 &instance->registers->usbintr, EHCI_RD(instance->registers->usbintr),
457 &instance->registers->configflag, EHCI_RD(instance->registers->configflag));
458 /* Clear and Enable interrupts */
459 EHCI_WR(instance->registers->usbsts, EHCI_RD(instance->registers->usbsts));
460 EHCI_WR(instance->registers->usbintr, EHCI_USED_INTERRUPTS);
461
462 return EOK;
463}
464
465/**
466 * Setup roothub as a virtual hub.
467 */
468int hc_setup_roothub(hc_device_t *hcd)
469{
470 return hc_setup_virtual_root_hub(hcd, USB_SPEED_HIGH);
471}
472
473/** Initialize memory structures used by the EHCI hcd.
474 *
475 * @param[in] instance EHCI hc driver structure.
476 * @return Error code.
477 */
478errno_t hc_init_memory(hc_t *instance)
479{
480 assert(instance);
481 usb_log_debug2("HC(%p): Initializing Async list(%p).", instance,
482 &instance->async_list);
483 errno_t ret = endpoint_list_init(&instance->async_list, "ASYNC");
484 if (ret != EOK) {
485 usb_log_error("HC(%p): Failed to setup ASYNC list: %s",
486 instance, str_error(ret));
487 return ret;
488 }
489 /*
490 * Specs say "Software must set queue head horizontal pointer T-bits to
491 * a zero for queue heads in the asynchronous schedule" (4.4.0).
492 * So we must maintain circular buffer (all horizontal pointers
493 * have to be valid
494 */
495 endpoint_list_chain(&instance->async_list, &instance->async_list);
496
497 usb_log_debug2("HC(%p): Initializing Interrupt list (%p).", instance,
498 &instance->int_list);
499 ret = endpoint_list_init(&instance->int_list, "INT");
500 if (ret != EOK) {
501 usb_log_error("HC(%p): Failed to setup INT list: %s",
502 instance, str_error(ret));
503 endpoint_list_fini(&instance->async_list);
504 return ret;
505 }
506
507 /* Take 1024 periodic list heads, we ignore low mem options */
508 if (dma_buffer_alloc(&instance->dma_buffer, PAGE_SIZE)) {
509 usb_log_error("HC(%p): Failed to get ISO schedule page.",
510 instance);
511 endpoint_list_fini(&instance->async_list);
512 endpoint_list_fini(&instance->int_list);
513 return ENOMEM;
514 }
515 instance->periodic_list = instance->dma_buffer.virt;
516
517 usb_log_debug2("HC(%p): Initializing Periodic list.", instance);
518 for (unsigned i = 0; i < PAGE_SIZE / sizeof(link_pointer_t); ++i) {
519 /* Disable everything for now */
520 instance->periodic_list[i] =
521 LINK_POINTER_QH(addr_to_phys(instance->int_list.list_head));
522 }
523 return EOK;
524}
525
526/**
527 * @}
528 */
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