[8a81e431] | 1 | /*
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| 2 | * Copyright (c) 2014 Jan Vesely
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[e0a5d4c] | 3 | * Copyright (c) 2018 Ondrej Hlavaty
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[8a81e431] | 4 | * All rights reserved.
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| 5 | *
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| 6 | * Redistribution and use in source and binary forms, with or without
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| 7 | * modification, are permitted provided that the following conditions
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| 8 | * are met:
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| 9 | *
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| 10 | * - Redistributions of source code must retain the above copyright
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| 11 | * notice, this list of conditions and the following disclaimer.
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| 12 | * - Redistributions in binary form must reproduce the above copyright
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| 13 | * notice, this list of conditions and the following disclaimer in the
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| 14 | * documentation and/or other materials provided with the distribution.
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| 15 | * - The name of the author may not be used to endorse or promote products
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| 16 | * derived from this software without specific prior written permission.
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| 17 | *
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| 18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 28 | */
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| 29 | /** @addtogroup drvusbehci
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| 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | * @brief EHCI driver USB transaction structure
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| 34 | */
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| 35 |
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| 36 | #include <assert.h>
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| 37 | #include <errno.h>
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| 38 | #include <macros.h>
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| 39 | #include <mem.h>
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| 40 | #include <stdbool.h>
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[6ef69e9] | 41 | #include <str_error.h>
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[8a81e431] | 42 |
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| 43 | #include <usb/usb.h>
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| 44 | #include <usb/debug.h>
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| 45 |
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| 46 | #include "ehci_batch.h"
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[741bcdeb] | 47 | #include "ehci_bus.h"
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[8a81e431] | 48 |
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[7c3fb9b] | 49 | /*
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| 50 | * The buffer pointer list in the qTD is long enough to support a maximum
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[6602e97] | 51 | * transfer size of 20K bytes. This case occurs when all five buffer pointers
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| 52 | * are used and the first offset is zero. A qTD handles a 16Kbyte buffer
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[7c3fb9b] | 53 | * with any starting buffer alignment. EHCI specs p. 87 (pdf p. 97)
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| 54 | */
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[6602e97] | 55 | #define EHCI_TD_MAX_TRANSFER (16 * 1024)
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| 56 |
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[3bacee1] | 57 | static void (*const batch_setup[])(ehci_transfer_batch_t *);
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[8a81e431] | 58 |
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| 59 | /** Safely destructs ehci_transfer_batch_t structure
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| 60 | *
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| 61 | * @param[in] ehci_batch Instance to destroy.
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| 62 | */
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[5fd9c30] | 63 | void ehci_transfer_batch_destroy(ehci_transfer_batch_t *ehci_batch)
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[8a81e431] | 64 | {
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[5fd9c30] | 65 | assert(ehci_batch);
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[c21e6a5] | 66 | dma_buffer_free(&ehci_batch->ehci_dma_buffer);
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[090eea68] | 67 | usb_log_debug2("Batch(%p): disposed", ehci_batch);
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[806a779] | 68 | free(ehci_batch);
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[8a81e431] | 69 | }
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| 70 |
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| 71 | /** Allocate memory and initialize internal data structure.
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| 72 | *
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| 73 | * @param[in] usb_batch Pointer to generic USB batch structure.
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| 74 | * @return Valid pointer if all structures were successfully created,
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| 75 | * NULL otherwise.
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| 76 | *
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| 77 | */
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[3bacee1] | 78 | ehci_transfer_batch_t *ehci_transfer_batch_create(endpoint_t *ep)
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[8a81e431] | 79 | {
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[5fd9c30] | 80 | assert(ep);
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[8a81e431] | 81 |
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[5fd9c30] | 82 | ehci_transfer_batch_t *ehci_batch = calloc(1, sizeof(ehci_transfer_batch_t));
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[8a81e431] | 83 | if (!ehci_batch) {
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[5fd9c30] | 84 | usb_log_error("Failed to allocate EHCI batch data.");
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| 85 | return NULL;
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[8a81e431] | 86 | }
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[5fd9c30] | 87 |
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| 88 | usb_transfer_batch_init(&ehci_batch->base, ep);
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| 89 |
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| 90 | return ehci_batch;
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| 91 | }
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| 92 |
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| 93 | /** Prepares a batch to be sent.
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| 94 | *
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| 95 | * Determines the number of needed transfer descriptors (TDs).
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| 96 | * Prepares a transport buffer (that is accessible by the hardware).
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| 97 | * Initializes parameters needed for the transfer and callback.
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| 98 | */
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| 99 | int ehci_transfer_batch_prepare(ehci_transfer_batch_t *ehci_batch)
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| 100 | {
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| 101 | assert(ehci_batch);
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| 102 |
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[3bacee1] | 103 | const size_t setup_size = (ehci_batch->base.ep->transfer_type == USB_TRANSFER_CONTROL) ?
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| 104 | USB_SETUP_PACKET_SIZE :
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| 105 | 0;
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[5fd9c30] | 106 |
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[1d758fc] | 107 | const size_t size = ehci_batch->base.size;
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[5fd9c30] | 108 |
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| 109 | /* Add TD left over by the previous transfer */
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| 110 | ehci_batch->qh = ehci_endpoint_get(ehci_batch->base.ep)->qh;
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| 111 |
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| 112 | /* Determine number of TDs needed */
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[3bacee1] | 113 | ehci_batch->td_count = (size + EHCI_TD_MAX_TRANSFER - 1) /
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| 114 | EHCI_TD_MAX_TRANSFER;
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[6602e97] | 115 |
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[8a81e431] | 116 | /* Control transfer need Setup and Status stage */
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[5fd9c30] | 117 | if (ehci_batch->base.ep->transfer_type == USB_TRANSFER_CONTROL) {
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[8a81e431] | 118 | ehci_batch->td_count += 2;
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| 119 | }
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| 120 |
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[c21e6a5] | 121 | assert(ehci_batch->td_count > 0);
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| 122 |
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[35c37fc] | 123 | const size_t tds_size = ehci_batch->td_count * sizeof(td_t);
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[8a81e431] | 124 |
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[c21e6a5] | 125 | /* Mix setup stage and TDs together, we have enough space */
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| 126 | if (dma_buffer_alloc(&ehci_batch->ehci_dma_buffer, tds_size + setup_size)) {
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| 127 | usb_log_error("Batch %p: Failed to allocate device buffer",
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| 128 | ehci_batch);
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| 129 | return ENOMEM;
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[8a81e431] | 130 | }
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| 131 |
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[c21e6a5] | 132 | /* Clean TDs */
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| 133 | ehci_batch->tds = ehci_batch->ehci_dma_buffer.virt;
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| 134 | memset(ehci_batch->tds, 0, tds_size);
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| 135 |
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| 136 | /* Copy setup data */
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| 137 | ehci_batch->setup_buffer = ehci_batch->ehci_dma_buffer.virt + tds_size;
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| 138 | memcpy(ehci_batch->setup_buffer, ehci_batch->base.setup.buffer, setup_size);
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| 139 |
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[d1582b50] | 140 | /* Generic data already prepared */
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[c21e6a5] | 141 | ehci_batch->data_buffer = ehci_batch->base.dma_buffer.virt;
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| 142 |
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[2ca5a198] | 143 | if (!batch_setup[ehci_batch->base.ep->transfer_type])
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| 144 | return ENOTSUP;
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| 145 |
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[5fd9c30] | 146 | batch_setup[ehci_batch->base.ep->transfer_type](ehci_batch);
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[8a81e431] | 147 |
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[a1732929] | 148 | usb_log_debug("Batch %p %s " USB_TRANSFER_BATCH_FMT " initialized.",
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[5fd9c30] | 149 | ehci_batch, usb_str_direction(ehci_batch->base.dir),
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| 150 | USB_TRANSFER_BATCH_ARGS(ehci_batch->base));
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[6ef69e9] | 151 |
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[5fd9c30] | 152 | return EOK;
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[8a81e431] | 153 | }
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| 154 |
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| 155 | /** Check batch TDs' status.
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| 156 | *
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| 157 | * @param[in] ehci_batch Batch structure to use.
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| 158 | * @return False, if there is an active TD, true otherwise.
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| 159 | *
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| 160 | * Walk all TDs (usually there is just one). Stop with false if there is an
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| 161 | * active TD. Stop with true if an error is found. Return true if the walk
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| 162 | * completes with the last TD.
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| 163 | */
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[5fd9c30] | 164 | bool ehci_transfer_batch_check_completed(ehci_transfer_batch_t *ehci_batch)
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[8a81e431] | 165 | {
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| 166 | assert(ehci_batch);
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| 167 |
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[a1732929] | 168 | usb_log_debug("Batch %p: checking %zu td(s) for completion.",
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[5fd9c30] | 169 | ehci_batch, ehci_batch->td_count);
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[8a81e431] | 170 |
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[a1732929] | 171 | usb_log_debug2("Batch %p: QH: %08x:%08x:%08x:%08x:%08x:%08x.",
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[5fd9c30] | 172 | ehci_batch,
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[6602e97] | 173 | ehci_batch->qh->ep_char, ehci_batch->qh->ep_cap,
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| 174 | ehci_batch->qh->status, ehci_batch->qh->current,
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| 175 | ehci_batch->qh->next, ehci_batch->qh->alternate);
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| 176 |
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[3bacee1] | 177 | if (!qh_halted(ehci_batch->qh) && (qh_transfer_pending(ehci_batch->qh) ||
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| 178 | qh_transfer_active(ehci_batch->qh)))
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[8a81e431] | 179 | return false;
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| 180 |
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[7c3fb9b] | 181 | /*
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| 182 | * Now we may be sure that either the ED is inactive because of errors
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| 183 | * or all transfer descriptors completed successfully
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| 184 | */
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[8a81e431] | 185 |
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| 186 | /* Assume all data got through */
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[1d758fc] | 187 | ehci_batch->base.transferred_size = ehci_batch->base.size;
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[8a81e431] | 188 |
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| 189 | /* Check all TDs */
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| 190 | for (size_t i = 0; i < ehci_batch->td_count; ++i) {
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[090eea68] | 191 | usb_log_debug("Batch %p: TD %zu: %08x:%08x:%08x.",
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[5fd9c30] | 192 | ehci_batch, i,
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[35c37fc] | 193 | ehci_batch->tds[i].status, ehci_batch->tds[i].next,
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| 194 | ehci_batch->tds[i].alternate);
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[a752c78c] | 195 |
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[35c37fc] | 196 | ehci_batch->base.error = td_error(&ehci_batch->tds[i]);
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[5fd9c30] | 197 | if (ehci_batch->base.error == EOK) {
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[7c3fb9b] | 198 | /*
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| 199 | * If the TD got all its data through, it will report
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[8a81e431] | 200 | * 0 bytes remain, the sole exception is INPUT with
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| 201 | * data rounding flag (short), i.e. every INPUT.
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| 202 | * Nice thing is that short packets will correctly
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| 203 | * report remaining data, thus making this computation
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| 204 | * correct (short packets need to be produced by the
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| 205 | * last TD)
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| 206 | * NOTE: This also works for CONTROL transfer as
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| 207 | * the first TD will return 0 remain.
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| 208 | * NOTE: Short packets don't break the assumption that
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| 209 | * we leave the very last(unused) TD behind.
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| 210 | */
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[3bacee1] | 211 | ehci_batch->base.transferred_size -=
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| 212 | td_remain_size(&ehci_batch->tds[i]);
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[8a81e431] | 213 | } else {
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[c1694b6b] | 214 | usb_log_debug("Batch %p found error TD(%zu):%08x: %s.",
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[5fd9c30] | 215 | ehci_batch, i,
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[35c37fc] | 216 | ehci_batch->tds[i].status,
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[132ab5d1] | 217 | str_error_name(ehci_batch->base.error));
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[8a81e431] | 218 | /* Clear possible ED HALT */
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[a752c78c] | 219 | qh_clear_halt(ehci_batch->qh);
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[8a81e431] | 220 | break;
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| 221 | }
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| 222 | }
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[6602e97] | 223 |
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[1d758fc] | 224 | assert(ehci_batch->base.transferred_size <= ehci_batch->base.size);
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[5fd9c30] | 225 |
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[a752c78c] | 226 | /* Clear TD pointers */
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| 227 | ehci_batch->qh->next = LINK_POINTER_TERM;
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| 228 | ehci_batch->qh->current = LINK_POINTER_TERM;
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[5fd9c30] | 229 | usb_log_debug("Batch %p complete: %s", ehci_batch,
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| 230 | str_error(ehci_batch->base.error));
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[8a81e431] | 231 |
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| 232 | return true;
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| 233 | }
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| 234 |
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| 235 | /** Starts execution of the TD list
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| 236 | *
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| 237 | * @param[in] ehci_batch Batch structure to use
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| 238 | */
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| 239 | void ehci_transfer_batch_commit(const ehci_transfer_batch_t *ehci_batch)
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| 240 | {
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| 241 | assert(ehci_batch);
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[c21e6a5] | 242 | qh_set_next_td(ehci_batch->qh,
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| 243 | dma_buffer_phys(&ehci_batch->ehci_dma_buffer, &ehci_batch->tds[0]));
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[8a81e431] | 244 | }
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| 245 |
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| 246 | /** Prepare generic control transfer
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| 247 | *
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| 248 | * @param[in] ehci_batch Batch structure to use.
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| 249 | *
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| 250 | * Setup stage with toggle 0 and direction BOTH(SETUP_PID)
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[5fd9c30] | 251 | * Data stage with alternating toggle and direction
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| 252 | * Status stage with toggle 1 and direction
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[8a81e431] | 253 | */
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[5fd9c30] | 254 | static void batch_control(ehci_transfer_batch_t *ehci_batch)
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[8a81e431] | 255 | {
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| 256 | assert(ehci_batch);
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[5fd9c30] | 257 |
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| 258 | usb_direction_t dir = ehci_batch->base.dir;
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[8a81e431] | 259 | assert(dir == USB_DIRECTION_IN || dir == USB_DIRECTION_OUT);
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[6602e97] | 260 |
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[35c37fc] | 261 | usb_log_debug2("Batch %p: Control QH(%p): "
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[5fd9c30] | 262 | "%08x:%08x:%08x:%08x:%08x:%08x", ehci_batch,
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[35c37fc] | 263 | ehci_batch->qh,
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[6602e97] | 264 | ehci_batch->qh->ep_char, ehci_batch->qh->ep_cap,
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| 265 | ehci_batch->qh->status, ehci_batch->qh->current,
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| 266 | ehci_batch->qh->next, ehci_batch->qh->alternate);
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[8a81e431] | 267 | static const usb_direction_t reverse_dir[] = {
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| 268 | [USB_DIRECTION_IN] = USB_DIRECTION_OUT,
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| 269 | [USB_DIRECTION_OUT] = USB_DIRECTION_IN,
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| 270 | };
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| 271 |
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| 272 | int toggle = 0;
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| 273 | const usb_direction_t data_dir = dir;
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| 274 | const usb_direction_t status_dir = reverse_dir[dir];
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| 275 |
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| 276 | /* Setup stage */
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[35c37fc] | 277 | td_init(&ehci_batch->tds[0],
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[c21e6a5] | 278 | dma_buffer_phys(&ehci_batch->ehci_dma_buffer, &ehci_batch->tds[1]),
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| 279 | dma_buffer_phys(&ehci_batch->ehci_dma_buffer, ehci_batch->setup_buffer),
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[35c37fc] | 280 | USB_DIRECTION_BOTH, USB_SETUP_PACKET_SIZE, toggle, false);
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[3bacee1] | 281 | usb_log_debug2("Batch %p: Created CONTROL SETUP TD(%" PRIxn "): "
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[5fd9c30] | 282 | "%08x:%08x:%08x", ehci_batch,
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[c21e6a5] | 283 | dma_buffer_phys(&ehci_batch->ehci_dma_buffer, &ehci_batch->tds[0]),
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[35c37fc] | 284 | ehci_batch->tds[0].status, ehci_batch->tds[0].next,
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| 285 | ehci_batch->tds[0].alternate);
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[8a81e431] | 286 |
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| 287 | /* Data stage */
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[35c37fc] | 288 | unsigned td_current = 1;
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[1d758fc] | 289 | size_t remain_size = ehci_batch->base.size;
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[c21e6a5] | 290 | uintptr_t buffer = dma_buffer_phys(&ehci_batch->base.dma_buffer,
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| 291 | ehci_batch->data_buffer);
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[8a81e431] | 292 | while (remain_size > 0) {
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[35c37fc] | 293 | const size_t transfer_size = min(remain_size, EHCI_TD_MAX_TRANSFER);
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[8a81e431] | 294 | toggle = 1 - toggle;
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| 295 |
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[35c37fc] | 296 | td_init(&ehci_batch->tds[td_current],
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[c21e6a5] | 297 | dma_buffer_phys(&ehci_batch->ehci_dma_buffer, &ehci_batch->tds[td_current + 1]),
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[35c37fc] | 298 | buffer, data_dir, transfer_size, toggle, false);
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[3bacee1] | 299 | usb_log_debug2("Batch %p: Created CONTROL DATA TD(%" PRIxn "): "
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[5fd9c30] | 300 | "%08x:%08x:%08x", ehci_batch,
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[c21e6a5] | 301 | dma_buffer_phys(&ehci_batch->ehci_dma_buffer, &ehci_batch->tds[td_current]),
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[35c37fc] | 302 | ehci_batch->tds[td_current].status,
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| 303 | ehci_batch->tds[td_current].next,
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| 304 | ehci_batch->tds[td_current].alternate);
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[8a81e431] | 305 |
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| 306 | buffer += transfer_size;
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| 307 | remain_size -= transfer_size;
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| 308 | assert(td_current < ehci_batch->td_count - 1);
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| 309 | ++td_current;
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| 310 | }
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| 311 |
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| 312 | /* Status stage */
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| 313 | assert(td_current == ehci_batch->td_count - 1);
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[35c37fc] | 314 | td_init(&ehci_batch->tds[td_current], 0, 0, status_dir, 0, 1, true);
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[3bacee1] | 315 | usb_log_debug2("Batch %p: Created CONTROL STATUS TD %d(%" PRIxn "): "
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[35c37fc] | 316 | "%08x:%08x:%08x", ehci_batch, td_current,
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[c21e6a5] | 317 | dma_buffer_phys(&ehci_batch->ehci_dma_buffer, &ehci_batch->tds[td_current]),
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[35c37fc] | 318 | ehci_batch->tds[td_current].status,
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| 319 | ehci_batch->tds[td_current].next,
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| 320 | ehci_batch->tds[td_current].alternate);
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[8a81e431] | 321 | }
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| 322 |
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| 323 | /** Prepare generic data transfer
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| 324 | *
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| 325 | * @param[in] ehci_batch Batch structure to use.
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| 326 | * @paramp[in] dir Communication direction.
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| 327 | *
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| 328 | * Direction is supplied by the associated ep and toggle is maintained by the
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| 329 | * EHCI hw in ED.
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| 330 | */
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[5fd9c30] | 331 | static void batch_data(ehci_transfer_batch_t *ehci_batch)
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[8a81e431] | 332 | {
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| 333 | assert(ehci_batch);
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[6602e97] | 334 |
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[35c37fc] | 335 | usb_log_debug2("Batch %p: Data QH(%p): "
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[5fd9c30] | 336 | "%08x:%08x:%08x:%08x:%08x:%08x", ehci_batch,
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[35c37fc] | 337 | ehci_batch->qh,
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[6602e97] | 338 | ehci_batch->qh->ep_char, ehci_batch->qh->ep_cap,
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| 339 | ehci_batch->qh->status, ehci_batch->qh->current,
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| 340 | ehci_batch->qh->next, ehci_batch->qh->alternate);
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[8a81e431] | 341 |
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| 342 | size_t td_current = 0;
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[1d758fc] | 343 | size_t remain_size = ehci_batch->base.size;
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[c21e6a5] | 344 | uintptr_t buffer = dma_buffer_phys(&ehci_batch->base.dma_buffer,
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| 345 | ehci_batch->data_buffer);
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[8a81e431] | 346 | while (remain_size > 0) {
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[3bacee1] | 347 | const size_t transfer_size = remain_size > EHCI_TD_MAX_TRANSFER ?
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| 348 | EHCI_TD_MAX_TRANSFER : remain_size;
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[8a81e431] | 349 |
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[00bbc362] | 350 | const bool last = (remain_size == transfer_size);
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[35c37fc] | 351 | td_init(&ehci_batch->tds[td_current],
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[c21e6a5] | 352 | last ? 0 : dma_buffer_phys(&ehci_batch->ehci_dma_buffer,
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[3bacee1] | 353 | &ehci_batch->tds[td_current + 1]),
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[35c37fc] | 354 | buffer, ehci_batch->base.dir, transfer_size, -1, last);
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[8a81e431] | 355 |
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[3bacee1] | 356 | usb_log_debug2("Batch %p: DATA TD(%" PRIxn ": %08x:%08x:%08x",
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[5fd9c30] | 357 | ehci_batch,
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[c21e6a5] | 358 | dma_buffer_phys(&ehci_batch->ehci_dma_buffer,
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[3bacee1] | 359 | &ehci_batch->tds[td_current]),
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[35c37fc] | 360 | ehci_batch->tds[td_current].status,
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| 361 | ehci_batch->tds[td_current].next,
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| 362 | ehci_batch->tds[td_current].alternate);
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[8a81e431] | 363 |
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| 364 | buffer += transfer_size;
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| 365 | remain_size -= transfer_size;
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| 366 | assert(td_current < ehci_batch->td_count);
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| 367 | ++td_current;
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| 368 | }
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| 369 | }
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| 370 |
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| 371 | /** Transfer setup table. */
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[3bacee1] | 372 | static void (*const batch_setup[])(ehci_transfer_batch_t *) =
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| 373 | {
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[8a81e431] | 374 | [USB_TRANSFER_CONTROL] = batch_control,
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| 375 | [USB_TRANSFER_BULK] = batch_data,
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| 376 | [USB_TRANSFER_INTERRUPT] = batch_data,
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| 377 | [USB_TRANSFER_ISOCHRONOUS] = NULL,
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| 378 | };
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| 379 | /**
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| 380 | * @}
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| 381 | */
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