source: mainline/uspace/drv/bus/usb/ehci/ehci_batch.c@ d1582b50

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since d1582b50 was d1582b50, checked in by Jiri Svoboda <jiri@…>, 5 years ago

Fix spacing in single-line comments using latest ccheck

This found incorrectly formatted section comments (with blocks of
asterisks or dashes). I strongly believe against using section comments
but I am not simply removing them since that would probably be
controversial.
  • Property mode set to 100644
File size: 12.5 KB
Line 
1/*
2 * Copyright (c) 2014 Jan Vesely
3 * Copyright (c) 2018 Ondrej Hlavaty
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29/** @addtogroup drvusbehci
30 * @{
31 */
32/** @file
33 * @brief EHCI driver USB transaction structure
34 */
35
36#include <assert.h>
37#include <errno.h>
38#include <macros.h>
39#include <mem.h>
40#include <stdbool.h>
41#include <str_error.h>
42
43#include <usb/usb.h>
44#include <usb/debug.h>
45
46#include "ehci_batch.h"
47#include "ehci_bus.h"
48
49/*
50 * The buffer pointer list in the qTD is long enough to support a maximum
51 * transfer size of 20K bytes. This case occurs when all five buffer pointers
52 * are used and the first offset is zero. A qTD handles a 16Kbyte buffer
53 * with any starting buffer alignment. EHCI specs p. 87 (pdf p. 97)
54 */
55#define EHCI_TD_MAX_TRANSFER (16 * 1024)
56
57static void (*const batch_setup[])(ehci_transfer_batch_t *);
58
59/** Safely destructs ehci_transfer_batch_t structure
60 *
61 * @param[in] ehci_batch Instance to destroy.
62 */
63void ehci_transfer_batch_destroy(ehci_transfer_batch_t *ehci_batch)
64{
65 assert(ehci_batch);
66 dma_buffer_free(&ehci_batch->ehci_dma_buffer);
67 usb_log_debug2("Batch(%p): disposed", ehci_batch);
68 free(ehci_batch);
69}
70
71/** Allocate memory and initialize internal data structure.
72 *
73 * @param[in] usb_batch Pointer to generic USB batch structure.
74 * @return Valid pointer if all structures were successfully created,
75 * NULL otherwise.
76 *
77 */
78ehci_transfer_batch_t *ehci_transfer_batch_create(endpoint_t *ep)
79{
80 assert(ep);
81
82 ehci_transfer_batch_t *ehci_batch = calloc(1, sizeof(ehci_transfer_batch_t));
83 if (!ehci_batch) {
84 usb_log_error("Failed to allocate EHCI batch data.");
85 return NULL;
86 }
87
88 usb_transfer_batch_init(&ehci_batch->base, ep);
89
90 return ehci_batch;
91}
92
93/** Prepares a batch to be sent.
94 *
95 * Determines the number of needed transfer descriptors (TDs).
96 * Prepares a transport buffer (that is accessible by the hardware).
97 * Initializes parameters needed for the transfer and callback.
98 */
99int ehci_transfer_batch_prepare(ehci_transfer_batch_t *ehci_batch)
100{
101 assert(ehci_batch);
102
103 const size_t setup_size = (ehci_batch->base.ep->transfer_type == USB_TRANSFER_CONTROL) ?
104 USB_SETUP_PACKET_SIZE :
105 0;
106
107 const size_t size = ehci_batch->base.size;
108
109 /* Add TD left over by the previous transfer */
110 ehci_batch->qh = ehci_endpoint_get(ehci_batch->base.ep)->qh;
111
112 /* Determine number of TDs needed */
113 ehci_batch->td_count = (size + EHCI_TD_MAX_TRANSFER - 1) /
114 EHCI_TD_MAX_TRANSFER;
115
116 /* Control transfer need Setup and Status stage */
117 if (ehci_batch->base.ep->transfer_type == USB_TRANSFER_CONTROL) {
118 ehci_batch->td_count += 2;
119 }
120
121 assert(ehci_batch->td_count > 0);
122
123 const size_t tds_size = ehci_batch->td_count * sizeof(td_t);
124
125 /* Mix setup stage and TDs together, we have enough space */
126 if (dma_buffer_alloc(&ehci_batch->ehci_dma_buffer, tds_size + setup_size)) {
127 usb_log_error("Batch %p: Failed to allocate device buffer",
128 ehci_batch);
129 return ENOMEM;
130 }
131
132 /* Clean TDs */
133 ehci_batch->tds = ehci_batch->ehci_dma_buffer.virt;
134 memset(ehci_batch->tds, 0, tds_size);
135
136 /* Copy setup data */
137 ehci_batch->setup_buffer = ehci_batch->ehci_dma_buffer.virt + tds_size;
138 memcpy(ehci_batch->setup_buffer, ehci_batch->base.setup.buffer, setup_size);
139
140 /* Generic data already prepared */
141 ehci_batch->data_buffer = ehci_batch->base.dma_buffer.virt;
142
143 if (!batch_setup[ehci_batch->base.ep->transfer_type])
144 return ENOTSUP;
145
146 batch_setup[ehci_batch->base.ep->transfer_type](ehci_batch);
147
148 usb_log_debug("Batch %p %s " USB_TRANSFER_BATCH_FMT " initialized.",
149 ehci_batch, usb_str_direction(ehci_batch->base.dir),
150 USB_TRANSFER_BATCH_ARGS(ehci_batch->base));
151
152 return EOK;
153}
154
155/** Check batch TDs' status.
156 *
157 * @param[in] ehci_batch Batch structure to use.
158 * @return False, if there is an active TD, true otherwise.
159 *
160 * Walk all TDs (usually there is just one). Stop with false if there is an
161 * active TD. Stop with true if an error is found. Return true if the walk
162 * completes with the last TD.
163 */
164bool ehci_transfer_batch_check_completed(ehci_transfer_batch_t *ehci_batch)
165{
166 assert(ehci_batch);
167
168 usb_log_debug("Batch %p: checking %zu td(s) for completion.",
169 ehci_batch, ehci_batch->td_count);
170
171 usb_log_debug2("Batch %p: QH: %08x:%08x:%08x:%08x:%08x:%08x.",
172 ehci_batch,
173 ehci_batch->qh->ep_char, ehci_batch->qh->ep_cap,
174 ehci_batch->qh->status, ehci_batch->qh->current,
175 ehci_batch->qh->next, ehci_batch->qh->alternate);
176
177 if (!qh_halted(ehci_batch->qh) && (qh_transfer_pending(ehci_batch->qh) ||
178 qh_transfer_active(ehci_batch->qh)))
179 return false;
180
181 /*
182 * Now we may be sure that either the ED is inactive because of errors
183 * or all transfer descriptors completed successfully
184 */
185
186 /* Assume all data got through */
187 ehci_batch->base.transferred_size = ehci_batch->base.size;
188
189 /* Check all TDs */
190 for (size_t i = 0; i < ehci_batch->td_count; ++i) {
191 usb_log_debug("Batch %p: TD %zu: %08x:%08x:%08x.",
192 ehci_batch, i,
193 ehci_batch->tds[i].status, ehci_batch->tds[i].next,
194 ehci_batch->tds[i].alternate);
195
196 ehci_batch->base.error = td_error(&ehci_batch->tds[i]);
197 if (ehci_batch->base.error == EOK) {
198 /*
199 * If the TD got all its data through, it will report
200 * 0 bytes remain, the sole exception is INPUT with
201 * data rounding flag (short), i.e. every INPUT.
202 * Nice thing is that short packets will correctly
203 * report remaining data, thus making this computation
204 * correct (short packets need to be produced by the
205 * last TD)
206 * NOTE: This also works for CONTROL transfer as
207 * the first TD will return 0 remain.
208 * NOTE: Short packets don't break the assumption that
209 * we leave the very last(unused) TD behind.
210 */
211 ehci_batch->base.transferred_size -=
212 td_remain_size(&ehci_batch->tds[i]);
213 } else {
214 usb_log_debug("Batch %p found error TD(%zu):%08x: %s.",
215 ehci_batch, i,
216 ehci_batch->tds[i].status,
217 str_error_name(ehci_batch->base.error));
218 /* Clear possible ED HALT */
219 qh_clear_halt(ehci_batch->qh);
220 break;
221 }
222 }
223
224 assert(ehci_batch->base.transferred_size <= ehci_batch->base.size);
225
226 /* Clear TD pointers */
227 ehci_batch->qh->next = LINK_POINTER_TERM;
228 ehci_batch->qh->current = LINK_POINTER_TERM;
229 usb_log_debug("Batch %p complete: %s", ehci_batch,
230 str_error(ehci_batch->base.error));
231
232 return true;
233}
234
235/** Starts execution of the TD list
236 *
237 * @param[in] ehci_batch Batch structure to use
238 */
239void ehci_transfer_batch_commit(const ehci_transfer_batch_t *ehci_batch)
240{
241 assert(ehci_batch);
242 qh_set_next_td(ehci_batch->qh,
243 dma_buffer_phys(&ehci_batch->ehci_dma_buffer, &ehci_batch->tds[0]));
244}
245
246/** Prepare generic control transfer
247 *
248 * @param[in] ehci_batch Batch structure to use.
249 *
250 * Setup stage with toggle 0 and direction BOTH(SETUP_PID)
251 * Data stage with alternating toggle and direction
252 * Status stage with toggle 1 and direction
253 */
254static void batch_control(ehci_transfer_batch_t *ehci_batch)
255{
256 assert(ehci_batch);
257
258 usb_direction_t dir = ehci_batch->base.dir;
259 assert(dir == USB_DIRECTION_IN || dir == USB_DIRECTION_OUT);
260
261 usb_log_debug2("Batch %p: Control QH(%p): "
262 "%08x:%08x:%08x:%08x:%08x:%08x", ehci_batch,
263 ehci_batch->qh,
264 ehci_batch->qh->ep_char, ehci_batch->qh->ep_cap,
265 ehci_batch->qh->status, ehci_batch->qh->current,
266 ehci_batch->qh->next, ehci_batch->qh->alternate);
267 static const usb_direction_t reverse_dir[] = {
268 [USB_DIRECTION_IN] = USB_DIRECTION_OUT,
269 [USB_DIRECTION_OUT] = USB_DIRECTION_IN,
270 };
271
272 int toggle = 0;
273 const usb_direction_t data_dir = dir;
274 const usb_direction_t status_dir = reverse_dir[dir];
275
276 /* Setup stage */
277 td_init(&ehci_batch->tds[0],
278 dma_buffer_phys(&ehci_batch->ehci_dma_buffer, &ehci_batch->tds[1]),
279 dma_buffer_phys(&ehci_batch->ehci_dma_buffer, ehci_batch->setup_buffer),
280 USB_DIRECTION_BOTH, USB_SETUP_PACKET_SIZE, toggle, false);
281 usb_log_debug2("Batch %p: Created CONTROL SETUP TD(%" PRIxn "): "
282 "%08x:%08x:%08x", ehci_batch,
283 dma_buffer_phys(&ehci_batch->ehci_dma_buffer, &ehci_batch->tds[0]),
284 ehci_batch->tds[0].status, ehci_batch->tds[0].next,
285 ehci_batch->tds[0].alternate);
286
287 /* Data stage */
288 unsigned td_current = 1;
289 size_t remain_size = ehci_batch->base.size;
290 uintptr_t buffer = dma_buffer_phys(&ehci_batch->base.dma_buffer,
291 ehci_batch->data_buffer);
292 while (remain_size > 0) {
293 const size_t transfer_size = min(remain_size, EHCI_TD_MAX_TRANSFER);
294 toggle = 1 - toggle;
295
296 td_init(&ehci_batch->tds[td_current],
297 dma_buffer_phys(&ehci_batch->ehci_dma_buffer, &ehci_batch->tds[td_current + 1]),
298 buffer, data_dir, transfer_size, toggle, false);
299 usb_log_debug2("Batch %p: Created CONTROL DATA TD(%" PRIxn "): "
300 "%08x:%08x:%08x", ehci_batch,
301 dma_buffer_phys(&ehci_batch->ehci_dma_buffer, &ehci_batch->tds[td_current]),
302 ehci_batch->tds[td_current].status,
303 ehci_batch->tds[td_current].next,
304 ehci_batch->tds[td_current].alternate);
305
306 buffer += transfer_size;
307 remain_size -= transfer_size;
308 assert(td_current < ehci_batch->td_count - 1);
309 ++td_current;
310 }
311
312 /* Status stage */
313 assert(td_current == ehci_batch->td_count - 1);
314 td_init(&ehci_batch->tds[td_current], 0, 0, status_dir, 0, 1, true);
315 usb_log_debug2("Batch %p: Created CONTROL STATUS TD %d(%" PRIxn "): "
316 "%08x:%08x:%08x", ehci_batch, td_current,
317 dma_buffer_phys(&ehci_batch->ehci_dma_buffer, &ehci_batch->tds[td_current]),
318 ehci_batch->tds[td_current].status,
319 ehci_batch->tds[td_current].next,
320 ehci_batch->tds[td_current].alternate);
321}
322
323/** Prepare generic data transfer
324 *
325 * @param[in] ehci_batch Batch structure to use.
326 * @paramp[in] dir Communication direction.
327 *
328 * Direction is supplied by the associated ep and toggle is maintained by the
329 * EHCI hw in ED.
330 */
331static void batch_data(ehci_transfer_batch_t *ehci_batch)
332{
333 assert(ehci_batch);
334
335 usb_log_debug2("Batch %p: Data QH(%p): "
336 "%08x:%08x:%08x:%08x:%08x:%08x", ehci_batch,
337 ehci_batch->qh,
338 ehci_batch->qh->ep_char, ehci_batch->qh->ep_cap,
339 ehci_batch->qh->status, ehci_batch->qh->current,
340 ehci_batch->qh->next, ehci_batch->qh->alternate);
341
342 size_t td_current = 0;
343 size_t remain_size = ehci_batch->base.size;
344 uintptr_t buffer = dma_buffer_phys(&ehci_batch->base.dma_buffer,
345 ehci_batch->data_buffer);
346 while (remain_size > 0) {
347 const size_t transfer_size = remain_size > EHCI_TD_MAX_TRANSFER ?
348 EHCI_TD_MAX_TRANSFER : remain_size;
349
350 const bool last = (remain_size == transfer_size);
351 td_init(&ehci_batch->tds[td_current],
352 last ? 0 : dma_buffer_phys(&ehci_batch->ehci_dma_buffer,
353 &ehci_batch->tds[td_current + 1]),
354 buffer, ehci_batch->base.dir, transfer_size, -1, last);
355
356 usb_log_debug2("Batch %p: DATA TD(%" PRIxn ": %08x:%08x:%08x",
357 ehci_batch,
358 dma_buffer_phys(&ehci_batch->ehci_dma_buffer,
359 &ehci_batch->tds[td_current]),
360 ehci_batch->tds[td_current].status,
361 ehci_batch->tds[td_current].next,
362 ehci_batch->tds[td_current].alternate);
363
364 buffer += transfer_size;
365 remain_size -= transfer_size;
366 assert(td_current < ehci_batch->td_count);
367 ++td_current;
368 }
369}
370
371/** Transfer setup table. */
372static void (*const batch_setup[])(ehci_transfer_batch_t *) =
373 {
374 [USB_TRANSFER_CONTROL] = batch_control,
375 [USB_TRANSFER_BULK] = batch_data,
376 [USB_TRANSFER_INTERRUPT] = batch_data,
377 [USB_TRANSFER_ISOCHRONOUS] = NULL,
378};
379/**
380 * @}
381 */
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