source: mainline/uspace/drv/block/ata_bd/ata_bd.h@ b9be9b0

ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since b9be9b0 was c8ea6eca, checked in by Jakub Jermar <jakub@…>, 7 years ago

Improve doxygen documentation

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[4f5caea]1/*
2 * Copyright (c) 2009 Jiri Svoboda
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[c8ea6eca]29/** @addtogroup ata_bd
[4f5caea]30 * @{
31 */
[d770deb]32/** @file ATA driver definitions.
[4f5caea]33 */
34
35#ifndef __ATA_BD_H__
36#define __ATA_BD_H__
37
[66cb7a2]38#include <async.h>
[4802dd7]39#include <bd_srv.h>
[66cb7a2]40#include <ddf/driver.h>
[1e4cada]41#include <fibril_synch.h>
[19f857a]42#include <str.h>
[8d2dd7f2]43#include <stdint.h>
44#include <stddef.h>
[66cb7a2]45#include "ata_hw.h"
46
47#define NAME "ata_bd"
[4f5caea]48
[e092dc5]49/** Base addresses for ATA I/O blocks. */
50typedef struct {
51 uintptr_t cmd; /**< Command block base address. */
52 uintptr_t ctl; /**< Control block base address. */
53} ata_base_t;
54
[31de325]55/** Timeout definitions. Unit is 10 ms. */
56enum ata_timeout {
57 TIMEOUT_PROBE = 100, /* 1 s */
58 TIMEOUT_BSY = 100, /* 1 s */
59 TIMEOUT_DRDY = 1000 /* 10 s */
60};
61
[7a56e33e]62enum ata_dev_type {
63 ata_reg_dev, /* Register device (no packet feature set support) */
64 ata_pkt_dev /* Packet device (supports packet feature set). */
65};
66
67/** Register device block addressing mode. */
68enum rd_addr_mode {
[a1f48f6]69 am_chs, /**< CHS block addressing */
70 am_lba28, /**< LBA-28 block addressing */
71 am_lba48 /**< LBA-48 block addressing */
[a99cf073]72};
73
[5048be7]74/** Block coordinates */
75typedef struct {
[7a56e33e]76 enum rd_addr_mode amode;
[5048be7]77
78 union {
79 /** CHS coordinates */
80 struct {
81 uint8_t sector;
82 uint8_t cyl_lo;
83 uint8_t cyl_hi;
84 };
85 /** LBA coordinates */
86 struct {
87 uint8_t c0;
88 uint8_t c1;
89 uint8_t c2;
90 uint8_t c3;
91 uint8_t c4;
92 uint8_t c5;
93 };
94 };
95
96 /** Lower 4 bits for device/head register */
97 uint8_t h;
98} block_coord_t;
99
[e092dc5]100/** ATA device state structure. */
[4f5caea]101typedef struct {
102 bool present;
[96cbd18]103 struct ata_ctrl *ctrl;
[66cb7a2]104 struct ata_fun *afun;
[7a56e33e]105
106 /** Device type */
107 enum ata_dev_type dev_type;
108
109 /** Addressing mode to use (if register device) */
110 enum rd_addr_mode amode;
[a99cf073]111
112 /*
113 * Geometry. Only valid if operating in CHS mode.
114 */
115 struct {
116 unsigned heads;
117 unsigned cylinders;
118 unsigned sectors;
119 } geom;
120
[4f5caea]121 uint64_t blocks;
[0d247f5]122 size_t block_size;
[12956e57]123
[0e6dce8]124 char model[STR_BOUNDS(40) + 1];
125
[4802dd7]126 int disk_id;
[4f5caea]127} disk_t;
128
[96cbd18]129/** ATA controller */
130typedef struct ata_ctrl {
[66cb7a2]131 /** DDF device */
132 ddf_dev_t *dev;
[96cbd18]133 /** I/O base address of the command registers */
134 uintptr_t cmd_physical;
135 /** I/O base address of the control registers */
136 uintptr_t ctl_physical;
137
138 /** Command registers */
139 ata_cmd_t *cmd;
140 /** Control registers */
141 ata_ctl_t *ctl;
142
143 /** Per-disk state. */
144 disk_t disk[MAX_DISKS];
[66cb7a2]145
146 fibril_mutex_t lock;
[96cbd18]147} ata_ctrl_t;
148
[66cb7a2]149typedef struct ata_fun {
150 ddf_fun_t *fun;
151 disk_t *disk;
152 bd_srvs_t bds;
153} ata_fun_t;
154
[b7fd2a0]155extern errno_t ata_ctrl_init(ata_ctrl_t *, ata_base_t *);
156extern errno_t ata_ctrl_remove(ata_ctrl_t *);
157extern errno_t ata_ctrl_gone(ata_ctrl_t *);
[66cb7a2]158
159extern bd_ops_t ata_bd_ops;
160
[4f5caea]161#endif
162
163/** @}
164 */
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