source: mainline/kernel/kernel.config@ af863d0

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since af863d0 was af863d0, checked in by Martin Decky <martin@…>, 17 years ago

move unfinished ObjC support to a separate branch

  • Property mode set to 100644
File size: 6.5 KB
RevLine 
[44882c8]1#
2# Copyright (c) 2006 Ondrej Palkovsky
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
[34722ee]29## General configuration directives
30
[9371c30]31# Architecture
[36e7b6c3]32@ "amd64" AMD64/Intel EM64T
[d630139]33@ "arm32" ARM 32-bit
[fd8af4b]34@ "ia32" Intel IA-32
[57ce359]35@ "ia32xen" Intel IA-32 on Xen hypervisor
[36e7b6c3]36@ "ia64" Intel IA-64
[9371c30]37@ "mips32" MIPS 32-bit
38@ "ppc32" PowerPC 32-bit
[602c9101]39@ "ppc64" PowerPC 64-bit
[41f7564]40@ "sparc64" Sun UltraSPARC 64-bit
[9371c30]41! ARCH (choice)
42
[7bb0c32]43# Compiler
44@ "gcc_cross" GCC Cross-compiler
45@ "gcc_native" GCC Native
46@ "icc_native" ICC Native
[1e847fb]47@ "suncc_native" Sun Studio C Compiler
[7bb0c32]48! [ARCH=amd64|ARCH=ia32|ARCH=ia32xen] COMPILER (choice)
49
50# Compiler
51@ "gcc_cross" GCC Cross-compiler
52@ "gcc_native" GCC Native
53@ "icc_native" ICC Native
54! [ARCH=ia64] COMPILER (choice)
55
56# Compiler
57@ "gcc_cross" GCC Cross-compiler
58@ "gcc_native" GCC Native
[1e847fb]59@ "suncc_native" Sun Studio C Compiler
[7bb0c32]60! [ARCH=sparc64] COMPILER (choice)
61
62# Compiler
63@ "gcc_cross" GCC Cross-compiler
64@ "gcc_native" GCC Native
65! [ARCH=arm32|ARCH=mips32|ARCH=ppc32|ARCH=ppc64] COMPILER (choice)
[9371c30]66
67# CPU type
68@ "pentium4" Pentium 4
69@ "pentium3" Pentium 3
[6c4ff8a]70@ "core" Core Solo/Duo
[9371c30]71@ "athlon-xp" Athlon XP
72@ "athlon-mp" Athlon MP
[57ce359]73! [ARCH=ia32|ARCH=ia32xen] MACHINE (choice)
[41f7564]74
75# CPU type
76@ "opteron" Opteron
77! [ARCH=amd64] MACHINE (choice)
[9371c30]78
[41f7564]79# Machine type
[9371c30]80@ "msim" MSIM Simulator
81@ "simics" Virtutech Simics simulator
82@ "lgxemul" GXEmul Little Endian
83@ "bgxemul" GXEmul Big Endian
[41f7564]84! [ARCH=mips32] MACHINE (choice)
[9371c30]85
[bbf5657]86# Framebuffer support
[1f0d2ee9]87! [(ARCH=mips32&MACHINE=lgxemul)|(ARCH=mips32&MACHINE=bgxemul)|(ARCH=ia32)|(ARCH=amd64)|(ARCH=arm32)] CONFIG_FB (y/n)
[22cf454d]88
89# Framebuffer width
[b2a0f6dd]90@ "640"
91@ "800"
92@ "1024"
93@ "1152"
94@ "1280"
95@ "1400"
96@ "1440"
97@ "1600"
98@ "2048"
[aecf79f]99! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_WIDTH (choice)
[22cf454d]100
101# Framebuffer height
[b2a0f6dd]102@ "480"
103@ "600"
104@ "768"
105@ "852"
106@ "900"
107@ "960"
108@ "1024"
109@ "1050"
110@ "1200"
111@ "1536"
[aecf79f]112! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_HEIGHT (choice)
[22cf454d]113
114# Framebuffer depth
[b2a0f6dd]115@ "8"
116@ "16"
117@ "24"
[aecf79f]118! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_BPP (choice)
[22cf454d]119
[944b15c]120# Support for SMP
[57ce359]121! [ARCH=ia32|ARCH=amd64|ARCH=ia32xen|ARCH=sparc64] CONFIG_SMP (y/n)
[944b15c]122
123# Improved support for hyperthreading
[57ce359]124! [(ARCH=ia32|ARCH=amd64|ARCH=ia32xen)&CONFIG_SMP=y] CONFIG_HT (y/n)
[944b15c]125
[04225a7]126# Simics BIOS AP boot fix
[a0c12f5]127! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n)
[04225a7]128
[944b15c]129# Lazy FPU context switching
[57ce359]130! [(ARCH=mips32&MACHINE!=msim&MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64|ARCH=sparc64|ARCH=ia32xen] CONFIG_FPU_LAZY (y/n)
[944b15c]131
[eb353b3]132# Use VHPT
133! [ARCH=ia64] CONFIG_VHPT (n/y)
134
135# Use TSB
136! [ARCH=sparc64] CONFIG_TSB (y/n)
137
138# Support for Z8530 serial port
139! [ARCH=sparc64] CONFIG_Z8530 (y/n)
140
141# Support for NS16550 serial port
142! [ARCH=sparc64] CONFIG_NS16550 (y/n)
143
[92778f2]144# Virtually indexed D-cache support
145! [ARCH=sparc64] CONFIG_VIRT_IDX_DCACHE (y/n)
[eb353b3]146
147
[34722ee]148## Debugging configuration directives
149
150# General debuging and assert checking
151! CONFIG_DEBUG (y/n)
152
[1f0d2ee9]153# Extensive debugging output
154! [CONFIG_DEBUG=y] CONFIG_EDEBUG (n/y)
155
[34722ee]156# Deadlock detection support for spinlocks
[b4cad8b2]157! [CONFIG_DEBUG=y&CONFIG_SMP=y] CONFIG_DEBUG_SPINLOCK (y/n)
[34722ee]158
[4e49572]159# Watchpoint on rewriting AS with zero
[57ce359]160! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=ia32|ARCH=ia32xen)] CONFIG_DEBUG_AS_WATCHPOINT (y/n)
[4e49572]161
[8d25b44]162# Save all interrupt registers
[57ce359]163! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=mips32|ARCH=ia32|ARCH=ia32xen)] CONFIG_DEBUG_ALLREGS (y/n)
[8d25b44]164
[28ecadb]165
[34722ee]166## Run-time configuration directives
167
[319e60e]168# Compile kernel tests
169! CONFIG_TEST (y/n)
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