1 | #
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2 | # Copyright (c) 2006 Ondrej Palkovsky
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3 | # All rights reserved.
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4 | #
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5 | # Redistribution and use in source and binary forms, with or without
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6 | # modification, are permitted provided that the following conditions
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7 | # are met:
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8 | #
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9 | # - Redistributions of source code must retain the above copyright
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10 | # notice, this list of conditions and the following disclaimer.
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11 | # - Redistributions in binary form must reproduce the above copyright
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12 | # notice, this list of conditions and the following disclaimer in the
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13 | # documentation and/or other materials provided with the distribution.
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14 | # - The name of the author may not be used to endorse or promote products
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15 | # derived from this software without specific prior written permission.
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16 | #
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17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | #
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28 |
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29 | ## General configuration directives
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30 |
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31 | # Architecture
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32 | @ "amd64" AMD64/Intel EM64T
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33 | @ "arm32" ARM 32-bit
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34 | @ "ia32" Intel IA-32
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35 | @ "ia32xen" Intel IA-32 on Xen hypervisor
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36 | @ "ia64" Intel IA-64
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37 | @ "mips32" MIPS 32-bit
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38 | @ "ppc32" PowerPC 32-bit
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39 | @ "ppc64" PowerPC 64-bit
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40 | @ "sparc64" Sun UltraSPARC 64-bit
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41 | ! ARCH (choice)
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42 |
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43 | # Compiler
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44 | @ "gcc_cross" GCC Cross-compiler
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45 | @ "gcc_native" GCC Native
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46 | @ "icc_native" ICC Native
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47 | @ "suncc_native" Sun Studio C Compiler
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48 | ! [ARCH=amd64|ARCH=ia32|ARCH=ia32xen] COMPILER (choice)
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49 |
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50 | # Compiler
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51 | @ "gcc_cross" GCC Cross-compiler
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52 | @ "gcc_native" GCC Native
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53 | @ "icc_native" ICC Native
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54 | ! [ARCH=ia64] COMPILER (choice)
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55 |
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56 | # Compiler
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57 | @ "gcc_cross" GCC Cross-compiler
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58 | @ "gcc_native" GCC Native
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59 | @ "suncc_native" Sun Studio C Compiler
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60 | ! [ARCH=sparc64] COMPILER (choice)
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61 |
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62 | # Compiler
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63 | @ "gcc_cross" GCC Cross-compiler
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64 | @ "gcc_native" GCC Native
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65 | ! [ARCH=arm32|ARCH=mips32|ARCH=ppc32|ARCH=ppc64] COMPILER (choice)
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66 |
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67 | # CPU type
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68 | @ "pentium4" Pentium 4
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69 | @ "pentium3" Pentium 3
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70 | @ "core" Core Solo/Duo
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71 | @ "athlon-xp" Athlon XP
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72 | @ "athlon-mp" Athlon MP
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73 | ! [ARCH=ia32|ARCH=ia32xen] MACHINE (choice)
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74 |
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75 | # CPU type
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76 | @ "opteron" Opteron
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77 | ! [ARCH=amd64] MACHINE (choice)
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78 |
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79 | # Machine type
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80 | @ "msim" MSIM Simulator
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81 | @ "simics" Virtutech Simics simulator
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82 | @ "lgxemul" GXEmul Little Endian
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83 | @ "bgxemul" GXEmul Big Endian
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84 | ! [ARCH=mips32] MACHINE (choice)
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85 |
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86 | # Framebuffer support
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87 | ! [(ARCH=mips32&MACHINE=lgxemul)|(ARCH=mips32&MACHINE=bgxemul)|(ARCH=ia32)|(ARCH=amd64)|(ARCH=arm32)] CONFIG_FB (y/n)
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88 |
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89 | # Framebuffer width
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90 | @ "640"
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91 | @ "800"
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92 | @ "1024"
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93 | @ "1152"
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94 | @ "1280"
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95 | @ "1400"
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96 | @ "1440"
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97 | @ "1600"
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98 | @ "2048"
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99 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_WIDTH (choice)
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100 |
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101 | # Framebuffer height
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102 | @ "480"
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103 | @ "600"
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104 | @ "768"
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105 | @ "852"
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106 | @ "900"
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107 | @ "960"
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108 | @ "1024"
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109 | @ "1050"
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110 | @ "1200"
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111 | @ "1536"
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112 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_HEIGHT (choice)
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113 |
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114 | # Framebuffer depth
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115 | @ "8"
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116 | @ "16"
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117 | @ "24"
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118 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_BPP (choice)
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119 |
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120 | # Support for SMP
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121 | ! [ARCH=ia32|ARCH=amd64|ARCH=ia32xen|ARCH=sparc64] CONFIG_SMP (y/n)
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122 |
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123 | # Improved support for hyperthreading
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124 | ! [(ARCH=ia32|ARCH=amd64|ARCH=ia32xen)&CONFIG_SMP=y] CONFIG_HT (y/n)
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125 |
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126 | # Simics BIOS AP boot fix
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127 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n)
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128 |
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129 | # Lazy FPU context switching
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130 | ! [(ARCH=mips32&MACHINE!=msim&MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64|ARCH=sparc64|ARCH=ia32xen] CONFIG_FPU_LAZY (y/n)
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131 |
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132 | # Use VHPT
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133 | ! [ARCH=ia64] CONFIG_VHPT (n/y)
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134 |
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135 | # Use TSB
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136 | ! [ARCH=sparc64] CONFIG_TSB (y/n)
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137 |
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138 | # Support for Z8530 serial port
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139 | ! [ARCH=sparc64] CONFIG_Z8530 (y/n)
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140 |
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141 | # Support for NS16550 serial port
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142 | ! [ARCH=sparc64] CONFIG_NS16550 (y/n)
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143 |
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144 | # Virtually indexed D-cache support
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145 | ! [ARCH=sparc64] CONFIG_VIRT_IDX_DCACHE (y/n)
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146 |
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147 |
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148 | ## Debugging configuration directives
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149 |
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150 | # General debuging and assert checking
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151 | ! CONFIG_DEBUG (y/n)
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152 |
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153 | # Extensive debugging output
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154 | ! [CONFIG_DEBUG=y] CONFIG_EDEBUG (n/y)
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155 |
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156 | # Deadlock detection support for spinlocks
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157 | ! [CONFIG_DEBUG=y&CONFIG_SMP=y] CONFIG_DEBUG_SPINLOCK (y/n)
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158 |
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159 | # Watchpoint on rewriting AS with zero
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160 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=ia32|ARCH=ia32xen)] CONFIG_DEBUG_AS_WATCHPOINT (y/n)
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161 |
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162 | # Save all interrupt registers
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163 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=mips32|ARCH=ia32|ARCH=ia32xen)] CONFIG_DEBUG_ALLREGS (y/n)
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164 |
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165 |
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166 | ## Run-time configuration directives
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167 |
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168 | # Compile kernel tests
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169 | ! CONFIG_TEST (y/n)
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