source: mainline/kernel/generic/src/ipc/irq.c@ 8873c01d

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Last change on this file since 8873c01d was 17b3cc6, checked in by Martin Decky <martin@…>, 14 years ago

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1/*
2 * Copyright (c) 2006 Ondrej Palkovsky
3 * Copyright (c) 2006 Jakub Jermar
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30/** @addtogroup genericipc
31 * @{
32 */
33
34/**
35 * @file
36 * @brief IRQ notification framework.
37 *
38 * This framework allows applications to register to receive a notification
39 * when interrupt is detected. The application may provide a simple 'top-half'
40 * handler as part of its registration, which can perform simple operations
41 * (read/write port/memory, add information to notification ipc message).
42 *
43 * The structure of a notification message is as follows:
44 * - IMETHOD: interface and method as registered by
45 * the SYS_IRQ_REGISTER syscall
46 * - ARG1: payload modified by a 'top-half' handler
47 * - ARG2: payload modified by a 'top-half' handler
48 * - ARG3: payload modified by a 'top-half' handler
49 * - ARG4: payload modified by a 'top-half' handler
50 * - ARG5: payload modified by a 'top-half' handler
51 * - in_phone_hash: interrupt counter (may be needed to assure correct order
52 * in multithreaded drivers)
53 *
54 * Note on synchronization for ipc_irq_register(), ipc_irq_unregister(),
55 * ipc_irq_cleanup() and IRQ handlers:
56 *
57 * By always taking all of the uspace IRQ hash table lock, IRQ structure lock
58 * and answerbox lock, we can rule out race conditions between the
59 * registration functions and also the cleanup function. Thus the observer can
60 * either see the IRQ structure present in both the hash table and the
61 * answerbox list or absent in both. Views in which the IRQ structure would be
62 * linked in the hash table but not in the answerbox list, or vice versa, are
63 * not possible.
64 *
65 * By always taking the hash table lock and the IRQ structure lock, we can
66 * rule out a scenario in which we would free up an IRQ structure, which is
67 * still referenced by, for example, an IRQ handler. The locking scheme forces
68 * us to lock the IRQ structure only after any progressing IRQs on that
69 * structure are finished. Because we hold the hash table lock, we prevent new
70 * IRQs from taking new references to the IRQ structure.
71 *
72 */
73
74#include <arch.h>
75#include <mm/slab.h>
76#include <errno.h>
77#include <ddi/irq.h>
78#include <ipc/ipc.h>
79#include <ipc/irq.h>
80#include <syscall/copy.h>
81#include <console/console.h>
82#include <print.h>
83
84/** Free the top-half pseudocode.
85 *
86 * @param code Pointer to the top-half pseudocode.
87 *
88 */
89static void code_free(irq_code_t *code)
90{
91 if (code) {
92 free(code->cmds);
93 free(code);
94 }
95}
96
97/** Copy the top-half pseudocode from userspace into the kernel.
98 *
99 * @param ucode Userspace address of the top-half pseudocode.
100 *
101 * @return Kernel address of the copied pseudocode.
102 *
103 */
104static irq_code_t *code_from_uspace(irq_code_t *ucode)
105{
106 irq_code_t *code = malloc(sizeof(*code), 0);
107 int rc = copy_from_uspace(code, ucode, sizeof(*code));
108 if (rc != 0) {
109 free(code);
110 return NULL;
111 }
112
113 if (code->cmdcount > IRQ_MAX_PROG_SIZE) {
114 free(code);
115 return NULL;
116 }
117
118 irq_cmd_t *ucmds = code->cmds;
119 code->cmds = malloc(sizeof(code->cmds[0]) * code->cmdcount, 0);
120 rc = copy_from_uspace(code->cmds, ucmds,
121 sizeof(code->cmds[0]) * code->cmdcount);
122 if (rc != 0) {
123 free(code->cmds);
124 free(code);
125 return NULL;
126 }
127
128 return code;
129}
130
131/** Register an answerbox as a receiving end for IRQ notifications.
132 *
133 * @param box Receiving answerbox.
134 * @param inr IRQ number.
135 * @param devno Device number.
136 * @param imethod Interface and method to be associated with the
137 * notification.
138 * @param ucode Uspace pointer to top-half pseudocode.
139 * @return EOK on success or a negative error code.
140 *
141 */
142int ipc_irq_register(answerbox_t *box, inr_t inr, devno_t devno,
143 sysarg_t imethod, irq_code_t *ucode)
144{
145 sysarg_t key[] = {
146 (sysarg_t) inr,
147 (sysarg_t) devno
148 };
149
150 if ((inr < 0) || (inr > last_inr))
151 return ELIMIT;
152
153 irq_code_t *code;
154 if (ucode) {
155 code = code_from_uspace(ucode);
156 if (!code)
157 return EBADMEM;
158 } else
159 code = NULL;
160
161 /*
162 * Allocate and populate the IRQ structure.
163 */
164 irq_t *irq = malloc(sizeof(irq_t), 0);
165
166 irq_initialize(irq);
167 irq->devno = devno;
168 irq->inr = inr;
169 irq->claim = ipc_irq_top_half_claim;
170 irq->handler = ipc_irq_top_half_handler;
171 irq->notif_cfg.notify = true;
172 irq->notif_cfg.answerbox = box;
173 irq->notif_cfg.imethod = imethod;
174 irq->notif_cfg.code = code;
175 irq->notif_cfg.counter = 0;
176 irq->driver_as = AS;
177
178 /*
179 * Enlist the IRQ structure in the uspace IRQ hash table and the
180 * answerbox's list.
181 */
182 irq_spinlock_lock(&irq_uspace_hash_table_lock, true);
183
184 link_t *hlp = hash_table_find(&irq_uspace_hash_table, key);
185 if (hlp) {
186 irq_t *hirq = hash_table_get_instance(hlp, irq_t, link);
187
188 /* hirq is locked */
189 irq_spinlock_unlock(&hirq->lock, false);
190 code_free(code);
191 irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
192
193 free(irq);
194 return EEXISTS;
195 }
196
197 /* Locking is not really necessary, but paranoid */
198 irq_spinlock_lock(&irq->lock, false);
199 irq_spinlock_lock(&box->irq_lock, false);
200
201 hash_table_insert(&irq_uspace_hash_table, key, &irq->link);
202 list_append(&irq->notif_cfg.link, &box->irq_list);
203
204 irq_spinlock_unlock(&box->irq_lock, false);
205 irq_spinlock_unlock(&irq->lock, false);
206 irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
207
208 return EOK;
209}
210
211/** Unregister task from IRQ notification.
212 *
213 * @param box Answerbox associated with the notification.
214 * @param inr IRQ number.
215 * @param devno Device number.
216 * @return EOK on success or a negative error code.
217 */
218int ipc_irq_unregister(answerbox_t *box, inr_t inr, devno_t devno)
219{
220 sysarg_t key[] = {
221 (sysarg_t) inr,
222 (sysarg_t) devno
223 };
224
225 if ((inr < 0) || (inr > last_inr))
226 return ELIMIT;
227
228 irq_spinlock_lock(&irq_uspace_hash_table_lock, true);
229 link_t *lnk = hash_table_find(&irq_uspace_hash_table, key);
230 if (!lnk) {
231 irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
232 return ENOENT;
233 }
234
235 irq_t *irq = hash_table_get_instance(lnk, irq_t, link);
236
237 /* irq is locked */
238 irq_spinlock_lock(&box->irq_lock, false);
239
240 ASSERT(irq->notif_cfg.answerbox == box);
241
242 /* Free up the pseudo code and associated structures. */
243 code_free(irq->notif_cfg.code);
244
245 /* Remove the IRQ from the answerbox's list. */
246 list_remove(&irq->notif_cfg.link);
247
248 /*
249 * We need to drop the IRQ lock now because hash_table_remove() will try
250 * to reacquire it. That basically violates the natural locking order,
251 * but a deadlock in hash_table_remove() is prevented by the fact that
252 * we already held the IRQ lock and didn't drop the hash table lock in
253 * the meantime.
254 */
255 irq_spinlock_unlock(&irq->lock, false);
256
257 /* Remove the IRQ from the uspace IRQ hash table. */
258 hash_table_remove(&irq_uspace_hash_table, key, 2);
259
260 irq_spinlock_unlock(&box->irq_lock, false);
261 irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
262
263 /* Free up the IRQ structure. */
264 free(irq);
265
266 return EOK;
267}
268
269/** Disconnect all IRQ notifications from an answerbox.
270 *
271 * This function is effective because the answerbox contains
272 * list of all irq_t structures that are registered to
273 * send notifications to it.
274 *
275 * @param box Answerbox for which we want to carry out the cleanup.
276 *
277 */
278void ipc_irq_cleanup(answerbox_t *box)
279{
280loop:
281 irq_spinlock_lock(&irq_uspace_hash_table_lock, true);
282 irq_spinlock_lock(&box->irq_lock, false);
283
284 while (!list_empty(&box->irq_list)) {
285 DEADLOCK_PROBE_INIT(p_irqlock);
286
287 irq_t *irq = list_get_instance(list_first(&box->irq_list), irq_t,
288 notif_cfg.link);
289
290 if (!irq_spinlock_trylock(&irq->lock)) {
291 /*
292 * Avoid deadlock by trying again.
293 */
294 irq_spinlock_unlock(&box->irq_lock, false);
295 irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
296 DEADLOCK_PROBE(p_irqlock, DEADLOCK_THRESHOLD);
297 goto loop;
298 }
299
300 sysarg_t key[2];
301 key[0] = irq->inr;
302 key[1] = irq->devno;
303
304 ASSERT(irq->notif_cfg.answerbox == box);
305
306 /* Unlist from the answerbox. */
307 list_remove(&irq->notif_cfg.link);
308
309 /* Free up the pseudo code and associated structures. */
310 code_free(irq->notif_cfg.code);
311
312 /*
313 * We need to drop the IRQ lock now because hash_table_remove()
314 * will try to reacquire it. That basically violates the natural
315 * locking order, but a deadlock in hash_table_remove() is
316 * prevented by the fact that we already held the IRQ lock and
317 * didn't drop the hash table lock in the meantime.
318 */
319 irq_spinlock_unlock(&irq->lock, false);
320
321 /* Remove from the hash table. */
322 hash_table_remove(&irq_uspace_hash_table, key, 2);
323
324 free(irq);
325 }
326
327 irq_spinlock_unlock(&box->irq_lock, false);
328 irq_spinlock_unlock(&irq_uspace_hash_table_lock, true);
329}
330
331/** Add a call to the proper answerbox queue.
332 *
333 * Assume irq->lock is locked and interrupts disabled.
334 *
335 * @param irq IRQ structure referencing the target answerbox.
336 * @param call IRQ notification call.
337 *
338 */
339static void send_call(irq_t *irq, call_t *call)
340{
341 irq_spinlock_lock(&irq->notif_cfg.answerbox->irq_lock, false);
342 list_append(&call->link, &irq->notif_cfg.answerbox->irq_notifs);
343 irq_spinlock_unlock(&irq->notif_cfg.answerbox->irq_lock, false);
344
345 waitq_wakeup(&irq->notif_cfg.answerbox->wq, WAKEUP_FIRST);
346}
347
348/** Apply the top-half pseudo code to find out whether to accept the IRQ or not.
349 *
350 * @param irq IRQ structure.
351 *
352 * @return IRQ_ACCEPT if the interrupt is accepted by the
353 * pseudocode, IRQ_DECLINE otherwise.
354 *
355 */
356irq_ownership_t ipc_irq_top_half_claim(irq_t *irq)
357{
358 irq_code_t *code = irq->notif_cfg.code;
359 uint32_t *scratch = irq->notif_cfg.scratch;
360
361 if (!irq->notif_cfg.notify)
362 return IRQ_DECLINE;
363
364 if (!code)
365 return IRQ_DECLINE;
366
367 as_t *current_as = AS;
368 if (current_as != irq->driver_as)
369 as_switch(AS, irq->driver_as);
370
371 for (size_t i = 0; i < code->cmdcount; i++) {
372 uint32_t dstval;
373 void *va;
374 uint8_t val8;
375 uint16_t val16;
376 uint32_t val32;
377
378 uintptr_t srcarg = code->cmds[i].srcarg;
379 uintptr_t dstarg = code->cmds[i].dstarg;
380
381 if (srcarg >= IPC_CALL_LEN)
382 break;
383
384 if (dstarg >= IPC_CALL_LEN)
385 break;
386
387 switch (code->cmds[i].cmd) {
388 case CMD_PIO_READ_8:
389 dstval = pio_read_8((ioport8_t *) code->cmds[i].addr);
390 if (dstarg)
391 scratch[dstarg] = dstval;
392 break;
393 case CMD_PIO_READ_16:
394 dstval = pio_read_16((ioport16_t *) code->cmds[i].addr);
395 if (dstarg)
396 scratch[dstarg] = dstval;
397 break;
398 case CMD_PIO_READ_32:
399 dstval = pio_read_32((ioport32_t *) code->cmds[i].addr);
400 if (dstarg)
401 scratch[dstarg] = dstval;
402 break;
403 case CMD_PIO_WRITE_8:
404 pio_write_8((ioport8_t *) code->cmds[i].addr,
405 (uint8_t) code->cmds[i].value);
406 break;
407 case CMD_PIO_WRITE_16:
408 pio_write_16((ioport16_t *) code->cmds[i].addr,
409 (uint16_t) code->cmds[i].value);
410 break;
411 case CMD_PIO_WRITE_32:
412 pio_write_32((ioport32_t *) code->cmds[i].addr,
413 (uint32_t) code->cmds[i].value);
414 break;
415 case CMD_PIO_WRITE_A_8:
416 if (srcarg) {
417 pio_write_8((ioport8_t *) code->cmds[i].addr,
418 (uint8_t) scratch[srcarg]);
419 }
420 break;
421 case CMD_PIO_WRITE_A_16:
422 if (srcarg) {
423 pio_write_16((ioport16_t *) code->cmds[i].addr,
424 (uint16_t) scratch[srcarg]);
425 }
426 break;
427 case CMD_PIO_WRITE_A_32:
428 if (srcarg) {
429 pio_write_32((ioport32_t *) code->cmds[i].addr,
430 (uint32_t) scratch[srcarg]);
431 }
432 break;
433 case CMD_MEM_READ_8:
434 va = code->cmds[i].addr;
435 memcpy_from_uspace(&val8, va, sizeof(val8));
436 if (dstarg)
437 scratch[dstarg] = val8;
438 break;
439 case CMD_MEM_READ_16:
440 va = code->cmds[i].addr;
441 memcpy_from_uspace(&val16, va, sizeof(val16));
442 if (dstarg)
443 scratch[dstarg] = val16;
444 break;
445 case CMD_MEM_READ_32:
446 va = code->cmds[i].addr;
447 memcpy_from_uspace(&val32, va, sizeof(val32));
448 if (dstarg)
449 scratch[dstarg] = val32;
450 break;
451 case CMD_MEM_WRITE_8:
452 val8 = code->cmds[i].value;
453 va = code->cmds[i].addr;
454 memcpy_to_uspace(va, &val8, sizeof(val8));
455 break;
456 case CMD_MEM_WRITE_16:
457 val16 = code->cmds[i].value;
458 va = code->cmds[i].addr;
459 memcpy_to_uspace(va, &val16, sizeof(val16));
460 break;
461 case CMD_MEM_WRITE_32:
462 val32 = code->cmds[i].value;
463 va = code->cmds[i].addr;
464 memcpy_to_uspace(va, &val32, sizeof(val32));
465 break;
466 case CMD_MEM_WRITE_A_8:
467 if (srcarg) {
468 val8 = scratch[srcarg];
469 va = code->cmds[i].addr;
470 memcpy_to_uspace(va, &val8, sizeof(val8));
471 }
472 break;
473 case CMD_MEM_WRITE_A_16:
474 if (srcarg) {
475 val16 = scratch[srcarg];
476 va = code->cmds[i].addr;
477 memcpy_to_uspace(va, &val16, sizeof(val16));
478 }
479 break;
480 case CMD_MEM_WRITE_A_32:
481 if (srcarg) {
482 val32 = scratch[srcarg];
483 va = code->cmds[i].addr;
484 memcpy_to_uspace(va, &val32, sizeof(val32));
485 }
486 break;
487 case CMD_BTEST:
488 if ((srcarg) && (dstarg)) {
489 dstval = scratch[srcarg] & code->cmds[i].value;
490 scratch[dstarg] = dstval;
491 }
492 break;
493 case CMD_PREDICATE:
494 if ((srcarg) && (!scratch[srcarg])) {
495 i += code->cmds[i].value;
496 continue;
497 }
498 break;
499 case CMD_ACCEPT:
500 if (AS != current_as)
501 as_switch(AS, current_as);
502 return IRQ_ACCEPT;
503 case CMD_DECLINE:
504 default:
505 if (AS != current_as)
506 as_switch(AS, current_as);
507 return IRQ_DECLINE;
508 }
509 }
510
511 if (AS != current_as)
512 as_switch(AS, current_as);
513
514 return IRQ_DECLINE;
515}
516
517/* IRQ top-half handler.
518 *
519 * We expect interrupts to be disabled and the irq->lock already held.
520 *
521 * @param irq IRQ structure.
522 *
523 */
524void ipc_irq_top_half_handler(irq_t *irq)
525{
526 ASSERT(irq);
527
528 ASSERT(interrupts_disabled());
529 ASSERT(irq_spinlock_locked(&irq->lock));
530
531 if (irq->notif_cfg.answerbox) {
532 call_t *call = ipc_call_alloc(FRAME_ATOMIC);
533 if (!call)
534 return;
535
536 call->flags |= IPC_CALL_NOTIF;
537 /* Put a counter to the message */
538 call->priv = ++irq->notif_cfg.counter;
539
540 /* Set up args */
541 IPC_SET_IMETHOD(call->data, irq->notif_cfg.imethod);
542 IPC_SET_ARG1(call->data, irq->notif_cfg.scratch[1]);
543 IPC_SET_ARG2(call->data, irq->notif_cfg.scratch[2]);
544 IPC_SET_ARG3(call->data, irq->notif_cfg.scratch[3]);
545 IPC_SET_ARG4(call->data, irq->notif_cfg.scratch[4]);
546 IPC_SET_ARG5(call->data, irq->notif_cfg.scratch[5]);
547
548 send_call(irq, call);
549 }
550}
551
552/** Send notification message.
553 *
554 * @param irq IRQ structure.
555 * @param a1 Driver-specific payload argument.
556 * @param a2 Driver-specific payload argument.
557 * @param a3 Driver-specific payload argument.
558 * @param a4 Driver-specific payload argument.
559 * @param a5 Driver-specific payload argument.
560 *
561 */
562void ipc_irq_send_msg(irq_t *irq, sysarg_t a1, sysarg_t a2, sysarg_t a3,
563 sysarg_t a4, sysarg_t a5)
564{
565 irq_spinlock_lock(&irq->lock, true);
566
567 if (irq->notif_cfg.answerbox) {
568 call_t *call = ipc_call_alloc(FRAME_ATOMIC);
569 if (!call) {
570 irq_spinlock_unlock(&irq->lock, true);
571 return;
572 }
573
574 call->flags |= IPC_CALL_NOTIF;
575 /* Put a counter to the message */
576 call->priv = ++irq->notif_cfg.counter;
577
578 IPC_SET_IMETHOD(call->data, irq->notif_cfg.imethod);
579 IPC_SET_ARG1(call->data, a1);
580 IPC_SET_ARG2(call->data, a2);
581 IPC_SET_ARG3(call->data, a3);
582 IPC_SET_ARG4(call->data, a4);
583 IPC_SET_ARG5(call->data, a5);
584
585 send_call(irq, call);
586 }
587
588 irq_spinlock_unlock(&irq->lock, true);
589}
590
591/** @}
592 */
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