| [0d107f31] | 1 | /*
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| [df4ed85] | 2 | * Copyright (c) 2006 Jakub Jermar
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| [0d107f31] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| [7dcf22a] | 29 | /** @addtogroup genericddi
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| [0d107f31] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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| 35 | #ifndef KERN_IRQ_H_
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| 36 | #define KERN_IRQ_H_
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| 37 |
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| [da1bafb] | 38 | #ifdef KERNEL
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| 39 |
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| 40 | #include <typedefs.h>
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| 41 | #include <adt/list.h>
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| 42 | #include <adt/hash_table.h>
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| 43 | #include <synch/spinlock.h>
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| 44 | #include <proc/task.h>
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| 45 | #include <ipc/ipc.h>
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| 46 |
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| 47 | #endif /* KERNEL */
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| 48 |
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| [b3f8fb7] | 49 | typedef enum {
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| [22af3af] | 50 | /** Read 1 byte from the I/O space. */
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| [cecb0789] | 51 | CMD_PIO_READ_8 = 1,
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| [22af3af] | 52 | /** Read 2 bytes from the I/O space. */
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| [cecb0789] | 53 | CMD_PIO_READ_16,
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| [22af3af] | 54 | /** Read 4 bytes from the I/O space. */
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| [cecb0789] | 55 | CMD_PIO_READ_32,
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| [9cdac5a] | 56 |
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| [22af3af] | 57 | /** Write 1 byte to the I/O space. */
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| [cecb0789] | 58 | CMD_PIO_WRITE_8,
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| [22af3af] | 59 | /** Write 2 bytes to the I/O space. */
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| [cecb0789] | 60 | CMD_PIO_WRITE_16,
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| [22af3af] | 61 | /** Write 4 bytes to the I/O space. */
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| [cecb0789] | 62 | CMD_PIO_WRITE_32,
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| [da1bafb] | 63 |
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| [22af3af] | 64 | /**
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| [9cdac5a] | 65 | * Write 1 byte from the source argument
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| 66 | * to the I/O space.
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| 67 | */
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| 68 | CMD_PIO_WRITE_A_8,
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| 69 | /**
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| 70 | * Write 2 bytes from the source argument
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| 71 | * to the I/O space.
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| 72 | */
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| 73 | CMD_PIO_WRITE_A_16,
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| 74 | /**
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| 75 | * Write 4 bytes from the source argument
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| 76 | * to the I/O space.
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| 77 | */
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| 78 | CMD_PIO_WRITE_A_32,
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| [f7ccf46] | 79 |
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| 80 | /** Read 1 byte from the memory space. */
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| 81 | CMD_MEM_READ_8,
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| 82 | /** Read 2 bytes from the memory space. */
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| 83 | CMD_MEM_READ_16,
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| 84 | /** Read 4 bytes from the memory space. */
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| 85 | CMD_MEM_READ_32,
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| 86 |
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| 87 | /** Write 1 byte to the memory space. */
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| 88 | CMD_MEM_WRITE_8,
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| 89 | /** Write 2 bytes to the memory space. */
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| 90 | CMD_MEM_WRITE_16,
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| 91 | /** Write 4 bytes to the memory space. */
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| 92 | CMD_MEM_WRITE_32,
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| 93 |
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| 94 | /** Write 1 byte from the source argument to the memory space. */
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| 95 | CMD_MEM_WRITE_A_8,
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| 96 | /** Write 2 bytes from the source argument to the memory space. */
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| 97 | CMD_MEM_WRITE_A_16,
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| 98 | /** Write 4 bytes from the source argument to the memory space. */
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| 99 | CMD_MEM_WRITE_A_32,
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| 100 |
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| [9cdac5a] | 101 | /**
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| 102 | * Perform a bit masking on the source argument
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| 103 | * and store the result into the destination argument.
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| [22af3af] | 104 | */
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| [cecb0789] | 105 | CMD_BTEST,
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| [da1bafb] | 106 |
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| [22af3af] | 107 | /**
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| [9cdac5a] | 108 | * Predicate the execution of the following
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| 109 | * N commands by the boolean value of the source
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| 110 | * argument.
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| [22af3af] | 111 | */
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| [cecb0789] | 112 | CMD_PREDICATE,
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| [da1bafb] | 113 |
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| [22af3af] | 114 | /** Accept the interrupt. */
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| [cecb0789] | 115 | CMD_ACCEPT,
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| [9cdac5a] | 116 |
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| [22af3af] | 117 | /** Decline the interrupt. */
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| [cecb0789] | 118 | CMD_DECLINE,
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| [b3f8fb7] | 119 | CMD_LAST
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| 120 | } irq_cmd_type;
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| 121 |
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| 122 | typedef struct {
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| 123 | irq_cmd_type cmd;
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| 124 | void *addr;
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| [da1bafb] | 125 | uint32_t value;
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| 126 | uintptr_t srcarg;
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| 127 | uintptr_t dstarg;
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| [b3f8fb7] | 128 | } irq_cmd_t;
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| 129 |
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| 130 | typedef struct {
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| [da1bafb] | 131 | size_t cmdcount;
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| [b3f8fb7] | 132 | irq_cmd_t *cmds;
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| 133 | } irq_code_t;
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| 134 |
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| 135 | #ifdef KERNEL
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| 136 |
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| [0d107f31] | 137 | typedef enum {
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| [da1bafb] | 138 | IRQ_DECLINE, /**< Decline to service. */
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| 139 | IRQ_ACCEPT /**< Accept to service. */
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| [0d107f31] | 140 | } irq_ownership_t;
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| 141 |
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| 142 | typedef enum {
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| 143 | IRQ_TRIGGER_LEVEL = 1,
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| 144 | IRQ_TRIGGER_EDGE
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| 145 | } irq_trigger_t;
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| 146 |
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| [b3f8fb7] | 147 | struct irq;
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| [6cd9aa6] | 148 | typedef void (* irq_handler_t)(struct irq *);
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| [b3f8fb7] | 149 |
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| [8d2760f] | 150 | /** Type for function used to clear the interrupt. */
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| [6cd9aa6] | 151 | typedef void (* cir_t)(void *, inr_t);
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| [8d2760f] | 152 |
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| [b3f8fb7] | 153 | /** IPC notification config structure.
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| 154 | *
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| 155 | * Primarily, this structure is encapsulated in the irq_t structure.
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| 156 | * It is protected by irq_t::lock.
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| [da1bafb] | 157 | *
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| [b3f8fb7] | 158 | */
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| 159 | typedef struct {
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| [80bcaed] | 160 | /** When false, notifications are not sent. */
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| 161 | bool notify;
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| 162 | /** Answerbox for notifications. */
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| 163 | answerbox_t *answerbox;
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| [228e490] | 164 | /** Interface and method to be used for the notification. */
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| 165 | sysarg_t imethod;
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| [cecb0789] | 166 | /** Arguments that will be sent if the IRQ is claimed. */
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| [da1bafb] | 167 | uint32_t scratch[IPC_CALL_LEN];
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| [80bcaed] | 168 | /** Top-half pseudocode. */
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| 169 | irq_code_t *code;
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| 170 | /** Counter. */
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| [98000fb] | 171 | size_t counter;
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| [da1bafb] | 172 |
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| [80bcaed] | 173 | /**
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| 174 | * Link between IRQs that are notifying the same answerbox. The list is
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| 175 | * protected by the answerbox irq_lock.
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| 176 | */
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| 177 | link_t link;
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| [b3f8fb7] | 178 | } ipc_notif_cfg_t;
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| [0d107f31] | 179 |
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| 180 | /** Structure representing one device IRQ.
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| 181 | *
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| [80bcaed] | 182 | * If one device has multiple interrupts, there will be multiple irq_t
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| 183 | * instantions with the same devno.
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| [da1bafb] | 184 | *
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| [0d107f31] | 185 | */
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| [b3f8fb7] | 186 | typedef struct irq {
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| [0d107f31] | 187 | /** Hash table link. */
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| 188 | link_t link;
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| [da1bafb] | 189 |
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| [63530c62] | 190 | /** Lock protecting everything in this structure
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| 191 | * except the link member. When both the IRQ
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| 192 | * hash table lock and this lock are to be acquired,
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| 193 | * this lock must not be taken first.
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| 194 | */
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| [da1bafb] | 195 | IRQ_SPINLOCK_DECLARE(lock);
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| [7bcfbbc] | 196 |
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| 197 | /** Send EOI before processing the interrupt.
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| 198 | * This is essential for timer interrupt which
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| 199 | * has to be acknowledged before doing preemption
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| 200 | * to make sure another timer interrupt will
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| 201 | * be eventually generated.
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| 202 | */
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| 203 | bool preack;
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| [da1bafb] | 204 |
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| [0d107f31] | 205 | /** Unique device number. -1 if not yet assigned. */
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| 206 | devno_t devno;
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| [da1bafb] | 207 |
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| [0d107f31] | 208 | /** Actual IRQ number. -1 if not yet assigned. */
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| 209 | inr_t inr;
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| [7bcfbbc] | 210 | /** Trigger level of the IRQ. */
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| [0d107f31] | 211 | irq_trigger_t trigger;
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| 212 | /** Claim ownership of the IRQ. */
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| [c9b550b] | 213 | irq_ownership_t (* claim)(struct irq *);
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| [0d107f31] | 214 | /** Handler for this IRQ and device. */
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| 215 | irq_handler_t handler;
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| [6cd9aa6] | 216 | /** Instance argument for the handler and the claim function. */
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| 217 | void *instance;
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| [da1bafb] | 218 |
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| [8d2760f] | 219 | /** Clear interrupt routine. */
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| 220 | cir_t cir;
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| 221 | /** First argument to the clear interrupt routine. */
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| 222 | void *cir_arg;
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| [da1bafb] | 223 |
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| [2b017ba] | 224 | /** Notification configuration structure. */
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| 225 | ipc_notif_cfg_t notif_cfg;
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| [180255f] | 226 |
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| 227 | as_t *driver_as;
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| [b3f8fb7] | 228 | } irq_t;
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| [0d107f31] | 229 |
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| [da1bafb] | 230 | IRQ_SPINLOCK_EXTERN(irq_uspace_hash_table_lock);
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| [cecb0789] | 231 | extern hash_table_t irq_uspace_hash_table;
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| 232 |
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| [78ffb70] | 233 | extern inr_t last_inr;
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| 234 |
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| [98000fb] | 235 | extern void irq_init(size_t, size_t);
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| [6cd9aa6] | 236 | extern void irq_initialize(irq_t *);
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| 237 | extern void irq_register(irq_t *);
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| 238 | extern irq_t *irq_dispatch_and_lock(inr_t);
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| [0d107f31] | 239 |
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| [da1bafb] | 240 | #endif /* KERNEL */
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| [0d107f31] | 241 |
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| [b3f8fb7] | 242 | #endif
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| 243 |
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| [0d107f31] | 244 | /** @}
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| 245 | */
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