[6d7ffa65] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2006 Jakub Jermar
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[6d7ffa65] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[f47fd19] | 29 | /** @addtogroup genarchmm
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 |
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[0f27b4c] | 33 | /**
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[b45c443] | 34 | * @file
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[da1bafb] | 35 | * @brief Virtual Address Translation for hierarchical 4-level page tables.
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[0f27b4c] | 36 | */
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| 37 |
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[6d7ffa65] | 38 | #include <genarch/mm/page_pt.h>
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| 39 | #include <mm/page.h>
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| 40 | #include <mm/frame.h>
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[c72dc15] | 41 | #include <mm/km.h>
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[ef67bab] | 42 | #include <mm/as.h>
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[6d7ffa65] | 43 | #include <arch/mm/page.h>
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[fc1e4f6] | 44 | #include <arch/mm/as.h>
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[609a417] | 45 | #include <arch/barrier.h>
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[d99c1d2] | 46 | #include <typedefs.h>
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[6d7ffa65] | 47 | #include <arch/asm.h>
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| 48 | #include <memstr.h>
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[c868e2d] | 49 | #include <align.h>
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| 50 | #include <macros.h>
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[caed0279] | 51 | #include <bitops.h>
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[6d7ffa65] | 52 |
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[da1bafb] | 53 | static void pt_mapping_insert(as_t *, uintptr_t, uintptr_t, unsigned int);
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| 54 | static void pt_mapping_remove(as_t *, uintptr_t);
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[235e6c7] | 55 | static pte_t *pt_mapping_find(as_t *, uintptr_t, bool);
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[c868e2d] | 56 | static void pt_mapping_make_global(uintptr_t, size_t);
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[6d7ffa65] | 57 |
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[f5935ed] | 58 | page_mapping_operations_t pt_mapping_operations = {
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[6d7ffa65] | 59 | .mapping_insert = pt_mapping_insert,
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[8f00329] | 60 | .mapping_remove = pt_mapping_remove,
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[c868e2d] | 61 | .mapping_find = pt_mapping_find,
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| 62 | .mapping_make_global = pt_mapping_make_global
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[6d7ffa65] | 63 | };
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| 64 |
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| 65 | /** Map page to frame using hierarchical page tables.
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| 66 | *
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[9179d0a] | 67 | * Map virtual address page to physical address frame
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| 68 | * using flags.
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[6d7ffa65] | 69 | *
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[da1bafb] | 70 | * @param as Address space to wich page belongs.
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| 71 | * @param page Virtual address of the page to be mapped.
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[6d7ffa65] | 72 | * @param frame Physical address of memory frame to which the mapping is done.
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| 73 | * @param flags Flags to be used for mapping.
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[da1bafb] | 74 | *
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[6d7ffa65] | 75 | */
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[da1bafb] | 76 | void pt_mapping_insert(as_t *as, uintptr_t page, uintptr_t frame,
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| 77 | unsigned int flags)
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[6d7ffa65] | 78 | {
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[da1bafb] | 79 | pte_t *ptl0 = (pte_t *) PA2KA((uintptr_t) as->genarch.page_table);
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[1d432f9] | 80 |
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| 81 | ASSERT(page_table_locked(as));
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[da1bafb] | 82 |
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[6d7ffa65] | 83 | if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT) {
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[6b326ea1] | 84 | pte_t *newpt = (pte_t *) frame_alloc(PTL1_SIZE,
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| 85 | FRAME_LOWMEM | FRAME_KA);
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[e32e092] | 86 | memsetb(newpt, FRAME_SIZE << PTL1_SIZE, 0);
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[6d7ffa65] | 87 | SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page), KA2PA(newpt));
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[6b326ea1] | 88 | SET_PTL1_FLAGS(ptl0, PTL0_INDEX(page),
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[609a417] | 89 | PAGE_NOT_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE |
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[6b326ea1] | 90 | PAGE_WRITE);
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[609a417] | 91 | write_barrier();
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| 92 | SET_PTL1_PRESENT(ptl0, PTL0_INDEX(page));
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[6d7ffa65] | 93 | }
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[da1bafb] | 94 |
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| 95 | pte_t *ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
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| 96 |
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[6d7ffa65] | 97 | if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT) {
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[6b326ea1] | 98 | pte_t *newpt = (pte_t *) frame_alloc(PTL2_SIZE,
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| 99 | FRAME_LOWMEM | FRAME_KA);
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[e32e092] | 100 | memsetb(newpt, FRAME_SIZE << PTL2_SIZE, 0);
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[6d7ffa65] | 101 | SET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page), KA2PA(newpt));
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[6b326ea1] | 102 | SET_PTL2_FLAGS(ptl1, PTL1_INDEX(page),
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[609a417] | 103 | PAGE_NOT_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE |
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[6b326ea1] | 104 | PAGE_WRITE);
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[609a417] | 105 | write_barrier();
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| 106 | SET_PTL2_PRESENT(ptl1, PTL1_INDEX(page));
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[6d7ffa65] | 107 | }
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[da1bafb] | 108 |
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| 109 | pte_t *ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
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| 110 |
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[6d7ffa65] | 111 | if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT) {
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[6b326ea1] | 112 | pte_t *newpt = (pte_t *) frame_alloc(PTL3_SIZE,
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| 113 | FRAME_LOWMEM | FRAME_KA);
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[e32e092] | 114 | memsetb(newpt, FRAME_SIZE << PTL3_SIZE, 0);
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[6d7ffa65] | 115 | SET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page), KA2PA(newpt));
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[6b326ea1] | 116 | SET_PTL3_FLAGS(ptl2, PTL2_INDEX(page),
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[609a417] | 117 | PAGE_NOT_PRESENT | PAGE_USER | PAGE_EXEC | PAGE_CACHEABLE |
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[6b326ea1] | 118 | PAGE_WRITE);
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[609a417] | 119 | write_barrier();
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| 120 | SET_PTL3_PRESENT(ptl2, PTL2_INDEX(page));
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[6d7ffa65] | 121 | }
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[da1bafb] | 122 |
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| 123 | pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
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| 124 |
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[6d7ffa65] | 125 | SET_FRAME_ADDRESS(ptl3, PTL3_INDEX(page), frame);
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[609a417] | 126 | SET_FRAME_FLAGS(ptl3, PTL3_INDEX(page), flags | PAGE_NOT_PRESENT);
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| 127 | write_barrier();
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| 128 | SET_FRAME_PRESENT(ptl3, PTL3_INDEX(page));
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[6d7ffa65] | 129 | }
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| 130 |
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[8f00329] | 131 | /** Remove mapping of page from hierarchical page tables.
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| 132 | *
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[9179d0a] | 133 | * Remove any mapping of page within address space as.
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[8f00329] | 134 | * TLB shootdown should follow in order to make effects of
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| 135 | * this call visible.
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| 136 | *
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[ecbdc724] | 137 | * Empty page tables except PTL0 are freed.
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| 138 | *
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[da1bafb] | 139 | * @param as Address space to wich page belongs.
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[8f00329] | 140 | * @param page Virtual address of the page to be demapped.
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[da1bafb] | 141 | *
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[8f00329] | 142 | */
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[7f1c620] | 143 | void pt_mapping_remove(as_t *as, uintptr_t page)
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[8f00329] | 144 | {
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[1d432f9] | 145 | ASSERT(page_table_locked(as));
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| 146 |
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[ecbdc724] | 147 | /*
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| 148 | * First, remove the mapping, if it exists.
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| 149 | */
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[da1bafb] | 150 |
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| 151 | pte_t *ptl0 = (pte_t *) PA2KA((uintptr_t) as->genarch.page_table);
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[8f00329] | 152 | if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT)
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| 153 | return;
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[da1bafb] | 154 |
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| 155 | pte_t *ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
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[8f00329] | 156 | if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT)
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| 157 | return;
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[da1bafb] | 158 |
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| 159 | pte_t *ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
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[8f00329] | 160 | if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT)
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| 161 | return;
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[da1bafb] | 162 |
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| 163 | pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
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| 164 |
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[c868e2d] | 165 | /*
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| 166 | * Destroy the mapping.
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| 167 | * Setting to PAGE_NOT_PRESENT is not sufficient.
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| 168 | */
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[e32e092] | 169 | memsetb(&ptl3[PTL3_INDEX(page)], sizeof(pte_t), 0);
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[da1bafb] | 170 |
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[ecbdc724] | 171 | /*
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[c72dc15] | 172 | * Second, free all empty tables along the way from PTL3 down to PTL0
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| 173 | * except those needed for sharing the kernel non-identity mappings.
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[ecbdc724] | 174 | */
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| 175 |
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[da1bafb] | 176 | /* Check PTL3 */
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| 177 | bool empty = true;
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| 178 |
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| 179 | unsigned int i;
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[ecbdc724] | 180 | for (i = 0; i < PTL3_ENTRIES; i++) {
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| 181 | if (PTE_VALID(&ptl3[i])) {
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| 182 | empty = false;
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| 183 | break;
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| 184 | }
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| 185 | }
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[da1bafb] | 186 |
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[ecbdc724] | 187 | if (empty) {
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| 188 | /*
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| 189 | * PTL3 is empty.
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[c72dc15] | 190 | * Release the frame and remove PTL3 pointer from the parent
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| 191 | * table.
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[ecbdc724] | 192 | */
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[da1bafb] | 193 | #if (PTL2_ENTRIES != 0)
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| 194 | memsetb(&ptl2[PTL2_INDEX(page)], sizeof(pte_t), 0);
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| 195 | #elif (PTL1_ENTRIES != 0)
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| 196 | memsetb(&ptl1[PTL1_INDEX(page)], sizeof(pte_t), 0);
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| 197 | #else
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[c72dc15] | 198 | if (km_is_non_identity(page))
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| 199 | return;
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| 200 |
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[da1bafb] | 201 | memsetb(&ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
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| 202 | #endif
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[c72dc15] | 203 | frame_free(KA2PA((uintptr_t) ptl3));
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[ecbdc724] | 204 | } else {
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| 205 | /*
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| 206 | * PTL3 is not empty.
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| 207 | * Therefore, there must be a path from PTL0 to PTL3 and
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| 208 | * thus nothing to free in higher levels.
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[da1bafb] | 209 | *
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[ecbdc724] | 210 | */
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| 211 | return;
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| 212 | }
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| 213 |
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[da1bafb] | 214 | /* Check PTL2, empty is still true */
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| 215 | #if (PTL2_ENTRIES != 0)
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| 216 | for (i = 0; i < PTL2_ENTRIES; i++) {
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| 217 | if (PTE_VALID(&ptl2[i])) {
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| 218 | empty = false;
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| 219 | break;
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[ecbdc724] | 220 | }
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| 221 | }
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[da1bafb] | 222 |
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| 223 | if (empty) {
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| 224 | /*
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| 225 | * PTL2 is empty.
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[c72dc15] | 226 | * Release the frame and remove PTL2 pointer from the parent
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| 227 | * table.
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[da1bafb] | 228 | */
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| 229 | #if (PTL1_ENTRIES != 0)
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| 230 | memsetb(&ptl1[PTL1_INDEX(page)], sizeof(pte_t), 0);
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| 231 | #else
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[c72dc15] | 232 | if (km_is_non_identity(page))
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| 233 | return;
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| 234 |
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[da1bafb] | 235 | memsetb(&ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
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| 236 | #endif
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[c72dc15] | 237 | frame_free(KA2PA((uintptr_t) ptl2));
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[da1bafb] | 238 | } else {
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| 239 | /*
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| 240 | * PTL2 is not empty.
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| 241 | * Therefore, there must be a path from PTL0 to PTL2 and
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| 242 | * thus nothing to free in higher levels.
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| 243 | *
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| 244 | */
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| 245 | return;
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| 246 | }
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| 247 | #endif /* PTL2_ENTRIES != 0 */
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| 248 |
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[ecbdc724] | 249 | /* check PTL1, empty is still true */
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[da1bafb] | 250 | #if (PTL1_ENTRIES != 0)
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| 251 | for (i = 0; i < PTL1_ENTRIES; i++) {
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| 252 | if (PTE_VALID(&ptl1[i])) {
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| 253 | empty = false;
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| 254 | break;
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[ecbdc724] | 255 | }
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| 256 | }
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[da1bafb] | 257 |
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| 258 | if (empty) {
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| 259 | /*
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| 260 | * PTL1 is empty.
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[c72dc15] | 261 | * Release the frame and remove PTL1 pointer from the parent
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| 262 | * table.
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[da1bafb] | 263 | */
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[c72dc15] | 264 | if (km_is_non_identity(page))
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| 265 | return;
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| 266 |
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[da1bafb] | 267 | memsetb(&ptl0[PTL0_INDEX(page)], sizeof(pte_t), 0);
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[c72dc15] | 268 | frame_free(KA2PA((uintptr_t) ptl1));
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[da1bafb] | 269 | }
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| 270 | #endif /* PTL1_ENTRIES != 0 */
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[8f00329] | 271 | }
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| 272 |
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[6d7ffa65] | 273 | /** Find mapping for virtual page in hierarchical page tables.
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| 274 | *
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[235e6c7] | 275 | * @param as Address space to which page belongs.
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| 276 | * @param page Virtual page.
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| 277 | * @param nolock True if the page tables need not be locked.
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[6d7ffa65] | 278 | *
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[da1bafb] | 279 | * @return NULL if there is no such mapping; entry from PTL3 describing
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| 280 | * the mapping otherwise.
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| 281 | *
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[6d7ffa65] | 282 | */
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[235e6c7] | 283 | pte_t *pt_mapping_find(as_t *as, uintptr_t page, bool nolock)
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[6d7ffa65] | 284 | {
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[235e6c7] | 285 | ASSERT(nolock || page_table_locked(as));
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[1d432f9] | 286 |
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[da1bafb] | 287 | pte_t *ptl0 = (pte_t *) PA2KA((uintptr_t) as->genarch.page_table);
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[6d7ffa65] | 288 | if (GET_PTL1_FLAGS(ptl0, PTL0_INDEX(page)) & PAGE_NOT_PRESENT)
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| 289 | return NULL;
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[da1bafb] | 290 |
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| 291 | pte_t *ptl1 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(ptl0, PTL0_INDEX(page)));
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[6d7ffa65] | 292 | if (GET_PTL2_FLAGS(ptl1, PTL1_INDEX(page)) & PAGE_NOT_PRESENT)
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| 293 | return NULL;
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[da1bafb] | 294 |
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| 295 | pte_t *ptl2 = (pte_t *) PA2KA(GET_PTL2_ADDRESS(ptl1, PTL1_INDEX(page)));
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[6d7ffa65] | 296 | if (GET_PTL3_FLAGS(ptl2, PTL2_INDEX(page)) & PAGE_NOT_PRESENT)
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| 297 | return NULL;
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[da1bafb] | 298 |
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| 299 | pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL3_ADDRESS(ptl2, PTL2_INDEX(page)));
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| 300 |
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[6d7ffa65] | 301 | return &ptl3[PTL3_INDEX(page)];
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| 302 | }
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[b45c443] | 303 |
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[caed0279] | 304 | /** Return the size of the region mapped by a single PTL0 entry.
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| 305 | *
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| 306 | * @return Size of the region mapped by a single PTL0 entry.
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| 307 | */
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| 308 | static uintptr_t ptl0_step_get(void)
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| 309 | {
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| 310 | size_t va_bits;
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| 311 |
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| 312 | va_bits = fnzb(PTL0_ENTRIES) + fnzb(PTL1_ENTRIES) + fnzb(PTL2_ENTRIES) +
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| 313 | fnzb(PTL3_ENTRIES) + PAGE_WIDTH;
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| 314 |
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| 315 | return 1UL << (va_bits - fnzb(PTL0_ENTRIES));
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| 316 | }
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| 317 |
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[c868e2d] | 318 | /** Make the mappings in the given range global accross all address spaces.
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| 319 | *
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| 320 | * All PTL0 entries in the given range will be mapped to a next level page
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| 321 | * table. The next level page table will be allocated and cleared.
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| 322 | *
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| 323 | * pt_mapping_remove() will never deallocate these page tables even when there
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| 324 | * are no PTEs in them.
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| 325 | *
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| 326 | * @param as Address space.
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| 327 | * @param base Base address corresponding to the first PTL0 entry that will be
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| 328 | * altered by this function.
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| 329 | * @param size Size in bytes defining the range of PTL0 entries that will be
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| 330 | * altered by this function.
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| 331 | */
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| 332 | void pt_mapping_make_global(uintptr_t base, size_t size)
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| 333 | {
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| 334 | uintptr_t ptl0 = PA2KA((uintptr_t) AS_KERNEL->genarch.page_table);
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[caed0279] | 335 | uintptr_t ptl0_step = ptl0_step_get();
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[c868e2d] | 336 | size_t order;
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| 337 | uintptr_t addr;
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| 338 |
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| 339 | #if (PTL1_ENTRIES != 0)
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| 340 | order = PTL1_SIZE;
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| 341 | #elif (PTL2_ENTRIES != 0)
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| 342 | order = PTL2_SIZE;
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| 343 | #else
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| 344 | order = PTL3_SIZE;
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| 345 | #endif
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| 346 |
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[a2789d2] | 347 | ASSERT(size > 0);
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[c868e2d] | 348 |
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[caed0279] | 349 | for (addr = ALIGN_DOWN(base, ptl0_step); addr - 1 < base + size - 1;
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| 350 | addr += ptl0_step) {
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[c868e2d] | 351 | uintptr_t l1;
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| 352 |
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| 353 | l1 = (uintptr_t) frame_alloc(order, FRAME_KA | FRAME_LOWMEM);
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| 354 | memsetb((void *) l1, FRAME_SIZE << order, 0);
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| 355 | SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(addr), KA2PA(l1));
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| 356 | SET_PTL1_FLAGS(ptl0, PTL0_INDEX(addr),
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[34ab31c0] | 357 | PAGE_PRESENT | PAGE_USER | PAGE_CACHEABLE |
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| 358 | PAGE_EXEC | PAGE_WRITE | PAGE_READ);
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[c868e2d] | 359 | }
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| 360 | }
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| 361 |
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[f47fd19] | 362 | /** @}
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[b45c443] | 363 | */
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