1 | /*
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2 | * Copyright (c) 2009 Jakub Jermar
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3 | * Copyright (c) 2018 CZ.NIC, z.s.p.o.
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4 | * All rights reserved.
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5 | *
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6 | * Redistribution and use in source and binary forms, with or without
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7 | * modification, are permitted provided that the following conditions
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8 | * are met:
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9 | *
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10 | * - Redistributions of source code must retain the above copyright
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11 | * notice, this list of conditions and the following disclaimer.
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12 | * - Redistributions in binary form must reproduce the above copyright
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13 | * notice, this list of conditions and the following disclaimer in the
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14 | * documentation and/or other materials provided with the distribution.
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15 | * - The name of the author may not be used to endorse or promote products
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16 | * derived from this software without specific prior written permission.
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17 | *
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18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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28 | */
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29 |
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30 | /** @addtogroup genarch
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31 | * @{
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32 | */
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33 | /**
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34 | * @file
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35 | * @brief NS 16550 serial controller driver.
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36 | */
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37 |
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38 | #include <assert.h>
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39 | #include <genarch/drivers/ns16550/ns16550.h>
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40 | #include <ddi/irq.h>
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41 | #include <arch/asm.h>
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42 | #include <console/chardev.h>
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43 | #include <mm/slab.h>
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44 | #include <str.h>
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45 |
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46 | #define LSR_DATA_READY 0x01
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47 | #define LSR_TH_READY 0x20
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48 |
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49 | static inline uint8_t _read(ns16550_instance_t *inst, int reg) {
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50 | return pio_read_8(&inst->ns16550[reg << inst->reg_shift]);
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51 | }
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52 |
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53 | static inline void _write(ns16550_instance_t *inst, int reg, uint8_t val) {
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54 | pio_write_8(&inst->ns16550[reg << inst->reg_shift], val);
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55 | }
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56 |
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57 | static irq_ownership_t ns16550_claim(irq_t *irq)
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58 | {
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59 | ns16550_instance_t *instance = irq->instance;
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60 |
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61 | if (_read(instance, NS16550_REG_LSR) & LSR_DATA_READY)
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62 | return IRQ_ACCEPT;
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63 | else
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64 | return IRQ_DECLINE;
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65 | }
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66 |
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67 | static void ns16550_irq_handler(irq_t *irq)
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68 | {
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69 | ns16550_instance_t *instance = irq->instance;
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70 |
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71 | while (_read(instance, NS16550_REG_LSR) & LSR_DATA_READY) {
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72 | uint8_t data = _read(instance, NS16550_REG_RBR);
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73 | indev_push_character(instance->input, data);
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74 | }
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75 | }
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76 |
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77 | /**< Clear input buffer. */
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78 | static void ns16550_clear_buffer(ns16550_instance_t *instance)
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79 | {
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80 | while (_read(instance, NS16550_REG_LSR) & LSR_DATA_READY)
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81 | (void) _read(instance, NS16550_REG_RBR);
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82 | }
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83 |
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84 | static void ns16550_sendb(ns16550_instance_t *instance, uint8_t byte)
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85 | {
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86 | while (!(_read(instance, NS16550_REG_LSR) & LSR_TH_READY))
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87 | ;
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88 | _write(instance, NS16550_REG_THR, byte);
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89 | }
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90 |
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91 | static void ns16550_putchar(outdev_t *dev, wchar_t ch)
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92 | {
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93 | ns16550_instance_t *instance = (ns16550_instance_t *) dev->data;
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94 |
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95 | if ((!instance->parea.mapped) || (console_override)) {
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96 | if (ascii_check(ch))
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97 | ns16550_sendb(instance, (uint8_t) ch);
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98 | else
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99 | ns16550_sendb(instance, U_SPECIAL);
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100 | }
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101 | }
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102 |
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103 | static outdev_operations_t ns16550_ops = {
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104 | .write = ns16550_putchar,
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105 | .redraw = NULL
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106 | };
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107 |
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108 | /** Initialize ns16550.
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109 | *
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110 | * @param dev Address of the beginning of the device in I/O space.
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111 | * @param reg_shift Spacing between individual register addresses, in log2.
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112 | * The individual register location is calculated as
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113 | * `base + (register offset << reg_shift)`.
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114 | * @param inr Interrupt number.
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115 | * @param cir Clear interrupt function.
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116 | * @param cir_arg First argument to cir.
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117 | * @param output Where to store pointer to the output device
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118 | * or NULL if the caller is not interested in
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119 | * writing to the serial port.
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120 | *
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121 | * @return Keyboard instance or NULL on failure.
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122 | *
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123 | */
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124 | ns16550_instance_t *ns16550_init(ioport8_t *dev, int reg_shift, inr_t inr,
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125 | cir_t cir, void *cir_arg, outdev_t **output)
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126 | {
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127 | ns16550_instance_t *instance
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128 | = malloc(sizeof(ns16550_instance_t), FRAME_ATOMIC);
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129 | if (instance) {
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130 | instance->ns16550 = dev;
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131 | instance->reg_shift = reg_shift;
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132 | instance->input = NULL;
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133 | instance->output = NULL;
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134 |
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135 | if (output) {
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136 | instance->output = malloc(sizeof(outdev_t),
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137 | FRAME_ATOMIC);
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138 | if (!instance->output) {
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139 | free(instance);
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140 | return NULL;
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141 | }
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142 |
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143 | outdev_initialize("ns16550", instance->output,
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144 | &ns16550_ops);
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145 | instance->output->data = instance;
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146 | *output = instance->output;
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147 | }
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148 |
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149 | irq_initialize(&instance->irq);
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150 | instance->irq.inr = inr;
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151 | instance->irq.claim = ns16550_claim;
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152 | instance->irq.handler = ns16550_irq_handler;
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153 | instance->irq.instance = instance;
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154 | instance->irq.cir = cir;
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155 | instance->irq.cir_arg = cir_arg;
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156 |
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157 | instance->parea.pbase = (uintptr_t) dev;
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158 | instance->parea.frames = 1;
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159 | instance->parea.unpriv = false;
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160 | instance->parea.mapped = false;
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161 | ddi_parea_register(&instance->parea);
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162 | }
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163 |
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164 | return instance;
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165 | }
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166 |
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167 | void ns16550_wire(ns16550_instance_t *instance, indev_t *input)
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168 | {
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169 | assert(instance);
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170 | assert(input);
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171 |
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172 | instance->input = input;
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173 | irq_register(&instance->irq);
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174 |
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175 | ns16550_clear_buffer(instance);
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176 |
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177 | /* Enable interrupts */
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178 | _write(instance, NS16550_REG_IER, IER_ERBFI);
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179 | _write(instance, NS16550_REG_MCR, MCR_OUT2);
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180 | }
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181 |
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182 | /** @}
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183 | */
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