1 | /*
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2 | * Copyright (c) 2013 Jakub Klama
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3 | * All rights reserved.
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4 | *
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5 | * Redistribution and use in source and binary forms, with or without
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6 | * modification, are permitted provided that the following conditions
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7 | * are met:
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8 | *
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9 | * - Redistributions of source code must retain the above copyright
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10 | * notice, this list of conditions and the following disclaimer.
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11 | * - Redistributions in binary form must reproduce the above copyright
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12 | * notice, this list of conditions and the following disclaimer in the
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13 | * documentation and/or other materials provided with the distribution.
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14 | * - The name of the author may not be used to endorse or promote products
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15 | * derived from this software without specific prior written permission.
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16 | *
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17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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27 | */
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28 |
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29 | /** @addtogroup genarch
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30 | * @{
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31 | */
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32 | /**
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33 | * @file
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34 | * @brief Gaisler GRLIB interrupt controller.
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35 | */
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36 |
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37 | #include <genarch/drivers/grlib/irqmp.h>
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38 | #include <arch/asm.h>
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39 | #include <mm/km.h>
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40 |
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41 | void grlib_irqmp_init(grlib_irqmp_t *irqc, bootinfo_t *bootinfo)
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42 | {
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43 | irqc->regs = (void *) km_map(bootinfo->intc_base, PAGE_SIZE,
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44 | PAGE_NOT_CACHEABLE);
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45 |
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46 | /* Mask all interrupts */
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47 | pio_write_32((void *) irqc->regs + GRLIB_IRQMP_MASK_OFFSET, 0x8);
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48 | }
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49 |
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50 | int grlib_irqmp_inum_get(grlib_irqmp_t *irqc)
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51 | {
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52 | uint32_t pending = pio_read_32(&irqc->regs->pending);
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53 |
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54 | for (unsigned int i = 1; i < 16; i++) {
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55 | if (pending & (1 << i))
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56 | return i;
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57 | }
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58 |
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59 | return -1;
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60 | }
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61 |
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62 | void grlib_irqmp_clear(grlib_irqmp_t *irqc, unsigned int inum)
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63 | {
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64 | inum++;
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65 | pio_write_32(&irqc->regs->clear, (1 << inum));
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66 | }
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67 |
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68 | void grlib_irqmp_mask(grlib_irqmp_t *irqc, unsigned int src)
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69 | {
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70 | uint32_t mask = pio_read_32((void *) irqc->regs +
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71 | GRLIB_IRQMP_MASK_OFFSET);
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72 |
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73 | src++;
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74 | mask &= ~(1 << src);
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75 |
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76 | pio_write_32((void *) irqc->regs + GRLIB_IRQMP_MASK_OFFSET, mask);
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77 | }
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78 |
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79 | void grlib_irqmp_unmask(grlib_irqmp_t *irqc, unsigned int src)
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80 | {
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81 | uint32_t mask = pio_read_32((void *) irqc->regs +
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82 | GRLIB_IRQMP_MASK_OFFSET);
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83 |
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84 | src++;
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85 | mask |= (1 << src);
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86 |
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87 | pio_write_32((void *) irqc->regs + GRLIB_IRQMP_MASK_OFFSET, mask);
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88 | }
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89 |
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90 | /** @}
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91 | */
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