source: mainline/kernel/arch/sparc64/src/mm/page.c@ 5f0f29ce

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 5f0f29ce was 9979acb, checked in by Martin Decky <martin@…>, 17 years ago

make hw_area API more generic
this allows mapping of EGA VRAM on ia32/amd64

  • Property mode set to 100644
File size: 5.3 KB
RevLine 
[437ee6a4]1/*
[df4ed85]2 * Copyright (c) 2005 Jakub Jermar
[437ee6a4]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[9979acb]29/** @addtogroup sparc64mm
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[437ee6a4]35#include <arch/mm/page.h>
[c1982e45]36#include <arch/mm/tlb.h>
[6d7ffa65]37#include <genarch/mm/page_ht.h>
[c1982e45]38#include <mm/frame.h>
[c6e314a]39#include <arch/mm/frame.h>
[c1982e45]40#include <bitops.h>
[82da5f5]41#include <debug.h>
[c6e314a]42#include <align.h>
[a9ac978]43#include <config.h>
[9979acb]44#include <ddi/ddi.h>
45
46/** Physical memory area for devices. */
47static parea_t dev_area;
[437ee6a4]48
[a9ac978]49#ifdef CONFIG_SMP
50/** Entries locked in DTLB of BSP.
51 *
[771cd22]52 * Application processors need to have the same locked entries in their DTLBs as
53 * the bootstrap processor.
[a9ac978]54 */
55static struct {
56 uintptr_t virt_page;
57 uintptr_t phys_page;
58 int pagesize_code;
[965dc18]59} bsp_locked_dtlb_entry[DTLB_MAX_LOCKED_ENTRIES];
[a9ac978]60
61/** Number of entries in bsp_locked_dtlb_entry array. */
62static count_t bsp_locked_dtlb_entries = 0;
63#endif /* CONFIG_SMP */
64
65/** Perform sparc64 specific initialization of paging. */
[437ee6a4]66void page_arch_init(void)
67{
[a9ac978]68 if (config.cpu_active == 1) {
69 page_mapping_operations = &ht_mapping_operations;
70 } else {
71
72#ifdef CONFIG_SMP
[6c441cf8]73 unsigned int i;
[a9ac978]74
75 /*
76 * Copy locked DTLB entries from the BSP.
77 */
78 for (i = 0; i < bsp_locked_dtlb_entries; i++) {
79 dtlb_insert_mapping(bsp_locked_dtlb_entry[i].virt_page,
[2057572]80 bsp_locked_dtlb_entry[i].phys_page,
81 bsp_locked_dtlb_entry[i].pagesize_code, true,
82 false);
[a9ac978]83 }
84#endif
85
86 }
[437ee6a4]87}
[c1982e45]88
[da74747]89/** Map memory-mapped device into virtual memory.
90 *
[771cd22]91 * So far, only DTLB is used to map devices into memory. Chances are that there
92 * will be only a limited amount of devices that the kernel itself needs to
93 * lock in DTLB.
[da74747]94 *
[771cd22]95 * @param physaddr Physical address of the page where the device is located.
96 * Must be at least page-aligned.
97 * @param size Size of the device's registers. Must not exceed 4M and must
98 * include extra space caused by the alignment.
[da74747]99 *
[771cd22]100 * @return Virtual address of the page where the device is mapped.
[da74747]101 */
[7f1c620]102uintptr_t hw_map(uintptr_t physaddr, size_t size)
[c1982e45]103{
104 unsigned int order;
[6c441cf8]105 unsigned int i;
[82da5f5]106
[a9ac978]107 ASSERT(config.cpu_active == 1);
108
[82da5f5]109 struct {
[a9ac978]110 int pagesize_code;
[82da5f5]111 size_t increment;
112 count_t count;
113 } sizemap[] = {
[2057572]114 { PAGESIZE_8K, 0, 1 }, /* 8K */
115 { PAGESIZE_8K, MMU_PAGE_SIZE, 2 }, /* 16K */
116 { PAGESIZE_8K, MMU_PAGE_SIZE, 4 }, /* 32K */
117 { PAGESIZE_64K, 0, 1}, /* 64K */
118 { PAGESIZE_64K, 8 * MMU_PAGE_SIZE, 2 }, /* 128K */
119 { PAGESIZE_64K, 8 * MMU_PAGE_SIZE, 4 }, /* 256K */
120 { PAGESIZE_512K, 0, 1 }, /* 512K */
121 { PAGESIZE_512K, 64 * MMU_PAGE_SIZE, 2 }, /* 1M */
122 { PAGESIZE_512K, 64 * MMU_PAGE_SIZE, 4 }, /* 2M */
123 { PAGESIZE_4M, 0, 1 }, /* 4M */
124 { PAGESIZE_4M, 512 * MMU_PAGE_SIZE, 2 } /* 8M */
[82da5f5]125 };
126
[2057572]127 ASSERT(ALIGN_UP(physaddr, MMU_PAGE_SIZE) == physaddr);
[771cd22]128 ASSERT(size <= 8 * 1024 * 1024);
[c1982e45]129
[2057572]130 if (size <= MMU_FRAME_SIZE)
[c1982e45]131 order = 0;
132 else
[2057572]133 order = (fnzb64(size - 1) + 1) - MMU_FRAME_WIDTH;
[82da5f5]134
[c6e314a]135 /*
136 * Use virtual addresses that are beyond the limit of physical memory.
137 * Thus, the physical address space will not be wasted by holes created
138 * by frame_alloc().
139 */
[79f119b9]140 ASSERT(PA2KA(last_frame));
[2057572]141 uintptr_t virtaddr = ALIGN_UP(PA2KA(last_frame),
142 1 << (order + FRAME_WIDTH));
143 last_frame = ALIGN_UP(KA2PA(virtaddr) + size,
144 1 << (order + FRAME_WIDTH));
[c6e314a]145
[a9ac978]146 for (i = 0; i < sizemap[order].count; i++) {
147 /*
148 * First, insert the mapping into DTLB.
149 */
[771cd22]150 dtlb_insert_mapping(virtaddr + i * sizemap[order].increment,
[2057572]151 physaddr + i * sizemap[order].increment,
152 sizemap[order].pagesize_code, true, false);
[a9ac978]153
[ae318d3]154#ifdef CONFIG_SMP
[a9ac978]155 /*
156 * Second, save the information about the mapping for APs.
157 */
[f8ddd17]158 bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].virt_page =
[2057572]159 virtaddr + i * sizemap[order].increment;
[f8ddd17]160 bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].phys_page =
[2057572]161 physaddr + i * sizemap[order].increment;
[f8ddd17]162 bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].pagesize_code =
[2057572]163 sizemap[order].pagesize_code;
[a9ac978]164 bsp_locked_dtlb_entries++;
165#endif
166 }
[c1982e45]167
168 return virtaddr;
169}
[b45c443]170
[9979acb]171void hw_area(void)
[ae318d3]172{
[9979acb]173 dev_area.pbase = end_frame;
174 dev_area.frames = SIZE2FRAMES(0x7ffffffffff - end_frame);
175 ddi_parea_register(&dev_area);
[ae318d3]176}
177
[c6e314a]178/** @}
[b45c443]179 */
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