source: mainline/kernel/arch/ppc32/src/exception.S@ 3061bc1

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 3061bc1 was 1b20da0, checked in by Jiří Zárevúcky <zarevucky.jiri@…>, 7 years ago

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1#
2# Copyright (c) 2006 Martin Decky
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29#include <abi/asmtool.h>
30#include <arch/asm/regname.h>
31#include <arch/msr.h>
32#include <arch/mm/page.h>
33#include <arch/istate_struct.h>
34#include <arch/stack.h>
35#include <align.h>
36
37.section K_UNMAPPED_TEXT_START, "ax"
38
39.macro CONTEXT_STORE
40
41 # save r12 in SPRG1, backup CR in r12
42 # save SP in SPRG2
43
44 mtsprg1 r12
45 mfcr r12
46 mtsprg2 sp
47
48 # check whether the previous mode was user or kernel
49
50 mfsrr1 sp # use sp as a temporary register to hold SRR1
51 andi. sp, sp, MSR_PR
52 bne 1f
53 # previous mode was kernel
54
55 mfsprg2 sp
56 subis sp, sp, 0x8000
57 b 2f
58
59 1:
60 # previous mode was user
61
62 mfsprg0 sp
63 2:
64
65 subi sp, sp, ALIGN_UP(ISTATE_SIZE, STACK_ALIGNMENT)
66 stw r0, ISTATE_OFFSET_R0(sp)
67 stw r2, ISTATE_OFFSET_R2(sp)
68 stw r3, ISTATE_OFFSET_R3(sp)
69 stw r4, ISTATE_OFFSET_R4(sp)
70 stw r5, ISTATE_OFFSET_R5(sp)
71 stw r6, ISTATE_OFFSET_R6(sp)
72 stw r7, ISTATE_OFFSET_R7(sp)
73 stw r8, ISTATE_OFFSET_R8(sp)
74 stw r9, ISTATE_OFFSET_R9(sp)
75 stw r10, ISTATE_OFFSET_R10(sp)
76 stw r11, ISTATE_OFFSET_R11(sp)
77 stw r13, ISTATE_OFFSET_R13(sp)
78 stw r14, ISTATE_OFFSET_R14(sp)
79 stw r15, ISTATE_OFFSET_R15(sp)
80 stw r16, ISTATE_OFFSET_R16(sp)
81 stw r17, ISTATE_OFFSET_R17(sp)
82 stw r18, ISTATE_OFFSET_R18(sp)
83 stw r19, ISTATE_OFFSET_R19(sp)
84 stw r20, ISTATE_OFFSET_R20(sp)
85 stw r21, ISTATE_OFFSET_R21(sp)
86 stw r22, ISTATE_OFFSET_R22(sp)
87 stw r23, ISTATE_OFFSET_R23(sp)
88 stw r24, ISTATE_OFFSET_R24(sp)
89 stw r25, ISTATE_OFFSET_R25(sp)
90 stw r26, ISTATE_OFFSET_R26(sp)
91 stw r27, ISTATE_OFFSET_R27(sp)
92 stw r28, ISTATE_OFFSET_R28(sp)
93 stw r29, ISTATE_OFFSET_R29(sp)
94 stw r30, ISTATE_OFFSET_R30(sp)
95 stw r31, ISTATE_OFFSET_R31(sp)
96
97 stw r12, ISTATE_OFFSET_CR(sp)
98
99 mfsrr0 r12
100 stw r12, ISTATE_OFFSET_PC(sp)
101
102 mfsrr1 r12
103 stw r12, ISTATE_OFFSET_SRR1(sp)
104
105 mflr r12
106 stw r12, ISTATE_OFFSET_LR(sp)
107
108 mfctr r12
109 stw r12, ISTATE_OFFSET_CTR(sp)
110
111 mfxer r12
112 stw r12, ISTATE_OFFSET_XER(sp)
113
114 mfdar r12
115 stw r12, ISTATE_OFFSET_DAR(sp)
116
117 mfsprg1 r12
118 stw r12, ISTATE_OFFSET_R12(sp)
119
120 mfsprg2 r12
121 stw r12, ISTATE_OFFSET_SP(sp)
122
123 li r12, 0
124 stw r12, ISTATE_OFFSET_LR_FRAME(sp)
125 stw r12, ISTATE_OFFSET_SP_FRAME(sp)
126.endm
127
128.org 0x100
129SYMBOL(exc_system_reset)
130 CONTEXT_STORE
131
132 li r3, 0
133 b jump_to_kernel
134
135.org 0x200
136SYMBOL(exc_machine_check)
137 CONTEXT_STORE
138
139 li r3, 1
140 b jump_to_kernel
141
142.org 0x300
143SYMBOL(exc_data_storage)
144 CONTEXT_STORE
145
146 li r3, 2
147 b jump_to_kernel
148
149.org 0x400
150SYMBOL(exc_instruction_storage)
151 CONTEXT_STORE
152
153 li r3, 3
154 b jump_to_kernel
155
156.org 0x500
157SYMBOL(exc_external)
158 CONTEXT_STORE
159
160 li r3, 4
161 b jump_to_kernel
162
163.org 0x600
164SYMBOL(exc_alignment)
165 CONTEXT_STORE
166
167 li r3, 5
168 b jump_to_kernel
169
170.org 0x700
171SYMBOL(exc_program)
172 CONTEXT_STORE
173
174 li r3, 6
175 b jump_to_kernel
176
177.org 0x800
178SYMBOL(exc_fp_unavailable)
179 CONTEXT_STORE
180
181 li r3, 7
182 b jump_to_kernel
183
184.org 0x900
185SYMBOL(exc_decrementer)
186 CONTEXT_STORE
187
188 li r3, 8
189 b jump_to_kernel
190
191.org 0xa00
192SYMBOL(exc_reserved0)
193 CONTEXT_STORE
194
195 li r3, 9
196 b jump_to_kernel
197
198.org 0xb00
199SYMBOL(exc_reserved1)
200 CONTEXT_STORE
201
202 li r3, 10
203 b jump_to_kernel
204
205.org 0xc00
206SYMBOL(exc_syscall)
207 CONTEXT_STORE
208
209 b jump_to_kernel_syscall
210
211.org 0xd00
212SYMBOL(exc_trace)
213 CONTEXT_STORE
214
215 li r3, 12
216 b jump_to_kernel
217
218.org 0x1000
219SYMBOL(exc_itlb_miss)
220 CONTEXT_STORE
221
222 li r3, 13
223 b jump_to_kernel
224
225.org 0x1100
226SYMBOL(exc_dtlb_miss_load)
227 CONTEXT_STORE
228
229 li r3, 14
230 b jump_to_kernel
231
232.org 0x1200
233SYMBOL(exc_dtlb_miss_store)
234 CONTEXT_STORE
235
236 li r3, 15
237 b jump_to_kernel
238
239.org 0x4000
240jump_to_kernel:
241 mfsrr1 r5
242 andi. r5, r5, MSR_PR
243 bne 1f
244 # Previous mode was kernel.
245 # We can construct a proper frame linkage.
246
247 mfsrr0 r12
248 stw r12, ISTATE_OFFSET_LR_FRAME(sp)
249 mfsprg2 r12
250 stw r12, ISTATE_OFFSET_SP_FRAME(sp)
251 1:
252
253 lis r12, iret@ha
254 addi r12, r12, iret@l
255 mtlr r12
256
257 lis r12, exc_dispatch@ha
258 addi r12, r12, exc_dispatch@l
259 mtsrr0 r12
260
261 mfmsr r12
262 mfsrr1 r5
263 andi. r5, r5, MSR_FP
264 or r12, r12, r5 # Propagate MSR_FP from SRR1 to MSR
265 ori r12, r12, (MSR_IR | MSR_DR)
266 mtsrr1 r12
267
268 addis sp, sp, 0x8000
269 mr r4, sp
270
271 rfi
272
273jump_to_kernel_syscall:
274 lis r12, syscall_handler@ha
275 addi r12, r12, syscall_handler@l
276 mtsrr0 r12
277
278 lis r12, iret_syscall@ha
279 addi r12, r12, iret_syscall@l
280 mtlr r12
281
282 mfsrr1 r0
283 andi. r0, r0, MSR_FP
284 mfmsr r12
285 or r12, r12, r0 # Propagate MSR_FP from SRR1 to MSR
286 ori r12, r12, (MSR_IR | MSR_DR | MSR_EE)
287 mtsrr1 r12
288
289 addis sp, sp, 0x8000
290 rfi
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