source: mainline/kernel/arch/mips32/src/mm/frame.c@ 232cd4f

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 232cd4f was 232cd4f, checked in by Jakub Jermar <jakub@…>, 13 years ago

Remove support for the lgxemul and bgxemul machines and GXemul drivers.
  • Property mode set to 100644
File size: 6.7 KB
Line 
1/*
2 * Copyright (c) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup mips32mm
30 * @{
31 */
32/** @file
33 */
34
35#include <macros.h>
36#include <arch/mm/frame.h>
37#include <arch/mm/tlb.h>
38#include <interrupt.h>
39#include <mm/frame.h>
40#include <mm/asid.h>
41#include <config.h>
42#include <arch/drivers/msim.h>
43#include <print.h>
44
45#define ZERO_PAGE_MASK TLB_PAGE_MASK_256K
46#define ZERO_FRAMES 2048
47#define ZERO_PAGE_WIDTH 18 /* 256K */
48#define ZERO_PAGE_SIZE (1 << ZERO_PAGE_WIDTH)
49#define ZERO_PAGE_ASID ASID_INVALID
50#define ZERO_PAGE_TLBI 0
51#define ZERO_PAGE_ADDR 0
52#define ZERO_PAGE_OFFSET (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1)
53#define ZERO_PAGE_VALUE (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET])
54
55#define ZERO_PAGE_VALUE_KSEG1(frame) \
56 (((volatile uint32_t *) (0xa0000000 + (frame << ZERO_PAGE_WIDTH)))[ZERO_PAGE_OFFSET])
57
58#define MAX_REGIONS 32
59
60typedef struct {
61 pfn_t start;
62 pfn_t count;
63} phys_region_t;
64
65static size_t phys_regions_count = 0;
66static phys_region_t phys_regions[MAX_REGIONS];
67
68/** Check whether frame is available
69 *
70 * Returns true if given frame is generally available for use.
71 * Returns false if given frame is used for physical memory
72 * mapped devices and cannot be used.
73 *
74 */
75static bool frame_available(pfn_t frame)
76{
77#ifdef MACHINE_msim
78 /* MSIM device (dprinter) */
79 if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH))
80 return false;
81
82 /* MSIM device (dkeyboard) */
83 if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH))
84 return false;
85#endif
86
87 return true;
88}
89
90
91/** Check whether frame is safe to write
92 *
93 * Returns true if given frame is safe for read/write test.
94 * Returns false if given frame should not be touched.
95 *
96 */
97static bool frame_safe(pfn_t frame)
98{
99 /* Kernel structures */
100 if ((frame << ZERO_PAGE_WIDTH) < KA2PA(config.base))
101 return false;
102
103 /* Kernel */
104 if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
105 KA2PA(config.base), config.kernel_size))
106 return false;
107
108 /* Kernel stack */
109 if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
110 KA2PA(config.stack_base), config.stack_size))
111 return false;
112
113 /* Init tasks */
114 bool safe = true;
115 size_t i;
116 for (i = 0; i < init.cnt; i++)
117 if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
118 init.tasks[i].paddr, init.tasks[i].size)) {
119 safe = false;
120 break;
121 }
122
123 return safe;
124}
125
126static void frame_add_region(pfn_t start_frame, pfn_t end_frame, bool low)
127{
128 if (end_frame <= start_frame)
129 return;
130
131 uintptr_t base = start_frame << ZERO_PAGE_WIDTH;
132 size_t size = (end_frame - start_frame) << ZERO_PAGE_WIDTH;
133
134 if (!frame_adjust_zone_bounds(low, &base, &size))
135 return;
136
137 pfn_t first = ADDR2PFN(base);
138 size_t count = SIZE2FRAMES(size);
139 pfn_t conf_frame;
140
141 if (low) {
142 /* Interrupt vector frame is blacklisted */
143 if (first == 0)
144 conf_frame = 1;
145 else
146 conf_frame = first;
147 zone_create(first, count, conf_frame,
148 ZONE_AVAILABLE | ZONE_LOWMEM);
149 } else {
150 conf_frame = zone_external_conf_alloc(count);
151 if (conf_frame != 0)
152 zone_create(first, count, conf_frame,
153 ZONE_AVAILABLE | ZONE_HIGHMEM);
154 }
155
156 if (phys_regions_count < MAX_REGIONS) {
157 phys_regions[phys_regions_count].start = first;
158 phys_regions[phys_regions_count].count = count;
159 phys_regions_count++;
160 }
161}
162
163
164/** Create memory zones
165 *
166 * Walk through available 256 KB chunks of physical
167 * memory and create zones.
168 *
169 * Note: It is assumed that the TLB is not yet being
170 * used in any way, thus there is no interference.
171 *
172 */
173void frame_low_arch_init(void)
174{
175 ipl_t ipl = interrupts_disable();
176
177 /* Clear and initialize TLB */
178 cp0_pagemask_write(ZERO_PAGE_MASK);
179 cp0_entry_lo0_write(0);
180 cp0_entry_lo1_write(0);
181 cp0_entry_hi_write(0);
182
183 size_t i;
184 for (i = 0; i < TLB_ENTRY_COUNT; i++) {
185 cp0_index_write(i);
186 tlbwi();
187 }
188
189 pfn_t start_frame = 0;
190 pfn_t frame;
191 bool avail = true;
192
193 /* Walk through all 1 MB frames */
194 for (frame = 0; frame < ZERO_FRAMES; frame++) {
195 if (!frame_available(frame))
196 avail = false;
197 else {
198 if (frame_safe(frame)) {
199 entry_lo_t lo0;
200 entry_lo_t lo1;
201 entry_hi_t hi;
202 tlb_prepare_entry_lo(&lo0, false, true, true, false, frame << (ZERO_PAGE_WIDTH - 12));
203 tlb_prepare_entry_lo(&lo1, false, false, false, false, 0);
204 tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR);
205
206 cp0_pagemask_write(ZERO_PAGE_MASK);
207 cp0_entry_lo0_write(lo0.value);
208 cp0_entry_lo1_write(lo1.value);
209 cp0_entry_hi_write(hi.value);
210 cp0_index_write(ZERO_PAGE_TLBI);
211 tlbwi();
212
213 ZERO_PAGE_VALUE = 0;
214 if (ZERO_PAGE_VALUE != 0)
215 avail = false;
216 else {
217 ZERO_PAGE_VALUE = 0xdeadbeef;
218 if (ZERO_PAGE_VALUE != 0xdeadbeef)
219 avail = false;
220 }
221 }
222 }
223
224 if (!avail) {
225 frame_add_region(start_frame, frame, true);
226 start_frame = frame + 1;
227 avail = true;
228 }
229 }
230
231 frame_add_region(start_frame, frame, true);
232
233 /* Blacklist interrupt vector frame */
234 frame_mark_unavailable(0, 1);
235
236 /* Cleanup */
237 cp0_pagemask_write(ZERO_PAGE_MASK);
238 cp0_entry_lo0_write(0);
239 cp0_entry_lo1_write(0);
240 cp0_entry_hi_write(0);
241 cp0_index_write(ZERO_PAGE_TLBI);
242 tlbwi();
243
244 interrupts_restore(ipl);
245}
246
247void frame_high_arch_init(void)
248{
249}
250
251void physmem_print(void)
252{
253 printf("[base ] [size ]\n");
254
255 size_t i;
256 for (i = 0; i < phys_regions_count; i++) {
257 printf("%#010x %10u\n",
258 PFN2ADDR(phys_regions[i].start), PFN2ADDR(phys_regions[i].count));
259 }
260}
261
262/** @}
263 */
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