| 1 | #
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| 2 | # Copyright (c) 2005 Martin Decky
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| 3 | # All rights reserved.
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| 4 | #
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| 5 | # Redistribution and use in source and binary forms, with or without
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| 6 | # modification, are permitted provided that the following conditions
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| 7 | # are met:
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| 8 | #
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| 9 | # - Redistributions of source code must retain the above copyright
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| 10 | # notice, this list of conditions and the following disclaimer.
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| 11 | # - Redistributions in binary form must reproduce the above copyright
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| 12 | # notice, this list of conditions and the following disclaimer in the
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| 13 | # documentation and/or other materials provided with the distribution.
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| 14 | # - The name of the author may not be used to endorse or promote products
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| 15 | # derived from this software without specific prior written permission.
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| 16 | #
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| 17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | #
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| 28 |
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| 29 | arch_src += files(
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| 30 | 'src/start.S',
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| 31 | 'src/context.S',
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| 32 | 'src/mips32.c',
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| 33 | 'src/asm.S',
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| 34 | 'src/exception.c',
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| 35 | 'src/interrupt.c',
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| 36 | 'src/cache.c',
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| 37 | 'src/debugger.c',
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| 38 | 'src/cpu/cpu.c',
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| 39 | 'src/debug/stacktrace.c',
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| 40 | 'src/debug/stacktrace_asm.S',
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| 41 | 'src/mm/km.c',
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| 42 | 'src/mm/frame.c',
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| 43 | 'src/mm/page.c',
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| 44 | 'src/mm/tlb.c',
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| 45 | 'src/mm/as.c',
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| 46 | 'src/fpu_context.c',
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| 47 | 'src/smc.c',
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| 48 | 'src/smp/smp.c',
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| 49 | 'src/machine_func.c',
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| 50 | )
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| 51 |
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| 52 | if MACHINE == 'lmalta' or MACHINE == 'bmalta'
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| 53 | arch_src += files('src/mach/malta/malta.c')
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| 54 |
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| 55 | elif MACHINE == 'msim'
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| 56 | arch_src += files(
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| 57 | 'src/mach/msim/msim.c',
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| 58 | 'src/mach/msim/dorder.c',
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| 59 | )
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| 60 |
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| 61 | endif
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| 62 |
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| 63 |
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| 64 | _check_headers = [
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| 65 | 'include/arch/istate_struct.h',
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| 66 | 'include/arch/context_struct.h',
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| 67 | 'include/arch/fpu_context_struct.h',
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| 68 | ]
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| 69 |
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| 70 | foreach h : _check_headers
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| 71 | arch_src += [ autocheck.process(h) ]
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| 72 | endforeach
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