[30ef8ce] | 1 | #
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[df4ed85] | 2 | # Copyright (c) 2005 Jakub Jermar
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[30ef8ce] | 3 | # All rights reserved.
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| 4 | #
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| 5 | # Redistribution and use in source and binary forms, with or without
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| 6 | # modification, are permitted provided that the following conditions
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| 7 | # are met:
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| 8 | #
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| 9 | # - Redistributions of source code must retain the above copyright
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| 10 | # notice, this list of conditions and the following disclaimer.
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| 11 | # - Redistributions in binary form must reproduce the above copyright
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| 12 | # notice, this list of conditions and the following disclaimer in the
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| 13 | # documentation and/or other materials provided with the distribution.
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| 14 | # - The name of the author may not be used to endorse or promote products
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| 15 | # derived from this software without specific prior written permission.
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| 16 | #
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| 17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | #
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| 28 |
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[802bb95] | 29 | #include <arch/register.h>
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[5ac2e61] | 30 | #include <arch/mm/page.h>
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| 31 | #include <arch/mm/asid.h>
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| 32 | #include <mm/asid.h>
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| 33 |
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[5bda2f3e] | 34 | #define RR_MASK (0xFFFFFFFF00000002)
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| 35 | #define RID_SHIFT 8
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| 36 | #define PS_SHIFT 2
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[7208b6c] | 37 |
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[5bda2f3e] | 38 | #define KERNEL_TRANSLATION_I 0x0010000000000661
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| 39 | #define KERNEL_TRANSLATION_D 0x0010000000000661
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| 40 | #define KERNEL_TRANSLATION_VIO 0x0010000000000671
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| 41 | #define KERNEL_TRANSLATION_IO 0x00100FFFFC000671
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| 42 | #define KERNEL_TRANSLATION_FW 0x00100000F0000671
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[5ac2e61] | 43 |
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[9faddb3] | 44 | .section K_TEXT_START, "ax"
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[00a44bc] | 45 |
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[30ef8ce] | 46 | .global kernel_image_start
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| 47 |
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[2217ac3] | 48 | stack0:
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[30ef8ce] | 49 | kernel_image_start:
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[7f1bfce] | 50 | .auto
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[5bda2f3e] | 51 |
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[7208b6c] | 52 | mov psr.l = r0
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| 53 | srlz.i
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| 54 | srlz.d
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[5bda2f3e] | 55 |
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[481c520] | 56 | # Fill TR.i and TR.d using Region Register #VRN_KERNEL
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[5bda2f3e] | 57 |
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[15819e37] | 58 | movl r8 = (VRN_KERNEL << VRN_SHIFT)
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| 59 | mov r9 = rr[r8]
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[5bda2f3e] | 60 |
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[15819e37] | 61 | movl r10 = (RR_MASK)
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| 62 | and r9 = r10, r9
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[d9ee2ea] | 63 | movl r10 = (((RID_KERNEL7) << RID_SHIFT) | (KERNEL_PAGE_WIDTH << PS_SHIFT))
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[5bda2f3e] | 64 | or r9 = r10, r9
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| 65 |
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[15819e37] | 66 | mov rr[r8] = r9
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[5bda2f3e] | 67 |
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[15819e37] | 68 | movl r8 = (VRN_KERNEL << VRN_SHIFT)
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| 69 | mov cr.ifa = r8
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[5bda2f3e] | 70 |
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[acee917] | 71 | mov r11 = cr.itir
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| 72 | movl r10 = (KERNEL_PAGE_WIDTH << PS_SHIFT)
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| 73 | or r10 = r10, r11
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| 74 | mov cr.itir = r10
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[5bda2f3e] | 75 |
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[15819e37] | 76 | movl r10 = (KERNEL_TRANSLATION_I)
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| 77 | itr.i itr[r0] = r10
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| 78 | movl r10 = (KERNEL_TRANSLATION_D)
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| 79 | itr.d dtr[r0] = r10
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[5bda2f3e] | 80 |
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[7208b6c] | 81 | movl r7 = 1
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| 82 | movl r8 = (VRN_KERNEL << VRN_SHIFT) | VIO_OFFSET
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| 83 | mov cr.ifa = r8
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| 84 | movl r10 = (KERNEL_TRANSLATION_VIO)
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| 85 | itr.d dtr[r7] = r10
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[5bda2f3e] | 86 |
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[acee917] | 87 | mov r11 = cr.itir
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| 88 | movl r10 = ~0xfc
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| 89 | and r10 = r10, r11
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| 90 | movl r11 = (IO_PAGE_WIDTH << PS_SHIFT)
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| 91 | or r10 = r10, r11
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| 92 | mov cr.itir = r10
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[5bda2f3e] | 93 |
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[7208b6c] | 94 | movl r7 = 2
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| 95 | movl r8 = (VRN_KERNEL << VRN_SHIFT) | IO_OFFSET
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| 96 | mov cr.ifa = r8
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| 97 | movl r10 = (KERNEL_TRANSLATION_IO)
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| 98 | itr.d dtr[r7] = r10
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[5bda2f3e] | 99 |
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| 100 | # Setup mapping for firmware area (also SAPIC)
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| 101 |
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[acee917] | 102 | mov r11 = cr.itir
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| 103 | movl r10 = ~0xfc
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| 104 | and r10 = r10, r11
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| 105 | movl r11 = (FW_PAGE_WIDTH << PS_SHIFT)
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| 106 | or r10 = r10, r11
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| 107 | mov cr.itir = r10
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[5bda2f3e] | 108 |
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[59e4864] | 109 | movl r7 = 3
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| 110 | movl r8 = (VRN_KERNEL << VRN_SHIFT) | FW_OFFSET
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| 111 | mov cr.ifa = r8
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| 112 | movl r10 = (KERNEL_TRANSLATION_FW)
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| 113 | itr.d dtr[r7] = r10
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[5bda2f3e] | 114 |
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[93d66ef] | 115 | # Initialize DSR
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| 116 |
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| 117 | movl r10 = (DCR_DP_MASK | DCR_DK_MASK | DCR_DX_MASK | DCR_DR_MASK | DCR_DA_MASK | DCR_DD_MASK | DCR_LC_MASK)
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| 118 | mov r9 = cr.dcr
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| 119 | or r10 = r10, r9
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| 120 | mov cr.dcr = r10
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| 121 |
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[666773c] | 122 | # Initialize PSR
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[5bda2f3e] | 123 |
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[15819e37] | 124 | movl r10 = (PSR_DT_MASK | PSR_RT_MASK | PSR_IT_MASK | PSR_IC_MASK) /* Enable paging */
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| 125 | mov r9 = psr
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[5bda2f3e] | 126 |
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[15819e37] | 127 | or r10 = r10, r9
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| 128 | mov cr.ipsr = r10
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| 129 | mov cr.ifs = r0
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| 130 | movl r8 = paging_start
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| 131 | mov cr.iip = r8
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[802bb95] | 132 | srlz.d
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[5ac2e61] | 133 | srlz.i
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[5bda2f3e] | 134 |
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[481c520] | 135 | .explicit
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[5bda2f3e] | 136 |
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[481c520] | 137 | /*
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[0e56eb1a] | 138 | * Return From Interrupt is the only way to
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| 139 | * fill the upper half word of PSR.
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[481c520] | 140 | */
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[acee917] | 141 | rfi ;;
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[085434a] | 142 |
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| 143 | .global paging_start
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| 144 | paging_start:
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[5bda2f3e] | 145 |
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[481c520] | 146 | /*
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| 147 | * Now we are paging.
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| 148 | */
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[5bda2f3e] | 149 |
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[666773c] | 150 | # Switch to register bank 1
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[802bb95] | 151 | bsw.1
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[5bda2f3e] | 152 |
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[666773c] | 153 | # Initialize register stack
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[7f1bfce] | 154 | mov ar.rsc = r0
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[15819e37] | 155 | movl r8 = (VRN_KERNEL << VRN_SHIFT) ;;
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[5ac2e61] | 156 | mov ar.bspstore = r8
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[7f1bfce] | 157 | loadrs
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[5bda2f3e] | 158 |
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[666773c] | 159 | # Initialize memory stack to some sane value
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[15819e37] | 160 | movl r12 = stack0 ;;
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[5bda2f3e] | 161 | add r12 = -16, r12 /* allocate a scratch area on the stack */
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| 162 |
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[666773c] | 163 | # Initialize gp (Global Pointer) register
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[5bda2f3e] | 164 | movl r20 = (VRN_KERNEL << VRN_SHIFT) ;;
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| 165 | or r20 = r20, r1 ;;
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[19b5929] | 166 | movl r1 = kernel_image_start
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[7a9364c] | 167 |
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[481c520] | 168 | /*
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[19b5929] | 169 | * Initialize bootinfo on BSP.
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[481c520] | 170 | */
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[e5c1186] | 171 | addl r21 = @gprel(bootinfo), gp ;;
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| 172 | st8 [r21] = r20
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[5bda2f3e] | 173 |
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[15819e37] | 174 | ssm (1 << 19) ;; /* Disable f32 - f127 */
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| 175 | srlz.i
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| 176 | srlz.d ;;
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[5bda2f3e] | 177 |
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[6ecc8bce] | 178 | br.call.sptk.many b0 = arch_pre_main
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[fae1647] | 179 | 0:
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| 180 | br.call.sptk.many b0 = main_bsp
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[2a0047fc] | 181 | 0:
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[47d78c6] | 182 | br 0b
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