source: mainline/kernel/arch/ia64/src/mm/page.c

Last change on this file was bab75df6, checked in by Jiri Svoboda <jiri@…>, 7 years ago

Let kernel code get printf via the standard stdio header. Clean up unused includes.

  • Property mode set to 100644
File size: 6.3 KB
Line 
1/*
2 * Copyright (c) 2006 Jakub Jermar
3 * Copyright (c) 2006 Jakub Vana
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30/** @addtogroup kernel_ia64_mm
31 * @{
32 */
33/** @file
34 */
35
36#include <arch/mm/page.h>
37#include <assert.h>
38#include <genarch/mm/page_ht.h>
39#include <mm/asid.h>
40#include <arch/mm/asid.h>
41#include <arch/mm/vhpt.h>
42#include <typedefs.h>
43#include <mm/page.h>
44#include <mm/frame.h>
45#include <config.h>
46#include <panic.h>
47#include <arch/asm.h>
48#include <barrier.h>
49#include <align.h>
50
51static void set_environment(void);
52
53/** Initialize ia64 virtual address translation subsystem. */
54void page_arch_init(void)
55{
56 page_mapping_operations = &ht_mapping_operations;
57 pk_disable();
58 set_environment();
59}
60
61/** Initialize VHPT and region registers. */
62void set_environment(void)
63{
64 region_register_t rr;
65 pta_register_t pta;
66 int i;
67#ifdef CONFIG_VHPT
68 uintptr_t vhpt_base;
69#endif
70
71 /*
72 * Set up kernel region registers.
73 * VRN_KERNEL has already been set in start.S.
74 * For paranoia reasons, we set it again.
75 */
76 for (i = 0; i < REGION_REGISTERS; i++) {
77 rr.word = rr_read(i);
78 rr.map.ve = 0; /* disable VHPT walker */
79 rr.map.rid = ASID2RID(ASID_KERNEL, i);
80 rr.map.ps = PAGE_WIDTH;
81 rr_write(i, rr.word);
82 srlz_i();
83 srlz_d();
84 }
85
86#ifdef CONFIG_VHPT
87 vhpt_base = vhpt_set_up();
88#endif
89 /*
90 * Set up PTA register.
91 */
92 pta.word = pta_read();
93#ifndef CONFIG_VHPT
94 pta.map.ve = 0; /* disable VHPT walker */
95 pta.map.base = 0 >> PTA_BASE_SHIFT;
96#else
97 pta.map.ve = 1; /* enable VHPT walker */
98 pta.map.base = vhpt_base >> PTA_BASE_SHIFT;
99#endif
100 pta.map.vf = 1; /* large entry format */
101 pta.map.size = VHPT_WIDTH;
102 pta_write(pta.word);
103 srlz_i();
104 srlz_d();
105}
106
107/** Calculate address of collision chain from VPN and ASID.
108 *
109 * Interrupts must be disabled.
110 *
111 * @param page Address of virtual page including VRN bits.
112 * @param asid Address space identifier.
113 *
114 * @return VHPT entry address.
115 */
116vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid)
117{
118 region_register_t rr_save, rr;
119 size_t vrn;
120 rid_t rid;
121 vhpt_entry_t *v;
122
123 vrn = page >> VRN_SHIFT;
124 rid = ASID2RID(asid, vrn);
125
126 rr_save.word = rr_read(vrn);
127 if (rr_save.map.rid == rid) {
128 /*
129 * The RID is already in place, compute thash and return.
130 */
131 v = (vhpt_entry_t *) thash(page);
132 return v;
133 }
134
135 /*
136 * The RID must be written to some region register.
137 * To speed things up, register indexed by vrn is used.
138 */
139 rr.word = rr_save.word;
140 rr.map.rid = rid;
141 rr_write(vrn, rr.word);
142 srlz_i();
143 v = (vhpt_entry_t *) thash(page);
144 rr_write(vrn, rr_save.word);
145 srlz_i();
146 srlz_d();
147
148 return v;
149}
150
151/** Compare ASID and VPN against PTE.
152 *
153 * Interrupts must be disabled.
154 *
155 * @param page Address of virtual page including VRN bits.
156 * @param asid Address space identifier.
157 *
158 * @return True if page and asid match the page and asid of t,
159 * false otherwise.
160 */
161bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v)
162{
163 region_register_t rr_save, rr;
164 size_t vrn;
165 rid_t rid;
166 bool match;
167
168 assert(v);
169
170 vrn = page >> VRN_SHIFT;
171 rid = ASID2RID(asid, vrn);
172
173 rr_save.word = rr_read(vrn);
174 if (rr_save.map.rid == rid) {
175 /*
176 * The RID is already in place, compare ttag with t and return.
177 */
178 return ttag(page) == v->present.tag.tag_word;
179 }
180
181 /*
182 * The RID must be written to some region register.
183 * To speed things up, register indexed by vrn is used.
184 */
185 rr.word = rr_save.word;
186 rr.map.rid = rid;
187 rr_write(vrn, rr.word);
188 srlz_i();
189 match = (ttag(page) == v->present.tag.tag_word);
190 rr_write(vrn, rr_save.word);
191 srlz_i();
192 srlz_d();
193
194 return match;
195}
196
197/** Set up one VHPT entry.
198 *
199 * @param v VHPT entry to be set up.
200 * @param page Virtual address of the page mapped by the entry.
201 * @param asid Address space identifier of the address space to which
202 * page belongs.
203 * @param frame Physical address of the frame to wich page is mapped.
204 * @param flags Different flags for the mapping.
205 */
206void
207vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame,
208 int flags)
209{
210 region_register_t rr_save, rr;
211 size_t vrn;
212 rid_t rid;
213 uint64_t tag;
214
215 assert(v);
216
217 vrn = page >> VRN_SHIFT;
218 rid = ASID2RID(asid, vrn);
219
220 /*
221 * Compute ttag.
222 */
223 rr_save.word = rr_read(vrn);
224 rr.word = rr_save.word;
225 rr.map.rid = rid;
226 rr_write(vrn, rr.word);
227 srlz_i();
228 tag = ttag(page);
229 rr_write(vrn, rr_save.word);
230 srlz_i();
231 srlz_d();
232
233 /*
234 * Clear the entry.
235 */
236 v->word[0] = 0;
237 v->word[1] = 0;
238 v->word[2] = 0;
239 v->word[3] = 0;
240
241 v->present.p = true;
242 v->present.ma = (flags & PAGE_CACHEABLE) ?
243 MA_WRITEBACK : MA_UNCACHEABLE;
244 v->present.a = false; /* not accessed */
245 v->present.d = false; /* not dirty */
246 v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL;
247 v->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ;
248 v->present.ar |= (flags & PAGE_EXEC) ? AR_EXECUTE : 0;
249 v->present.ppn = frame >> PPN_SHIFT;
250 v->present.ed = false; /* exception not deffered */
251 v->present.ps = PAGE_WIDTH;
252 v->present.key = 0;
253 v->present.tag.tag_word = tag;
254}
255
256/** @}
257 */
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