source: mainline/kernel/arch/ia64/src/ia64.c@ 4dee0cb

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 4dee0cb was 32817cc, checked in by Jakub Jermar <jakub@…>, 14 years ago

Make the kernel ready for init tasks loaded to high memory.

  • Property mode set to 100644
File size: 7.5 KB
Line 
1/*
2 * Copyright (c) 2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ia64
30 * @{
31 */
32/** @file
33 */
34
35#include <arch.h>
36#include <typedefs.h>
37#include <errno.h>
38#include <interrupt.h>
39#include <macros.h>
40#include <str.h>
41#include <userspace.h>
42#include <console/console.h>
43#include <syscall/syscall.h>
44#include <sysinfo/sysinfo.h>
45#include <arch/drivers/it.h>
46#include <arch/drivers/kbd.h>
47#include <arch/legacyio.h>
48#include <genarch/drivers/ega/ega.h>
49#include <genarch/drivers/i8042/i8042.h>
50#include <genarch/drivers/ns16550/ns16550.h>
51#include <genarch/drivers/legacy/ia32/io.h>
52#include <genarch/kbrd/kbrd.h>
53#include <genarch/srln/srln.h>
54#include <mm/page.h>
55
56#ifdef MACHINE_ski
57#include <arch/drivers/ski.h>
58#endif
59
60/* NS16550 as a COM 1 */
61#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
62
63bootinfo_t *bootinfo;
64
65static uint64_t iosapic_base = 0xfec00000;
66uintptr_t legacyio_virt_base = 0;
67
68/** Performs ia64-specific initialization before main_bsp() is called. */
69void arch_pre_main(void)
70{
71 init.cnt = min3(bootinfo->taskmap.cnt, TASKMAP_MAX_RECORDS,
72 CONFIG_INIT_TASKS);
73 size_t i;
74
75 for (i = 0; i < init.cnt; i++) {
76 init.tasks[i].paddr =
77 (uintptr_t) bootinfo->taskmap.tasks[i].addr;
78 init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
79 str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
80 bootinfo->taskmap.tasks[i].name);
81 }
82}
83
84void arch_pre_mm_init(void)
85{
86}
87
88static void iosapic_init(void)
89{
90 uintptr_t IOSAPIC = hw_map(iosapic_base, PAGE_SIZE);
91 int i;
92
93 int myid, myeid;
94
95 myid = ia64_get_cpu_id();
96 myeid = ia64_get_cpu_eid();
97
98 for (i = 0; i < 16; i++) {
99 if (i == 2)
100 continue; /* Disable Cascade interrupt */
101 ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
102 srlz_d();
103 ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
104 srlz_d();
105 ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
106 srlz_d();
107 ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
108 myeid << (48 - 32);
109 srlz_d();
110 }
111
112}
113
114void arch_post_mm_init(void)
115{
116 if (config.cpu_active == 1) {
117 /* Map the page with legacy I/O. */
118 legacyio_virt_base = hw_map(LEGACYIO_PHYS_BASE, LEGACYIO_SIZE);
119
120 iosapic_init();
121 irq_init(INR_COUNT, INR_COUNT);
122 }
123 it_init();
124}
125
126void arch_post_cpu_init(void){
127}
128
129void arch_pre_smp_init(void)
130{
131}
132
133void arch_post_smp_init(void)
134{
135 static const char *platform;
136
137 /* Set platform name. */
138#ifdef MACHINE_ski
139 platform = "ski";
140#endif
141#ifdef MACHINE_i460GX
142 platform = "i460GX";
143#endif
144 sysinfo_set_item_data("platform", NULL, (void *) platform,
145 str_size(platform));
146
147#ifdef MACHINE_ski
148 ski_instance_t *ski_instance = skiin_init();
149 if (ski_instance) {
150 srln_instance_t *srln_instance = srln_init();
151 if (srln_instance) {
152 indev_t *sink = stdin_wire();
153 indev_t *srln = srln_wire(srln_instance, sink);
154 skiin_wire(ski_instance, srln);
155 }
156 }
157
158 outdev_t *skidev = skiout_init();
159 if (skidev)
160 stdout_wire(skidev);
161#endif
162
163#ifdef CONFIG_EGA
164 outdev_t *egadev = ega_init(EGA_BASE, EGA_VIDEORAM);
165 if (egadev)
166 stdout_wire(egadev);
167#endif
168
169#ifdef CONFIG_NS16550
170 ns16550_instance_t *ns16550_instance
171 = ns16550_init((ns16550_t *) NS16550_BASE, NS16550_IRQ, NULL, NULL);
172 if (ns16550_instance) {
173 srln_instance_t *srln_instance = srln_init();
174 if (srln_instance) {
175 indev_t *sink = stdin_wire();
176 indev_t *srln = srln_wire(srln_instance, sink);
177 ns16550_wire(ns16550_instance, srln);
178 }
179 }
180
181 sysinfo_set_item_val("kbd", NULL, true);
182 sysinfo_set_item_val("kbd.inr", NULL, NS16550_IRQ);
183 sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
184 sysinfo_set_item_val("kbd.address.physical", NULL,
185 (uintptr_t) NS16550_BASE);
186 sysinfo_set_item_val("kbd.address.kernel", NULL,
187 (uintptr_t) NS16550_BASE);
188#endif
189
190#ifdef CONFIG_I8042
191 i8042_instance_t *i8042_instance = i8042_init((i8042_t *) I8042_BASE, IRQ_KBD);
192 if (i8042_instance) {
193 kbrd_instance_t *kbrd_instance = kbrd_init();
194 if (kbrd_instance) {
195 indev_t *sink = stdin_wire();
196 indev_t *kbrd = kbrd_wire(kbrd_instance, sink);
197 i8042_wire(i8042_instance, kbrd);
198 }
199 }
200
201 sysinfo_set_item_val("i8042", NULL, true);
202 sysinfo_set_item_val("i8042.inr_a", NULL, IRQ_KBD);
203 sysinfo_set_item_val("i8042.inr_b", NULL, IRQ_MOUSE);
204 sysinfo_set_item_val("i8042.address.physical", NULL,
205 (uintptr_t) I8042_BASE);
206 sysinfo_set_item_val("i8042.address.kernel", NULL,
207 (uintptr_t) I8042_BASE);
208#endif
209
210 sysinfo_set_item_val("netif.ne2000.inr", NULL, IRQ_NE2000);
211
212 sysinfo_set_item_val("ia64_iospace", NULL, true);
213 sysinfo_set_item_val("ia64_iospace.address", NULL, true);
214 sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, LEGACYIO_USER_BASE);
215}
216
217
218/** Enter userspace and never return. */
219void userspace(uspace_arg_t *kernel_uarg)
220{
221 psr_t psr;
222 rsc_t rsc;
223
224 psr.value = psr_read();
225 psr.cpl = PL_USER;
226 psr.i = true; /* start with interrupts enabled */
227 psr.ic = true;
228 psr.ri = 0; /* start with instruction #0 */
229 psr.bn = 1; /* start in bank 0 */
230
231 asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
232 rsc.loadrs = 0;
233 rsc.be = false;
234 rsc.pl = PL_USER;
235 rsc.mode = 3; /* eager mode */
236
237 /*
238 * Switch to userspace.
239 *
240 * When calculating stack addresses, mind the stack split between the
241 * memory stack and the RSE stack. Each occuppies STACK_SIZE / 2 bytes.
242 */
243 switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
244 ((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE / 2 -
245 ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
246 ((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE / 2,
247 (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
248
249 while (1)
250 ;
251}
252
253/** Set thread-local-storage pointer.
254 *
255 * We use r13 (a.k.a. tp) for this purpose.
256 */
257sysarg_t sys_tls_set(uintptr_t addr)
258{
259 return EOK;
260}
261
262void arch_reboot(void)
263{
264 pio_write_8((ioport8_t *)0x64, 0xfe);
265 while (1);
266}
267
268/** Construct function pointer
269 *
270 * @param fptr function pointer structure
271 * @param addr function address
272 * @param caller calling function address
273 *
274 * @return address of the function pointer
275 *
276 */
277void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
278{
279 fptr->fnc = (sysarg_t) addr;
280 fptr->gp = ((sysarg_t *) caller)[1];
281
282 return (void *) fptr;
283}
284
285void irq_initialize_arch(irq_t *irq)
286{
287 (void) irq;
288}
289
290/** @}
291 */
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