| 1 | /*
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| 2 | * Copyright (c) 2005 Jakub Jermar
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| 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | /** @addtogroup ia64
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| 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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| 35 | #include <arch.h>
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| 36 | #include <arch/drivers/ski.h>
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| 37 | #include <arch/drivers/it.h>
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| 38 | #include <arch/interrupt.h>
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| 39 | #include <arch/barrier.h>
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| 40 | #include <arch/asm.h>
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| 41 | #include <arch/register.h>
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| 42 | #include <typedefs.h>
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| 43 | #include <arch/context.h>
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| 44 | #include <arch/stack.h>
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| 45 | #include <arch/mm/page.h>
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| 46 | #include <interrupt.h>
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| 47 | #include <mm/as.h>
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| 48 | #include <config.h>
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| 49 | #include <macros.h>
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| 50 | #include <userspace.h>
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| 51 | #include <console/console.h>
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| 52 | #include <abi/proc/uarg.h>
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| 53 | #include <syscall/syscall.h>
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| 54 | #include <ddi/irq.h>
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| 55 | #include <arch/bootinfo.h>
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| 56 | #include <genarch/drivers/legacy/ia32/io.h>
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| 57 | #include <genarch/drivers/ega/ega.h>
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| 58 | #include <genarch/kbrd/kbrd.h>
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| 59 | #include <genarch/srln/srln.h>
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| 60 | #include <genarch/drivers/i8042/i8042.h>
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| 61 | #include <genarch/drivers/ns16550/ns16550.h>
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| 62 | #include <arch/drivers/kbd.h>
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| 63 | #include <smp/smp.h>
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| 64 | #include <smp/ipi.h>
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| 65 | #include <arch/atomic.h>
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| 66 | #include <panic.h>
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| 67 | #include <print.h>
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| 68 | #include <sysinfo/sysinfo.h>
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| 69 | #include <str.h>
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| 70 |
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| 71 | /* NS16550 as a COM 1 */
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| 72 | #define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
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| 73 |
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| 74 | bootinfo_t *bootinfo;
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| 75 |
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| 76 | static uint64_t iosapic_base = 0xfec00000;
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| 77 |
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| 78 | /** Performs ia64-specific initialization before main_bsp() is called. */
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| 79 | void arch_pre_main(void)
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| 80 | {
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| 81 | init.cnt = min3(bootinfo->taskmap.cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS);
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| 82 | size_t i;
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| 83 | for (i = 0; i < init.cnt; i++) {
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| 84 | init.tasks[i].addr =
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| 85 | ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
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| 86 | VRN_MASK;
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| 87 | init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
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| 88 | str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
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| 89 | bootinfo->taskmap.tasks[i].name);
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| 90 | }
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| 91 | }
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| 92 |
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| 93 | void arch_pre_mm_init(void)
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| 94 | {
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| 95 | }
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| 96 |
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| 97 | static void iosapic_init(void)
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| 98 | {
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| 99 | uint64_t IOSAPIC = PA2KA((sysarg_t)(iosapic_base)) | FW_OFFSET;
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| 100 | int i;
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| 101 |
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| 102 | int myid, myeid;
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| 103 |
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| 104 | myid = ia64_get_cpu_id();
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| 105 | myeid = ia64_get_cpu_eid();
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| 106 |
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| 107 | for (i = 0; i < 16; i++) {
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| 108 | if (i == 2)
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| 109 | continue; /* Disable Cascade interrupt */
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| 110 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
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| 111 | srlz_d();
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| 112 | ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
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| 113 | srlz_d();
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| 114 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
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| 115 | srlz_d();
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| 116 | ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
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| 117 | myeid << (48 - 32);
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| 118 | srlz_d();
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| 119 | }
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| 120 |
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| 121 | }
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| 122 |
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| 123 | void arch_post_mm_init(void)
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| 124 | {
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| 125 | if (config.cpu_active == 1) {
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| 126 | iosapic_init();
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| 127 | irq_init(INR_COUNT, INR_COUNT);
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| 128 | }
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| 129 | it_init();
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| 130 | }
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| 131 |
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| 132 | void arch_post_cpu_init(void)
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| 133 | {
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| 134 | }
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| 135 |
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| 136 | void arch_pre_smp_init(void)
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| 137 | {
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| 138 | }
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| 139 |
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| 140 | void arch_post_smp_init(void)
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| 141 | {
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| 142 | static const char *platform;
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| 143 |
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| 144 | /* Set platform name. */
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| 145 | #ifdef MACHINE_ski
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| 146 | platform = "ski";
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| 147 | #endif
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| 148 | #ifdef MACHINE_i460GX
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| 149 | platform = "i460GX";
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| 150 | #endif
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| 151 | sysinfo_set_item_data("platform", NULL, (void *) platform,
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| 152 | str_size(platform));
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| 153 |
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| 154 | #ifdef MACHINE_ski
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| 155 | ski_instance_t *ski_instance = skiin_init();
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| 156 | if (ski_instance) {
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| 157 | srln_instance_t *srln_instance = srln_init();
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| 158 | if (srln_instance) {
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| 159 | indev_t *sink = stdin_wire();
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| 160 | indev_t *srln = srln_wire(srln_instance, sink);
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| 161 | skiin_wire(ski_instance, srln);
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| 162 | }
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| 163 | }
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| 164 |
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| 165 | outdev_t *skidev = skiout_init();
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| 166 | if (skidev)
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| 167 | stdout_wire(skidev);
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| 168 | #endif
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| 169 |
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| 170 | #ifdef CONFIG_EGA
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| 171 | outdev_t *egadev = ega_init(EGA_BASE, EGA_VIDEORAM);
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| 172 | if (egadev)
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| 173 | stdout_wire(egadev);
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| 174 | #endif
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| 175 |
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| 176 | #ifdef CONFIG_NS16550
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| 177 | ns16550_instance_t *ns16550_instance
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| 178 | = ns16550_init((ns16550_t *) NS16550_BASE, NS16550_IRQ, NULL, NULL);
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| 179 | if (ns16550_instance) {
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| 180 | srln_instance_t *srln_instance = srln_init();
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| 181 | if (srln_instance) {
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| 182 | indev_t *sink = stdin_wire();
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| 183 | indev_t *srln = srln_wire(srln_instance, sink);
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| 184 | ns16550_wire(ns16550_instance, srln);
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| 185 | }
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| 186 | }
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| 187 |
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| 188 | sysinfo_set_item_val("kbd", NULL, true);
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| 189 | sysinfo_set_item_val("kbd.inr", NULL, NS16550_IRQ);
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| 190 | sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
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| 191 | sysinfo_set_item_val("kbd.address.physical", NULL,
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| 192 | (uintptr_t) NS16550_BASE);
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| 193 | sysinfo_set_item_val("kbd.address.kernel", NULL,
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| 194 | (uintptr_t) NS16550_BASE);
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| 195 | #endif
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| 196 |
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| 197 | #ifdef CONFIG_I8042
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| 198 | i8042_instance_t *i8042_instance = i8042_init((i8042_t *) I8042_BASE, IRQ_KBD);
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| 199 | if (i8042_instance) {
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| 200 | kbrd_instance_t *kbrd_instance = kbrd_init();
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| 201 | if (kbrd_instance) {
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| 202 | indev_t *sink = stdin_wire();
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| 203 | indev_t *kbrd = kbrd_wire(kbrd_instance, sink);
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| 204 | i8042_wire(i8042_instance, kbrd);
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| 205 | }
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| 206 | }
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| 207 |
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| 208 | sysinfo_set_item_val("i8042", NULL, true);
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| 209 | sysinfo_set_item_val("i8042.inr_a", NULL, IRQ_KBD);
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| 210 | sysinfo_set_item_val("i8042.inr_b", NULL, IRQ_MOUSE);
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| 211 | sysinfo_set_item_val("i8042.address.physical", NULL,
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| 212 | (uintptr_t) I8042_BASE);
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| 213 | sysinfo_set_item_val("i8042.address.kernel", NULL,
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| 214 | (uintptr_t) I8042_BASE);
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| 215 | #endif
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| 216 |
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| 217 | sysinfo_set_item_val("netif.ne2000.inr", NULL, IRQ_NE2000);
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| 218 |
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| 219 | sysinfo_set_item_val("ia64_iospace", NULL, true);
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| 220 | sysinfo_set_item_val("ia64_iospace.address", NULL, true);
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| 221 | sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
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| 222 | }
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| 223 |
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| 224 |
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| 225 | /** Enter userspace and never return. */
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| 226 | void userspace(uspace_arg_t *kernel_uarg)
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| 227 | {
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| 228 | psr_t psr;
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| 229 | rsc_t rsc;
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| 230 |
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| 231 | psr.value = psr_read();
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| 232 | psr.cpl = PL_USER;
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| 233 | psr.i = true; /* start with interrupts enabled */
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| 234 | psr.ic = true;
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| 235 | psr.ri = 0; /* start with instruction #0 */
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| 236 | psr.bn = 1; /* start in bank 0 */
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| 237 |
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| 238 | asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
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| 239 | rsc.loadrs = 0;
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| 240 | rsc.be = false;
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| 241 | rsc.pl = PL_USER;
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| 242 | rsc.mode = 3; /* eager mode */
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| 243 |
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| 244 | /*
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| 245 | * Switch to userspace.
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| 246 | *
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| 247 | * When calculating stack addresses, mind the stack split between the
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| 248 | * memory stack and the RSE stack. Each occuppies STACK_SIZE / 2 bytes.
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| 249 | */
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| 250 | switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
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| 251 | ((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE / 2 -
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| 252 | ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
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| 253 | ((uintptr_t) kernel_uarg->uspace_stack) + STACK_SIZE / 2,
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| 254 | (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
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| 255 |
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| 256 | while (1)
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| 257 | ;
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| 258 | }
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| 259 |
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| 260 | /** Set thread-local-storage pointer.
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| 261 | *
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| 262 | * We use r13 (a.k.a. tp) for this purpose.
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| 263 | */
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| 264 | sysarg_t sys_tls_set(sysarg_t addr)
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| 265 | {
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| 266 | return 0;
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| 267 | }
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| 268 |
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| 269 | void arch_reboot(void)
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| 270 | {
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| 271 | pio_write_8((ioport8_t *)0x64, 0xfe);
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| 272 | while (1)
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| 273 | ;
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| 274 | }
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| 275 |
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| 276 | /** Construct function pointer
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| 277 | *
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| 278 | * @param fptr function pointer structure
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| 279 | * @param addr function address
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| 280 | * @param caller calling function address
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| 281 | *
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| 282 | * @return address of the function pointer
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| 283 | *
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| 284 | */
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| 285 | void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
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| 286 | {
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| 287 | fptr->fnc = (sysarg_t) addr;
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| 288 | fptr->gp = ((sysarg_t *) caller)[1];
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| 289 |
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| 290 | return (void *) fptr;
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| 291 | }
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| 292 |
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| 293 | void irq_initialize_arch(irq_t *irq)
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| 294 | {
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| 295 | (void) irq;
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| 296 | }
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| 297 |
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| 298 | /** @}
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| 299 | */
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