[2a0047fc] | 1 | /*
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[df4ed85] | 2 | * Copyright (c) 2005 Jakub Jermar
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[2a0047fc] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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[c5429fe] | 29 | /** @addtogroup kernel_ia64
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[b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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[244f284] | 35 | #include <arch.h>
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[36df4109] | 36 | #include <arch/arch.h>
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[d99c1d2] | 37 | #include <typedefs.h>
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[d8db519] | 38 | #include <errno.h>
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[3a2f8aa] | 39 | #include <interrupt.h>
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[9928240] | 40 | #include <arch/interrupt.h>
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[4872160] | 41 | #include <macros.h>
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[76d0981d] | 42 | #include <stdbool.h>
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[d8db519] | 43 | #include <str.h>
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[b994a60] | 44 | #include <userspace.h>
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[a8c48241] | 45 | #include <console/console.h>
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[e1be3b6] | 46 | #include <syscall/syscall.h>
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[d8db519] | 47 | #include <sysinfo/sysinfo.h>
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| 48 | #include <arch/drivers/it.h>
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| 49 | #include <arch/drivers/kbd.h>
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[22f0561] | 50 | #include <arch/legacyio.h>
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[f245145] | 51 | #include <genarch/drivers/ega/ega.h>
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[411b6a6] | 52 | #include <genarch/drivers/i8042/i8042.h>
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[4c84368e] | 53 | #include <genarch/drivers/ns16550/ns16550.h>
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[d8db519] | 54 | #include <genarch/drivers/legacy/ia32/io.h>
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| 55 | #include <genarch/kbrd/kbrd.h>
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| 56 | #include <genarch/srln/srln.h>
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[22f0561] | 57 | #include <mm/page.h>
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[d4673296] | 58 | #include <mm/km.h>
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[22f0561] | 59 |
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| 60 | #ifdef MACHINE_ski
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| 61 | #include <arch/drivers/ski.h>
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| 62 | #endif
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[59e4864] | 63 |
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[36df4109] | 64 | static void ia64_pre_mm_init(void);
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| 65 | static void ia64_post_mm_init(void);
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| 66 | static void ia64_post_smp_init(void);
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| 67 |
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| 68 | arch_ops_t ia64_ops = {
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| 69 | .pre_mm_init = ia64_pre_mm_init,
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| 70 | .post_mm_init = ia64_post_mm_init,
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| 71 | .post_smp_init = ia64_post_smp_init,
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| 72 | };
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| 73 |
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| 74 | arch_ops_t *arch_ops = &ia64_ops;
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| 75 |
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[666773c] | 76 | /* NS16550 as a COM 1 */
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[449d4ecc] | 77 | #define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
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[743ffa6e] | 78 |
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| 79 | bootinfo_t *bootinfo;
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[586262f] | 80 |
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[666773c] | 81 | static uint64_t iosapic_base = 0xfec00000;
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[22f0561] | 82 | uintptr_t legacyio_virt_base = 0;
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[323a5aaf] | 83 |
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[06f96234] | 84 | /** Performs ia64-specific initialization before main_bsp() is called. */
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[36df4109] | 85 | void ia64_pre_main(void)
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[6ecc8bce] | 86 | {
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[32817cc] | 87 | init.cnt = min3(bootinfo->taskmap.cnt, TASKMAP_MAX_RECORDS,
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| 88 | CONFIG_INIT_TASKS);
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[4872160] | 89 | size_t i;
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[32817cc] | 90 |
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[6c441cf8] | 91 | for (i = 0; i < init.cnt; i++) {
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[32817cc] | 92 | init.tasks[i].paddr =
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| 93 | (uintptr_t) bootinfo->taskmap.tasks[i].addr;
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[6c441cf8] | 94 | init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
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[f4b1535] | 95 | str_cpy(init.tasks[i].name, CONFIG_TASK_NAME_BUFLEN,
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| 96 | bootinfo->taskmap.tasks[i].name);
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[743ffa6e] | 97 | }
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[6ecc8bce] | 98 | }
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| 99 |
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[36df4109] | 100 | void ia64_pre_mm_init(void)
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[244f284] | 101 | {
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[9928240] | 102 | if (config.cpu_active == 1)
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| 103 | exception_init();
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[244f284] | 104 | }
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| 105 |
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[323a5aaf] | 106 | static void iosapic_init(void)
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| 107 | {
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[a1b9f63] | 108 | uintptr_t IOSAPIC = km_map(iosapic_base, PAGE_SIZE, PAGE_SIZE,
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[adec5b45] | 109 | PAGE_WRITE | PAGE_NOT_CACHEABLE);
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[323a5aaf] | 110 | int i;
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[a35b458] | 111 |
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[2b70a6e] | 112 | int myid, myeid;
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[a35b458] | 113 |
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[666773c] | 114 | myid = ia64_get_cpu_id();
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| 115 | myeid = ia64_get_cpu_eid();
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[50b3d30] | 116 |
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[1b20da0] | 117 | for (i = 0; i < 16; i++) {
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[666773c] | 118 | if (i == 2)
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| 119 | continue; /* Disable Cascade interrupt */
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| 120 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
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[323a5aaf] | 121 | srlz_d();
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[666773c] | 122 | ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
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[323a5aaf] | 123 | srlz_d();
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[666773c] | 124 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
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[323a5aaf] | 125 | srlz_d();
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[666773c] | 126 | ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
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| 127 | myeid << (48 - 32);
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[323a5aaf] | 128 | srlz_d();
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| 129 | }
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| 130 |
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| 131 | }
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| 132 |
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[36df4109] | 133 | void ia64_post_mm_init(void)
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[244f284] | 134 | {
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[666773c] | 135 | if (config.cpu_active == 1) {
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[22f0561] | 136 | /* Map the page with legacy I/O. */
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[adec5b45] | 137 | legacyio_virt_base = km_map(LEGACYIO_PHYS_BASE, LEGACYIO_SIZE,
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[a1b9f63] | 138 | KM_NATURAL_ALIGNMENT, PAGE_WRITE | PAGE_NOT_CACHEABLE);
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[22f0561] | 139 |
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[323a5aaf] | 140 | iosapic_init();
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[59e4864] | 141 | irq_init(INR_COUNT, INR_COUNT);
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| 142 | }
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[1b20da0] | 143 | it_init();
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[244f284] | 144 | }
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[7453929] | 145 |
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[36df4109] | 146 | void ia64_post_smp_init(void)
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[7453929] | 147 | {
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[eff1f033] | 148 | static const char *platform;
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| 149 |
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| 150 | /* Set platform name. */
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| 151 | #ifdef MACHINE_ski
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[3714e79] | 152 | platform = "ski";
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[eff1f033] | 153 | #endif
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| 154 | #ifdef MACHINE_i460GX
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[26f407e9] | 155 | platform = "pc";
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[eff1f033] | 156 | #endif
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| 157 | sysinfo_set_item_data("platform", NULL, (void *) platform,
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| 158 | str_size(platform));
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| 159 |
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[c2417bc] | 160 | #ifdef MACHINE_ski
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| 161 | ski_instance_t *ski_instance = skiin_init();
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| 162 | if (ski_instance) {
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| 163 | srln_instance_t *srln_instance = srln_init();
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| 164 | if (srln_instance) {
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| 165 | indev_t *sink = stdin_wire();
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| 166 | indev_t *srln = srln_wire(srln_instance, sink);
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| 167 | skiin_wire(ski_instance, srln);
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| 168 | }
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| 169 | }
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[a35b458] | 170 |
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[a71c158] | 171 | outdev_t *skidev = skiout_init();
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| 172 | if (skidev)
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| 173 | stdout_wire(skidev);
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[1462d35] | 174 | #endif
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[a35b458] | 175 |
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[2270bef] | 176 | #ifdef CONFIG_EGA
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[a71c158] | 177 | outdev_t *egadev = ega_init(EGA_BASE, EGA_VIDEORAM);
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| 178 | if (egadev)
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| 179 | stdout_wire(egadev);
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[2270bef] | 180 | #endif
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[a35b458] | 181 |
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[59e4864] | 182 | #ifdef CONFIG_NS16550
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[3bacee1] | 183 | ns16550_instance_t *ns16550_instance =
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| 184 | ns16550_init(NS16550_BASE, 0, NS16550_IRQ, NULL, NULL,
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[21b6307] | 185 | NULL);
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[c2417bc] | 186 | if (ns16550_instance) {
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| 187 | srln_instance_t *srln_instance = srln_init();
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| 188 | if (srln_instance) {
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| 189 | indev_t *sink = stdin_wire();
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| 190 | indev_t *srln = srln_wire(srln_instance, sink);
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| 191 | ns16550_wire(ns16550_instance, srln);
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| 192 | }
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| 193 | }
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[a35b458] | 194 |
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[449d4ecc] | 195 | sysinfo_set_item_val("kbd", NULL, true);
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| 196 | sysinfo_set_item_val("kbd.inr", NULL, NS16550_IRQ);
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[4c7257b] | 197 | sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550);
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[ff685c9] | 198 | sysinfo_set_item_val("kbd.address.physical", NULL,
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| 199 | (uintptr_t) NS16550_BASE);
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[449d4ecc] | 200 | #endif
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[a35b458] | 201 |
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[449d4ecc] | 202 | #ifdef CONFIG_I8042
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[88dfee7] | 203 | i8042_instance_t *i8042_instance = i8042_init((i8042_t *) I8042_BASE,
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| 204 | IRQ_KBD);
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[c2417bc] | 205 | if (i8042_instance) {
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| 206 | kbrd_instance_t *kbrd_instance = kbrd_init();
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| 207 | if (kbrd_instance) {
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| 208 | indev_t *sink = stdin_wire();
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| 209 | indev_t *kbrd = kbrd_wire(kbrd_instance, sink);
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| 210 | i8042_wire(i8042_instance, kbrd);
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| 211 | }
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| 212 | }
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[59e4864] | 213 | #endif
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[a35b458] | 214 |
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[46321fb] | 215 | sysinfo_set_item_val("ia64_iospace", NULL, true);
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| 216 | sysinfo_set_item_val("ia64_iospace.address", NULL, true);
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[22f0561] | 217 | sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, LEGACYIO_USER_BASE);
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[7453929] | 218 | }
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[b994a60] | 219 |
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[3fcea34] | 220 | uintptr_t arch_get_initial_sp(uintptr_t stack_base, uintptr_t stack_size)
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| 221 | {
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| 222 | return ALIGN_DOWN(stack_base + stack_size / 2, STACK_ALIGNMENT);
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| 223 | }
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| 224 |
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[b994a60] | 225 | /** Enter userspace and never return. */
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[3fcea34] | 226 | void userspace(uintptr_t pc, uintptr_t sp)
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[b994a60] | 227 | {
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| 228 | psr_t psr;
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| 229 | rsc_t rsc;
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| 230 |
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| 231 | psr.value = psr_read();
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| 232 | psr.cpl = PL_USER;
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[666773c] | 233 | psr.i = true; /* start with interrupts enabled */
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[b994a60] | 234 | psr.ic = true;
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[666773c] | 235 | psr.ri = 0; /* start with instruction #0 */
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| 236 | psr.bn = 1; /* start in bank 0 */
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[b994a60] | 237 |
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[e7b7be3f] | 238 | asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
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[b994a60] | 239 | rsc.loadrs = 0;
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| 240 | rsc.be = false;
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| 241 | rsc.pl = PL_USER;
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[666773c] | 242 | rsc.mode = 3; /* eager mode */
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[b994a60] | 243 |
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[2f23341] | 244 | /*
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| 245 | * Switch to userspace.
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| 246 | *
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| 247 | * When calculating stack addresses, mind the stack split between the
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[3fcea34] | 248 | * memory stack and the RSE stack.
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| 249 | * Memory stack occupies area under sp, while RSE stack occupies area above.
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[2f23341] | 250 | */
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[3fcea34] | 251 | switch_to_userspace(pc,
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| 252 | sp, sp + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
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| 253 | 0, psr.value, rsc.value);
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[a35b458] | 254 |
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[3bacee1] | 255 | while (true)
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| 256 | ;
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[b994a60] | 257 | }
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[e1be3b6] | 258 |
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[f74bbaf] | 259 | void arch_reboot(void)
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| 260 | {
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[013c4d6] | 261 | pio_write_8((ioport8_t *)0x64, 0xfe);
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[3bacee1] | 262 | while (true)
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| 263 | ;
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[f74bbaf] | 264 | }
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| 265 |
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[6da1013f] | 266 | /** Construct function pointer
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| 267 | *
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| 268 | * @param fptr function pointer structure
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| 269 | * @param addr function address
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| 270 | * @param caller calling function address
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| 271 | *
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| 272 | * @return address of the function pointer
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| 273 | *
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| 274 | */
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| 275 | void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
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| 276 | {
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[96b02eb9] | 277 | fptr->fnc = (sysarg_t) addr;
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| 278 | fptr->gp = ((sysarg_t *) caller)[1];
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[a35b458] | 279 |
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[6da1013f] | 280 | return (void *) fptr;
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| 281 | }
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| 282 |
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[3a2f8aa] | 283 | void irq_initialize_arch(irq_t *irq)
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| 284 | {
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| 285 | (void) irq;
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| 286 | }
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| 287 |
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[06e1e95] | 288 | /** @}
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[b45c443] | 289 | */
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