[30ef8ce] | 1 | /*
|
---|
[df4ed85] | 2 | * Copyright (c) 2005 - 2006 Jakub Jermar
|
---|
| 3 | * Copyright (c) 2006 Jakub Vana
|
---|
[30ef8ce] | 4 | * All rights reserved.
|
---|
| 5 | *
|
---|
| 6 | * Redistribution and use in source and binary forms, with or without
|
---|
| 7 | * modification, are permitted provided that the following conditions
|
---|
| 8 | * are met:
|
---|
| 9 | *
|
---|
| 10 | * - Redistributions of source code must retain the above copyright
|
---|
| 11 | * notice, this list of conditions and the following disclaimer.
|
---|
| 12 | * - Redistributions in binary form must reproduce the above copyright
|
---|
| 13 | * notice, this list of conditions and the following disclaimer in the
|
---|
| 14 | * documentation and/or other materials provided with the distribution.
|
---|
| 15 | * - The name of the author may not be used to endorse or promote products
|
---|
| 16 | * derived from this software without specific prior written permission.
|
---|
| 17 | *
|
---|
| 18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
---|
| 19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
---|
| 20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
---|
| 21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
---|
| 22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
---|
| 23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
---|
| 24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
---|
| 25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
---|
| 26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
---|
| 27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
---|
| 28 | */
|
---|
| 29 |
|
---|
[5bda2f3e] | 30 | /** @addtogroup ia64mm
|
---|
[b45c443] | 31 | * @{
|
---|
| 32 | */
|
---|
| 33 | /** @file
|
---|
| 34 | */
|
---|
| 35 |
|
---|
[06e1e95] | 36 | #ifndef KERN_ia64_PAGE_H_
|
---|
| 37 | #define KERN_ia64_PAGE_H_
|
---|
[30ef8ce] | 38 |
|
---|
[d1f8a87] | 39 | #include <arch/mm/frame.h>
|
---|
| 40 |
|
---|
[5bda2f3e] | 41 | #define PAGE_SIZE FRAME_SIZE
|
---|
| 42 | #define PAGE_WIDTH FRAME_WIDTH
|
---|
[30ef8ce] | 43 |
|
---|
[d1f8a87] | 44 | #ifdef KERNEL
|
---|
| 45 |
|
---|
[a0d74fd] | 46 | /** Bit width of the TLB-locked portion of kernel address space. */
|
---|
[5bda2f3e] | 47 | #define KERNEL_PAGE_WIDTH 28 /* 256M */
|
---|
| 48 | #define IO_PAGE_WIDTH 26 /* 64M */
|
---|
| 49 | #define FW_PAGE_WIDTH 28 /* 256M */
|
---|
[59e4864] | 50 |
|
---|
[5bda2f3e] | 51 | #define USPACE_IO_PAGE_WIDTH 12 /* 4K */
|
---|
[46321fb] | 52 |
|
---|
| 53 |
|
---|
[8b4d6cb] | 54 | /*
|
---|
| 55 | * Statically mapped IO spaces - offsets to 0xe...00 of virtual addresses
|
---|
| 56 | * because of "minimal virtual bits implemented is 51" it is possible to
|
---|
| 57 | * have values up to 0x0007000000000000
|
---|
| 58 | */
|
---|
[59e4864] | 59 |
|
---|
| 60 | /* Firmware area (bellow 4GB in phys mem) */
|
---|
[5bda2f3e] | 61 | #define FW_OFFSET 0x00000000F0000000
|
---|
[59e4864] | 62 | /* Legacy IO space */
|
---|
[5bda2f3e] | 63 | #define IO_OFFSET 0x0001000000000000
|
---|
[8b4d6cb] | 64 | /* Videoram - now mapped to 0 as VGA text mode vram on 0xb8000 */
|
---|
[5bda2f3e] | 65 | #define VIO_OFFSET 0x0002000000000000
|
---|
[59e4864] | 66 |
|
---|
| 67 |
|
---|
[5bda2f3e] | 68 | #define PPN_SHIFT 12
|
---|
[0c0410b] | 69 |
|
---|
[5bda2f3e] | 70 | #define VRN_SHIFT 61
|
---|
| 71 | #define VRN_MASK (7ULL << VRN_SHIFT)
|
---|
| 72 | #define VA2VRN(va) ((va) >> VRN_SHIFT)
|
---|
[5ac2e61] | 73 |
|
---|
| 74 | #ifdef __ASM__
|
---|
[5bda2f3e] | 75 | #define VRN_KERNEL 7
|
---|
[5ac2e61] | 76 | #else
|
---|
[5bda2f3e] | 77 | #define VRN_KERNEL 7ULL
|
---|
[5ac2e61] | 78 | #endif
|
---|
| 79 |
|
---|
[5bda2f3e] | 80 | #define REGION_REGISTERS 8
|
---|
[fd537a0] | 81 |
|
---|
[5bda2f3e] | 82 | #define KA2PA(x) ((uintptr_t) ((x) - (VRN_KERNEL << VRN_SHIFT)))
|
---|
| 83 | #define PA2KA(x) ((uintptr_t) ((x) + (VRN_KERNEL << VRN_SHIFT)))
|
---|
[5ac2e61] | 84 |
|
---|
[5bda2f3e] | 85 | #define VHPT_WIDTH 20 /* 1M */
|
---|
| 86 | #define VHPT_SIZE (1 << VHPT_WIDTH)
|
---|
[fd537a0] | 87 |
|
---|
[5bda2f3e] | 88 | #define PTA_BASE_SHIFT 15
|
---|
[df09142f] | 89 |
|
---|
[457d18a] | 90 | /** Memory Attributes. */
|
---|
[5bda2f3e] | 91 | #define MA_WRITEBACK 0x00
|
---|
| 92 | #define MA_UNCACHEABLE 0x04
|
---|
[457d18a] | 93 |
|
---|
| 94 | /** Privilege Levels. Only the most and the least privileged ones are ever used. */
|
---|
[5bda2f3e] | 95 | #define PL_KERNEL 0x00
|
---|
| 96 | #define PL_USER 0x03
|
---|
[457d18a] | 97 |
|
---|
| 98 | /* Access Rigths. Only certain combinations are used by the kernel. */
|
---|
[5bda2f3e] | 99 | #define AR_READ 0x00
|
---|
| 100 | #define AR_EXECUTE 0x01
|
---|
| 101 | #define AR_WRITE 0x02
|
---|
[457d18a] | 102 |
|
---|
[5ac2e61] | 103 | #ifndef __ASM__
|
---|
[bc78c75] | 104 |
|
---|
[b3f8fb7] | 105 | #include <arch/mm/as.h>
|
---|
[a0d74fd] | 106 | #include <arch/mm/frame.h>
|
---|
[b3f8fb7] | 107 | #include <arch/interrupt.h>
|
---|
[a0d74fd] | 108 | #include <arch/barrier.h>
|
---|
| 109 | #include <arch/mm/asid.h>
|
---|
| 110 | #include <arch/types.h>
|
---|
| 111 | #include <debug.h>
|
---|
| 112 |
|
---|
[c2b95d3] | 113 | struct vhpt_tag_info {
|
---|
| 114 | unsigned long long tag : 63;
|
---|
[5bda2f3e] | 115 | unsigned int ti : 1;
|
---|
[c2b95d3] | 116 | } __attribute__ ((packed));
|
---|
[8c0d692] | 117 |
|
---|
[c2b95d3] | 118 | union vhpt_tag {
|
---|
| 119 | struct vhpt_tag_info tag_info;
|
---|
| 120 | unsigned tag_word;
|
---|
[8c0d692] | 121 | };
|
---|
| 122 |
|
---|
[c2b95d3] | 123 | struct vhpt_entry_present {
|
---|
[8c0d692] | 124 | /* Word 0 */
|
---|
[5bda2f3e] | 125 | unsigned int p : 1;
|
---|
| 126 | unsigned int : 1;
|
---|
| 127 | unsigned int ma : 3;
|
---|
| 128 | unsigned int a : 1;
|
---|
| 129 | unsigned int d : 1;
|
---|
| 130 | unsigned int pl : 2;
|
---|
| 131 | unsigned int ar : 3;
|
---|
[c2b95d3] | 132 | unsigned long long ppn : 38;
|
---|
[5bda2f3e] | 133 | unsigned int : 2;
|
---|
| 134 | unsigned int ed : 1;
|
---|
| 135 | unsigned int ig1 : 11;
|
---|
[8c0d692] | 136 |
|
---|
| 137 | /* Word 1 */
|
---|
[5bda2f3e] | 138 | unsigned int : 2;
|
---|
| 139 | unsigned int ps : 6;
|
---|
| 140 | unsigned int key : 24;
|
---|
| 141 | unsigned int : 32;
|
---|
[8c0d692] | 142 |
|
---|
| 143 | /* Word 2 */
|
---|
[c2b95d3] | 144 | union vhpt_tag tag;
|
---|
[8c0d692] | 145 |
|
---|
[5bda2f3e] | 146 | /* Word 3 */
|
---|
[7f1c620] | 147 | uint64_t ig3 : 64;
|
---|
[c2b95d3] | 148 | } __attribute__ ((packed));
|
---|
[8c0d692] | 149 |
|
---|
[c2b95d3] | 150 | struct vhpt_entry_not_present {
|
---|
[8c0d692] | 151 | /* Word 0 */
|
---|
[5bda2f3e] | 152 | unsigned int p : 1;
|
---|
[c2b95d3] | 153 | unsigned long long ig0 : 52;
|
---|
[5bda2f3e] | 154 | unsigned int ig1 : 11;
|
---|
[8c0d692] | 155 |
|
---|
| 156 | /* Word 1 */
|
---|
[5bda2f3e] | 157 | unsigned int : 2;
|
---|
| 158 | unsigned int ps : 6;
|
---|
[c2b95d3] | 159 | unsigned long long ig2 : 56;
|
---|
[5bda2f3e] | 160 |
|
---|
[8c0d692] | 161 | /* Word 2 */
|
---|
[c2b95d3] | 162 | union vhpt_tag tag;
|
---|
| 163 |
|
---|
[5bda2f3e] | 164 | /* Word 3 */
|
---|
[7f1c620] | 165 | uint64_t ig3 : 64;
|
---|
[c2b95d3] | 166 | } __attribute__ ((packed));
|
---|
| 167 |
|
---|
[5bda2f3e] | 168 | typedef union {
|
---|
[c2b95d3] | 169 | struct vhpt_entry_present present;
|
---|
| 170 | struct vhpt_entry_not_present not_present;
|
---|
[7f1c620] | 171 | uint64_t word[4];
|
---|
[c7ec94a4] | 172 | } vhpt_entry_t;
|
---|
[c2b95d3] | 173 |
|
---|
| 174 | struct region_register_map {
|
---|
[5bda2f3e] | 175 | unsigned int ve : 1;
|
---|
| 176 | unsigned int : 1;
|
---|
| 177 | unsigned int ps : 6;
|
---|
| 178 | unsigned int rid : 24;
|
---|
| 179 | unsigned int : 32;
|
---|
[c2b95d3] | 180 | } __attribute__ ((packed));
|
---|
| 181 |
|
---|
[5bda2f3e] | 182 | typedef union {
|
---|
[c2b95d3] | 183 | struct region_register_map map;
|
---|
| 184 | unsigned long long word;
|
---|
[5bda2f3e] | 185 | } region_register_t;
|
---|
[c2b95d3] | 186 |
|
---|
| 187 | struct pta_register_map {
|
---|
[5bda2f3e] | 188 | unsigned int ve : 1;
|
---|
| 189 | unsigned int : 1;
|
---|
| 190 | unsigned int size : 6;
|
---|
| 191 | unsigned int vf : 1;
|
---|
| 192 | unsigned int : 6;
|
---|
[c2b95d3] | 193 | unsigned long long base : 49;
|
---|
| 194 | } __attribute__ ((packed));
|
---|
| 195 |
|
---|
| 196 | typedef union pta_register {
|
---|
| 197 | struct pta_register_map map;
|
---|
[7f1c620] | 198 | uint64_t word;
|
---|
[5bda2f3e] | 199 | } pta_register_t;
|
---|
[c2b95d3] | 200 |
|
---|
| 201 | /** Return Translation Hashed Entry Address.
|
---|
| 202 | *
|
---|
| 203 | * VRN bits are used to read RID (ASID) from one
|
---|
| 204 | * of the eight region registers registers.
|
---|
| 205 | *
|
---|
| 206 | * @param va Virtual address including VRN bits.
|
---|
| 207 | *
|
---|
| 208 | * @return Address of the head of VHPT collision chain.
|
---|
| 209 | */
|
---|
[7f1c620] | 210 | static inline uint64_t thash(uint64_t va)
|
---|
[8c0d692] | 211 | {
|
---|
[7f1c620] | 212 | uint64_t ret;
|
---|
[5bda2f3e] | 213 |
|
---|
| 214 | asm volatile (
|
---|
| 215 | "thash %[ret] = %[va]\n"
|
---|
| 216 | : [ret] "=r" (ret)
|
---|
| 217 | : [va] "r" (va)
|
---|
| 218 | );
|
---|
| 219 |
|
---|
[c2b95d3] | 220 | return ret;
|
---|
| 221 | }
|
---|
[fd537a0] | 222 |
|
---|
[c2b95d3] | 223 | /** Return Translation Hashed Entry Tag.
|
---|
| 224 | *
|
---|
| 225 | * VRN bits are used to read RID (ASID) from one
|
---|
| 226 | * of the eight region registers.
|
---|
| 227 | *
|
---|
| 228 | * @param va Virtual address including VRN bits.
|
---|
| 229 | *
|
---|
| 230 | * @return The unique tag for VPN and RID in the collision chain returned by thash().
|
---|
| 231 | */
|
---|
[7f1c620] | 232 | static inline uint64_t ttag(uint64_t va)
|
---|
[fd537a0] | 233 | {
|
---|
[7f1c620] | 234 | uint64_t ret;
|
---|
[5bda2f3e] | 235 |
|
---|
| 236 | asm volatile (
|
---|
| 237 | "ttag %[ret] = %[va]\n"
|
---|
| 238 | : [ret] "=r" (ret)
|
---|
| 239 | : [va] "r" (va)
|
---|
| 240 | );
|
---|
| 241 |
|
---|
[c2b95d3] | 242 | return ret;
|
---|
| 243 | }
|
---|
[fd537a0] | 244 |
|
---|
[c2b95d3] | 245 | /** Read Region Register.
|
---|
| 246 | *
|
---|
| 247 | * @param i Region register index.
|
---|
| 248 | *
|
---|
| 249 | * @return Current contents of rr[i].
|
---|
| 250 | */
|
---|
[98000fb] | 251 | static inline uint64_t rr_read(size_t i)
|
---|
[fd537a0] | 252 | {
|
---|
[7f1c620] | 253 | uint64_t ret;
|
---|
[5bda2f3e] | 254 |
|
---|
[849386a] | 255 | ASSERT(i < REGION_REGISTERS);
|
---|
[5bda2f3e] | 256 |
|
---|
| 257 | asm volatile (
|
---|
| 258 | "mov %[ret] = rr[%[index]]\n"
|
---|
| 259 | : [ret] "=r" (ret)
|
---|
| 260 | : [index] "r" (i << VRN_SHIFT)
|
---|
| 261 | );
|
---|
| 262 |
|
---|
[c2b95d3] | 263 | return ret;
|
---|
| 264 | }
|
---|
[fd537a0] | 265 |
|
---|
[c2b95d3] | 266 | /** Write Region Register.
|
---|
| 267 | *
|
---|
| 268 | * @param i Region register index.
|
---|
| 269 | * @param v Value to be written to rr[i].
|
---|
| 270 | */
|
---|
[98000fb] | 271 | static inline void rr_write(size_t i, uint64_t v)
|
---|
[fd537a0] | 272 | {
|
---|
[849386a] | 273 | ASSERT(i < REGION_REGISTERS);
|
---|
[5bda2f3e] | 274 |
|
---|
[e7b7be3f] | 275 | asm volatile (
|
---|
[5bda2f3e] | 276 | "mov rr[%[index]] = %[value]\n"
|
---|
| 277 | :: [index] "r" (i << VRN_SHIFT),
|
---|
| 278 | [value] "r" (v)
|
---|
[a0d74fd] | 279 | );
|
---|
[c2b95d3] | 280 | }
|
---|
[5bda2f3e] | 281 |
|
---|
[c2b95d3] | 282 | /** Read Page Table Register.
|
---|
| 283 | *
|
---|
| 284 | * @return Current value stored in PTA.
|
---|
| 285 | */
|
---|
[7f1c620] | 286 | static inline uint64_t pta_read(void)
|
---|
[c2b95d3] | 287 | {
|
---|
[7f1c620] | 288 | uint64_t ret;
|
---|
[c2b95d3] | 289 |
|
---|
[5bda2f3e] | 290 | asm volatile (
|
---|
| 291 | "mov %[ret] = cr.pta\n"
|
---|
| 292 | : [ret] "=r" (ret)
|
---|
| 293 | );
|
---|
[c2b95d3] | 294 |
|
---|
| 295 | return ret;
|
---|
| 296 | }
|
---|
[fd537a0] | 297 |
|
---|
[c2b95d3] | 298 | /** Write Page Table Register.
|
---|
| 299 | *
|
---|
| 300 | * @param v New value to be stored in PTA.
|
---|
| 301 | */
|
---|
[7f1c620] | 302 | static inline void pta_write(uint64_t v)
|
---|
[c2b95d3] | 303 | {
|
---|
[5bda2f3e] | 304 | asm volatile (
|
---|
| 305 | "mov cr.pta = %[value]\n"
|
---|
| 306 | :: [value] "r" (v)
|
---|
| 307 | );
|
---|
[c2b95d3] | 308 | }
|
---|
| 309 |
|
---|
| 310 | extern void page_arch_init(void);
|
---|
[c7ec94a4] | 311 |
|
---|
[7f1c620] | 312 | extern vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid);
|
---|
| 313 | extern bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v);
|
---|
| 314 | extern void vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame, int flags);
|
---|
[fd537a0] | 315 |
|
---|
[d1f8a87] | 316 | #endif /* __ASM__ */
|
---|
| 317 |
|
---|
| 318 | #endif /* KERNEL */
|
---|
[5ac2e61] | 319 |
|
---|
[30ef8ce] | 320 | #endif
|
---|
[b45c443] | 321 |
|
---|
[7f1c620] | 322 | /** @}
|
---|
[b45c443] | 323 | */
|
---|