source: mainline/kernel/arch/ia64/include/mm/page.h@ 86018c1

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 86018c1 was 5bda2f3e, checked in by Martin Decky <martin@…>, 16 years ago

ia64 cleanup and conding style
(no change in functionality)

  • Property mode set to 100644
File size: 7.1 KB
Line 
1/*
2 * Copyright (c) 2005 - 2006 Jakub Jermar
3 * Copyright (c) 2006 Jakub Vana
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 *
10 * - Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * - Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * - The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30/** @addtogroup ia64mm
31 * @{
32 */
33/** @file
34 */
35
36#ifndef KERN_ia64_PAGE_H_
37#define KERN_ia64_PAGE_H_
38
39#include <arch/mm/frame.h>
40
41#define PAGE_SIZE FRAME_SIZE
42#define PAGE_WIDTH FRAME_WIDTH
43
44#ifdef KERNEL
45
46/** Bit width of the TLB-locked portion of kernel address space. */
47#define KERNEL_PAGE_WIDTH 28 /* 256M */
48#define IO_PAGE_WIDTH 26 /* 64M */
49#define FW_PAGE_WIDTH 28 /* 256M */
50
51#define USPACE_IO_PAGE_WIDTH 12 /* 4K */
52
53
54/*
55 * Statically mapped IO spaces - offsets to 0xe...00 of virtual addresses
56 * because of "minimal virtual bits implemented is 51" it is possible to
57 * have values up to 0x0007000000000000
58 */
59
60/* Firmware area (bellow 4GB in phys mem) */
61#define FW_OFFSET 0x00000000F0000000
62/* Legacy IO space */
63#define IO_OFFSET 0x0001000000000000
64/* Videoram - now mapped to 0 as VGA text mode vram on 0xb8000 */
65#define VIO_OFFSET 0x0002000000000000
66
67
68#define PPN_SHIFT 12
69
70#define VRN_SHIFT 61
71#define VRN_MASK (7ULL << VRN_SHIFT)
72#define VA2VRN(va) ((va) >> VRN_SHIFT)
73
74#ifdef __ASM__
75 #define VRN_KERNEL 7
76#else
77 #define VRN_KERNEL 7ULL
78#endif
79
80#define REGION_REGISTERS 8
81
82#define KA2PA(x) ((uintptr_t) ((x) - (VRN_KERNEL << VRN_SHIFT)))
83#define PA2KA(x) ((uintptr_t) ((x) + (VRN_KERNEL << VRN_SHIFT)))
84
85#define VHPT_WIDTH 20 /* 1M */
86#define VHPT_SIZE (1 << VHPT_WIDTH)
87
88#define PTA_BASE_SHIFT 15
89
90/** Memory Attributes. */
91#define MA_WRITEBACK 0x00
92#define MA_UNCACHEABLE 0x04
93
94/** Privilege Levels. Only the most and the least privileged ones are ever used. */
95#define PL_KERNEL 0x00
96#define PL_USER 0x03
97
98/* Access Rigths. Only certain combinations are used by the kernel. */
99#define AR_READ 0x00
100#define AR_EXECUTE 0x01
101#define AR_WRITE 0x02
102
103#ifndef __ASM__
104
105#include <arch/mm/as.h>
106#include <arch/mm/frame.h>
107#include <arch/interrupt.h>
108#include <arch/barrier.h>
109#include <arch/mm/asid.h>
110#include <arch/types.h>
111#include <debug.h>
112
113struct vhpt_tag_info {
114 unsigned long long tag : 63;
115 unsigned int ti : 1;
116} __attribute__ ((packed));
117
118union vhpt_tag {
119 struct vhpt_tag_info tag_info;
120 unsigned tag_word;
121};
122
123struct vhpt_entry_present {
124 /* Word 0 */
125 unsigned int p : 1;
126 unsigned int : 1;
127 unsigned int ma : 3;
128 unsigned int a : 1;
129 unsigned int d : 1;
130 unsigned int pl : 2;
131 unsigned int ar : 3;
132 unsigned long long ppn : 38;
133 unsigned int : 2;
134 unsigned int ed : 1;
135 unsigned int ig1 : 11;
136
137 /* Word 1 */
138 unsigned int : 2;
139 unsigned int ps : 6;
140 unsigned int key : 24;
141 unsigned int : 32;
142
143 /* Word 2 */
144 union vhpt_tag tag;
145
146 /* Word 3 */
147 uint64_t ig3 : 64;
148} __attribute__ ((packed));
149
150struct vhpt_entry_not_present {
151 /* Word 0 */
152 unsigned int p : 1;
153 unsigned long long ig0 : 52;
154 unsigned int ig1 : 11;
155
156 /* Word 1 */
157 unsigned int : 2;
158 unsigned int ps : 6;
159 unsigned long long ig2 : 56;
160
161 /* Word 2 */
162 union vhpt_tag tag;
163
164 /* Word 3 */
165 uint64_t ig3 : 64;
166} __attribute__ ((packed));
167
168typedef union {
169 struct vhpt_entry_present present;
170 struct vhpt_entry_not_present not_present;
171 uint64_t word[4];
172} vhpt_entry_t;
173
174struct region_register_map {
175 unsigned int ve : 1;
176 unsigned int : 1;
177 unsigned int ps : 6;
178 unsigned int rid : 24;
179 unsigned int : 32;
180} __attribute__ ((packed));
181
182typedef union {
183 struct region_register_map map;
184 unsigned long long word;
185} region_register_t;
186
187struct pta_register_map {
188 unsigned int ve : 1;
189 unsigned int : 1;
190 unsigned int size : 6;
191 unsigned int vf : 1;
192 unsigned int : 6;
193 unsigned long long base : 49;
194} __attribute__ ((packed));
195
196typedef union pta_register {
197 struct pta_register_map map;
198 uint64_t word;
199} pta_register_t;
200
201/** Return Translation Hashed Entry Address.
202 *
203 * VRN bits are used to read RID (ASID) from one
204 * of the eight region registers registers.
205 *
206 * @param va Virtual address including VRN bits.
207 *
208 * @return Address of the head of VHPT collision chain.
209 */
210static inline uint64_t thash(uint64_t va)
211{
212 uint64_t ret;
213
214 asm volatile (
215 "thash %[ret] = %[va]\n"
216 : [ret] "=r" (ret)
217 : [va] "r" (va)
218 );
219
220 return ret;
221}
222
223/** Return Translation Hashed Entry Tag.
224 *
225 * VRN bits are used to read RID (ASID) from one
226 * of the eight region registers.
227 *
228 * @param va Virtual address including VRN bits.
229 *
230 * @return The unique tag for VPN and RID in the collision chain returned by thash().
231 */
232static inline uint64_t ttag(uint64_t va)
233{
234 uint64_t ret;
235
236 asm volatile (
237 "ttag %[ret] = %[va]\n"
238 : [ret] "=r" (ret)
239 : [va] "r" (va)
240 );
241
242 return ret;
243}
244
245/** Read Region Register.
246 *
247 * @param i Region register index.
248 *
249 * @return Current contents of rr[i].
250 */
251static inline uint64_t rr_read(size_t i)
252{
253 uint64_t ret;
254
255 ASSERT(i < REGION_REGISTERS);
256
257 asm volatile (
258 "mov %[ret] = rr[%[index]]\n"
259 : [ret] "=r" (ret)
260 : [index] "r" (i << VRN_SHIFT)
261 );
262
263 return ret;
264}
265
266/** Write Region Register.
267 *
268 * @param i Region register index.
269 * @param v Value to be written to rr[i].
270 */
271static inline void rr_write(size_t i, uint64_t v)
272{
273 ASSERT(i < REGION_REGISTERS);
274
275 asm volatile (
276 "mov rr[%[index]] = %[value]\n"
277 :: [index] "r" (i << VRN_SHIFT),
278 [value] "r" (v)
279 );
280}
281
282/** Read Page Table Register.
283 *
284 * @return Current value stored in PTA.
285 */
286static inline uint64_t pta_read(void)
287{
288 uint64_t ret;
289
290 asm volatile (
291 "mov %[ret] = cr.pta\n"
292 : [ret] "=r" (ret)
293 );
294
295 return ret;
296}
297
298/** Write Page Table Register.
299 *
300 * @param v New value to be stored in PTA.
301 */
302static inline void pta_write(uint64_t v)
303{
304 asm volatile (
305 "mov cr.pta = %[value]\n"
306 :: [value] "r" (v)
307 );
308}
309
310extern void page_arch_init(void);
311
312extern vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid);
313extern bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v);
314extern void vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame, int flags);
315
316#endif /* __ASM__ */
317
318#endif /* KERNEL */
319
320#endif
321
322/** @}
323 */
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