| [ed0dd65] | 1 | /*
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| [4bb31f7] | 2 | * Copyright (c) 2008 Jakub Jermar
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| [ed0dd65] | 3 | * All rights reserved.
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| 4 | *
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| 5 | * Redistribution and use in source and binary forms, with or without
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| 6 | * modification, are permitted provided that the following conditions
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| 7 | * are met:
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| 8 | *
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| 9 | * - Redistributions of source code must retain the above copyright
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| 10 | * notice, this list of conditions and the following disclaimer.
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| 11 | * - Redistributions in binary form must reproduce the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer in the
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| 13 | * documentation and/or other materials provided with the distribution.
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| 14 | * - The name of the author may not be used to endorse or promote products
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| 15 | * derived from this software without specific prior written permission.
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| 16 | *
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| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| [99d6fd0] | 29 | /** @addtogroup ia32
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| [b45c443] | 30 | * @{
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| 31 | */
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| 32 | /** @file
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| 33 | */
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| 34 |
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| [ed0dd65] | 35 | #include <smp/smp.h>
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| [a26ddd1] | 36 | #include <arch/smp/smp.h>
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| 37 | #include <arch/smp/mps.h>
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| 38 | #include <arch/smp/ap.h>
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| [66def8d] | 39 | #include <arch/boot/boot.h>
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| [e16e036a] | 40 | #include <genarch/acpi/acpi.h>
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| 41 | #include <genarch/acpi/madt.h>
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| [ed0dd65] | 42 | #include <config.h>
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| [a26ddd1] | 43 | #include <synch/waitq.h>
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| 44 | #include <arch/pm.h>
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| 45 | #include <func.h>
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| 46 | #include <panic.h>
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| 47 | #include <debug.h>
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| 48 | #include <arch/asm.h>
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| 49 | #include <mm/page.h>
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| [d4673296] | 50 | #include <mm/frame.h>
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| 51 | #include <mm/km.h>
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| [085d973] | 52 | #include <mm/slab.h>
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| [fc1e4f6] | 53 | #include <mm/as.h>
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| [9c0a9b3] | 54 | #include <print.h>
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| 55 | #include <memstr.h>
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| [80d31883] | 56 | #include <arch/drivers/i8259.h>
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| [ed0dd65] | 57 |
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| [5f85c91] | 58 | #ifdef CONFIG_SMP
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| [ed0dd65] | 59 |
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| [a26ddd1] | 60 | static struct smp_config_operations *ops = NULL;
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| 61 |
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| [ed0dd65] | 62 | void smp_init(void)
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| 63 | {
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| 64 | if (acpi_madt) {
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| 65 | acpi_madt_parse();
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| [232e3ec7] | 66 | ops = &madt_config_operations;
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| [ed0dd65] | 67 | }
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| [fe32163] | 68 |
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| [a26ddd1] | 69 | if (config.cpu_count == 1) {
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| [ed0dd65] | 70 | mps_init();
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| [a26ddd1] | 71 | ops = &mps_config_operations;
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| 72 | }
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| [fe32163] | 73 |
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| [e3ce39b] | 74 | if (config.cpu_count > 1) {
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| [adec5b45] | 75 | l_apic = (uint32_t *) km_map((uintptr_t) l_apic, PAGE_SIZE,
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| 76 | PAGE_WRITE | PAGE_NOT_CACHEABLE);
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| 77 | io_apic = (uint32_t *) km_map((uintptr_t) io_apic, PAGE_SIZE,
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| 78 | PAGE_WRITE | PAGE_NOT_CACHEABLE);
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| [7cb567cd] | 79 | }
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| [ed0dd65] | 80 | }
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| 81 |
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| [a26ddd1] | 82 | /*
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| 83 | * Kernel thread for bringing up application processors. It becomes clear
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| 84 | * that we need an arrangement like this (AP's being initialized by a kernel
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| 85 | * thread), for a thread has its dedicated stack. (The stack used during the
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| 86 | * BSP initialization (prior the very first call to scheduler()) will be used
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| 87 | * as an initialization stack for each AP.)
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| 88 | */
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| [7f043c0] | 89 | void kmp(void *arg __attribute__((unused)))
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| [a26ddd1] | 90 | {
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| [c27c988] | 91 | unsigned int i;
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| [6401f79] | 92 |
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| [a26ddd1] | 93 | ASSERT(ops != NULL);
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| [fe32163] | 94 |
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| [a26ddd1] | 95 | /*
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| 96 | * We need to access data in frame 0.
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| 97 | * We boldly make use of kernel address space mapping.
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| 98 | */
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| [fe32163] | 99 |
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| [a26ddd1] | 100 | /*
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| 101 | * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
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| 102 | */
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| [4bb31f7] | 103 | *((uint16_t *) (PA2KA(0x467 + 0))) =
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| [fe32163] | 104 | (uint16_t) (((uintptr_t) ap_boot) >> 4); /* segment */
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| 105 | *((uint16_t *) (PA2KA(0x467 + 2))) = 0; /* offset */
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| [a26ddd1] | 106 |
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| 107 | /*
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| 108 | * Save 0xa to address 0xf of the CMOS RAM.
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| 109 | * BIOS will not do the POST after the INIT signal.
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| 110 | */
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| [fe32163] | 111 | pio_write_8((ioport8_t *) 0x70, 0xf);
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| 112 | pio_write_8((ioport8_t *) 0x71, 0xa);
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| 113 |
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| [a26ddd1] | 114 | pic_disable_irqs(0xffff);
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| 115 | apic_init();
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| [7f043c0] | 116 |
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| [fe32163] | 117 | for (i = 0; i < config.cpu_count; i++) {
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| [a26ddd1] | 118 | /*
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| 119 | * Skip processors marked unusable.
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| 120 | */
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| 121 | if (!ops->cpu_enabled(i))
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| 122 | continue;
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| [fe32163] | 123 |
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| [a26ddd1] | 124 | /*
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| 125 | * The bootstrap processor is already up.
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| 126 | */
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| 127 | if (ops->cpu_bootstrap(i))
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| 128 | continue;
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| [fe32163] | 129 |
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| [99718a2e] | 130 | if (ops->cpu_apic_id(i) == bsp_l_apic) {
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| 131 | printf("kmp: bad processor entry #%u, will not send IPI "
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| 132 | "to myself\n", i);
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| [a26ddd1] | 133 | continue;
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| 134 | }
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| 135 |
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| 136 | /*
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| 137 | * Prepare new GDT for CPU in question.
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| 138 | */
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| [5f0f29ce] | 139 |
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| 140 | /* XXX Flag FRAME_LOW_4_GiB was removed temporarily,
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| 141 | * it needs to be replaced by a generic fuctionality of
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| 142 | * the memory subsystem
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| 143 | */
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| [fe32163] | 144 | descriptor_t *gdt_new =
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| 145 | (descriptor_t *) malloc(GDT_ITEMS * sizeof(descriptor_t),
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| 146 | FRAME_ATOMIC);
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| [4bb31f7] | 147 | if (!gdt_new)
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| [f651e80] | 148 | panic("Cannot allocate memory for GDT.");
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| [fe32163] | 149 |
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| [99d6fd0] | 150 | memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(descriptor_t));
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| 151 | memsetb(&gdt_new[TSS_DES], sizeof(descriptor_t), 0);
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| 152 | protected_ap_gdtr.limit = GDT_ITEMS * sizeof(descriptor_t);
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| [7f1c620] | 153 | protected_ap_gdtr.base = KA2PA((uintptr_t) gdt_new);
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| 154 | gdtr.base = (uintptr_t) gdt_new;
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| [fe32163] | 155 |
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| [a26ddd1] | 156 | if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) {
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| 157 | /*
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| [c0b45fa] | 158 | * There may be just one AP being initialized at
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| [a26ddd1] | 159 | * the time. After it comes completely up, it is
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| 160 | * supposed to wake us up.
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| [c0b45fa] | 161 | */
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| [4bb31f7] | 162 | if (waitq_sleep_timeout(&ap_completion_wq, 1000000,
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| 163 | SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT) {
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| 164 | printf("%s: waiting for cpu%u (APIC ID = %d) "
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| [fe32163] | 165 | "timed out\n", __FUNCTION__, i,
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| [4bb31f7] | 166 | ops->cpu_apic_id(i));
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| [7f043c0] | 167 | }
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| [c0b45fa] | 168 | } else
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| [4bb31f7] | 169 | printf("INIT IPI for l_apic%d failed\n",
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| 170 | ops->cpu_apic_id(i));
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| [a26ddd1] | 171 | }
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| 172 | }
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| [ed0dd65] | 173 |
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| [623b49f1] | 174 | int smp_irq_to_pin(unsigned int irq)
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| [a83a802] | 175 | {
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| 176 | ASSERT(ops != NULL);
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| 177 | return ops->irq_to_pin(irq);
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| 178 | }
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| 179 |
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| [5f85c91] | 180 | #endif /* CONFIG_SMP */
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| [b45c443] | 181 |
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| [06e1e95] | 182 | /** @}
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| [b45c443] | 183 | */
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