Changeset adec5b45 in mainline


Ignore:
Timestamp:
2012-01-27T22:19:12Z (13 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
1ccd0aa
Parents:
d4673296
Message:

Rename hw_map() to km_map() and add protection flags argument
to make it more generic.

Location:
kernel
Files:
14 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/arm32/src/mach/gta02/gta02.c

    rd4673296 radec5b45  
    102102        s3c24xx_irqc_regs_t *irqc_regs;
    103103
    104         gta02_timer = (void *) hw_map(S3C24XX_TIMER_ADDRESS, PAGE_SIZE);
    105         irqc_regs = (void *) hw_map(S3C24XX_IRQC_ADDRESS, PAGE_SIZE);
     104        gta02_timer = (void *) km_map(S3C24XX_TIMER_ADDRESS, PAGE_SIZE,
     105            PAGE_NOT_CACHEABLE);
     106        irqc_regs = (void *) km_map(S3C24XX_IRQC_ADDRESS, PAGE_SIZE,
     107            PAGE_NOT_CACHEABLE);
    106108
    107109        /* Initialize interrupt controller. */

  • kernel/arch/arm32/src/mach/integratorcp/integratorcp.c

    rd4673296 radec5b45  
    129129void icp_init(void)
    130130{
    131         icp_hw_map.uart = hw_map(ICP_UART, PAGE_SIZE);
    132         icp_hw_map.kbd_ctrl = hw_map(ICP_KBD, PAGE_SIZE);
     131        icp_hw_map.uart = km_map(ICP_UART, PAGE_SIZE,
     132            PAGE_WRITE | PAGE_NOT_CACHEABLE);
     133        icp_hw_map.kbd_ctrl = km_map(ICP_KBD, PAGE_SIZE, PAGE_NOT_CACHEABLE);
    133134        icp_hw_map.kbd_stat = icp_hw_map.kbd_ctrl + ICP_KBD_STAT;
    134135        icp_hw_map.kbd_data = icp_hw_map.kbd_ctrl + ICP_KBD_DATA;
    135136        icp_hw_map.kbd_intstat = icp_hw_map.kbd_ctrl + ICP_KBD_INTR_STAT;
    136         icp_hw_map.rtc = hw_map(ICP_RTC, PAGE_SIZE);
     137        icp_hw_map.rtc = km_map(ICP_RTC, PAGE_SIZE,
     138            PAGE_WRITE | PAGE_NOT_CACHEABLE);
    137139        icp_hw_map.rtc1_load = icp_hw_map.rtc + ICP_RTC1_LOAD_OFFSET;
    138140        icp_hw_map.rtc1_read = icp_hw_map.rtc + ICP_RTC1_READ_OFFSET;
    … …  
    142144        icp_hw_map.rtc1_intrstat = icp_hw_map.rtc + ICP_RTC1_INTRSTAT_OFFSET;
    143145
    144         icp_hw_map.irqc = hw_map(ICP_IRQC, PAGE_SIZE);
     146        icp_hw_map.irqc = km_map(ICP_IRQC, PAGE_SIZE,
     147            PAGE_WRITE | PAGE_NOT_CACHEABLE);
    145148        icp_hw_map.irqc_mask = icp_hw_map.irqc + ICP_IRQC_MASK_OFFSET;
    146149        icp_hw_map.irqc_unmask = icp_hw_map.irqc + ICP_IRQC_UNMASK_OFFSET;
    147         icp_hw_map.cmcr = hw_map(ICP_CMCR, PAGE_SIZE);
     150        icp_hw_map.cmcr = km_map(ICP_CMCR, PAGE_SIZE,
     151            PAGE_WRITE | PAGE_NOT_CACHEABLE);
    148152        icp_hw_map.sdramcr = icp_hw_map.cmcr + ICP_SDRAMCR_OFFSET;
    149         icp_hw_map.vga = hw_map(ICP_VGA, PAGE_SIZE);
     153        icp_hw_map.vga = km_map(ICP_VGA, PAGE_SIZE,
     154            PAGE_WRITE | PAGE_NOT_CACHEABLE);
    150155
    151156        hw_map_init_called = true;

  • kernel/arch/arm32/src/mach/testarm/testarm.c

    rd4673296 radec5b45  
    7272void gxemul_init(void)
    7373{
    74         gxemul_kbd = (void *) hw_map(GXEMUL_KBD_ADDRESS, PAGE_SIZE);
    75         gxemul_rtc = (void *) hw_map(GXEMUL_RTC_ADDRESS, PAGE_SIZE);
    76         gxemul_irqc = (void *) hw_map(GXEMUL_IRQC_ADDRESS, PAGE_SIZE);
     74        gxemul_kbd = (void *) km_map(GXEMUL_KBD_ADDRESS, PAGE_SIZE,
     75            PAGE_WRITE | PAGE_NOT_CACHEABLE);
     76        gxemul_rtc = (void *) km_map(GXEMUL_RTC_ADDRESS, PAGE_SIZE,
     77            PAGE_WRITE | PAGE_NOT_CACHEABLE);
     78        gxemul_irqc = (void *) km_map(GXEMUL_IRQC_ADDRESS, PAGE_SIZE,
     79            PAGE_WRITE | PAGE_NOT_CACHEABLE);
    7780}
    7881

  • kernel/arch/ia32/src/smp/smp.c

    rd4673296 radec5b45  
    7373       
    7474        if (config.cpu_count > 1) {
    75                 l_apic = (uint32_t *) hw_map((uintptr_t) l_apic, PAGE_SIZE);
    76                 io_apic = (uint32_t *) hw_map((uintptr_t) io_apic, PAGE_SIZE);
     75                l_apic = (uint32_t *) km_map((uintptr_t) l_apic, PAGE_SIZE,
     76                    PAGE_WRITE | PAGE_NOT_CACHEABLE);
     77                io_apic = (uint32_t *) km_map((uintptr_t) io_apic, PAGE_SIZE,
     78                    PAGE_WRITE | PAGE_NOT_CACHEABLE);
    7779        }
    7880}

  • kernel/arch/ia64/src/ia64.c

    rd4673296 radec5b45  
    8989static void iosapic_init(void)
    9090{
    91         uintptr_t IOSAPIC = hw_map(iosapic_base, PAGE_SIZE);
     91        uintptr_t IOSAPIC = km_map(iosapic_base, PAGE_SIZE,
     92            PAGE_WRITE | PAGE_NOT_CACHEABLE);
    9293        int i;
    9394       
    … …  
    117118        if (config.cpu_active == 1) {
    118119                /* Map the page with legacy I/O. */
    119                 legacyio_virt_base = hw_map(LEGACYIO_PHYS_BASE, LEGACYIO_SIZE);
     120                legacyio_virt_base = km_map(LEGACYIO_PHYS_BASE, LEGACYIO_SIZE,
     121                    PAGE_WRITE | PAGE_NOT_CACHEABLE);
    120122
    121123                iosapic_init();

  • kernel/arch/ppc32/src/drivers/pic.c

    rd4673296 radec5b45  
    4242void pic_init(uintptr_t base, size_t size, cir_t *cir, void **cir_arg)
    4343{
    44         pic = (uint32_t *) hw_map(base, size);
     44        pic = (uint32_t *) km_map(base, size, PAGE_WRITE | PAGE_NOT_CACHEABLE);
    4545        *cir = pic_ack_interrupt;
    4646        *cir_arg = NULL;

  • kernel/arch/ppc32/src/ppc32.c

    rd4673296 radec5b45  
    209209                size_t size = 2 * PAGE_SIZE;
    210210               
    211                 cuda_t *cuda = (cuda_t *)
    212                     (hw_map(aligned_addr, offset + size) + offset);
     211                cuda_t *cuda = (cuda_t *) (km_map(aligned_addr, offset + size,
     212                    PAGE_WRITE | PAGE_NOT_CACHEABLE) + offset);
    213213               
    214214                /* Initialize I/O controller */

  • kernel/arch/sparc64/src/drivers/kbd.c

    rd4673296 radec5b45  
    114114        size_t offset = pa - aligned_addr;
    115115       
    116         ns16550_t *ns16550 = (ns16550_t *)
    117            (hw_map(aligned_addr, offset + size) + offset);
     116        ns16550_t *ns16550 = (ns16550_t *) (km_map(aligned_addr, offset + size,
     117            PAGE_WRITE | PAGE_NOT_CACHEABLE) + offset);
    118118       
    119119        ns16550_instance_t *ns16550_instance = ns16550_init(ns16550, inr, cir, cir_arg);

  • kernel/arch/sparc64/src/drivers/pci.c

    rd4673296 radec5b45  
    109109        pci->model = PCI_SABRE;
    110110        pci->op = &pci_sabre_ops;
    111         pci->reg = (uint64_t *) hw_map(paddr, reg[SABRE_INTERNAL_REG].size);
     111        pci->reg = (uint64_t *) km_map(paddr, reg[SABRE_INTERNAL_REG].size,
     112            PAGE_WRITE | PAGE_NOT_CACHEABLE);
    112113
    113114        /*
    … …  
    156157        pci->model = PCI_PSYCHO;
    157158        pci->op = &pci_psycho_ops;
    158         pci->reg = (uint64_t *) hw_map(paddr, reg[PSYCHO_INTERNAL_REG].size);
     159        pci->reg = (uint64_t *) km_map(paddr, reg[PSYCHO_INTERNAL_REG].size,
     160            PAGE_WRITE | PAGE_NOT_CACHEABLE);
    159161
    160162        /*

  • kernel/genarch/src/drivers/ega/ega.c

    rd4673296 radec5b45  
    597597       
    598598        instance->base = base;
    599         instance->addr = (uint8_t *) hw_map(addr, EGA_VRAM_SIZE);
     599        instance->addr = (uint8_t *) km_map(addr, EGA_VRAM_SIZE,
     600            PAGE_WRITE | PAGE_NOT_CACHEABLE);
    600601        if (!instance->addr) {
    601602                LOG("Unable to EGA video memory.");

  • kernel/genarch/src/drivers/s3c24xx_uart/s3c24xx_uart.c

    rd4673296 radec5b45  
    114114        uart_dev->data = uart;
    115115
    116         uart->io = (s3c24xx_uart_io_t *) hw_map(paddr, PAGE_SIZE);
     116        uart->io = (s3c24xx_uart_io_t *) km_map(paddr, PAGE_SIZE,
     117            PAGE_WRITE | PAGE_NOT_CACHEABLE);
    117118        uart->indev = NULL;
    118119

  • kernel/genarch/src/fb/fb.c

    rd4673296 radec5b45  
    587587        size_t glyphsize = FONT_GLYPHS * instance->glyphbytes;
    588588       
    589         instance->addr = (uint8_t *) hw_map((uintptr_t) props->addr, fbsize);
     589        instance->addr = (uint8_t *) km_map((uintptr_t) props->addr, fbsize,
     590            PAGE_WRITE | PAGE_NOT_CACHEABLE);
    590591        if (!instance->addr) {
    591592                LOG("Unable to map framebuffer.");

  • kernel/generic/include/mm/km.h

    rd4673296 radec5b45  
    4949extern bool km_is_non_identity(uintptr_t);
    5050
    51 extern uintptr_t hw_map(uintptr_t, size_t);
     51extern uintptr_t km_map(uintptr_t, size_t, unsigned int);
    5252
    5353extern uintptr_t km_temporary_page_get(uintptr_t *, frame_flags_t);

  • kernel/generic/src/mm/km.c

    rd4673296 radec5b45  
    124124}
    125125
    126 uintptr_t hw_map(uintptr_t physaddr, size_t size)
    127 {
    128         uintptr_t virtaddr;
     126uintptr_t km_map(uintptr_t paddr, size_t size, unsigned int flags)
     127{
     128        uintptr_t vaddr;
    129129        size_t asize;
    130130        size_t align;
    131         pfn_t i;
     131        uintptr_t offs;
    132132
    133133        asize = ALIGN_UP(size, PAGE_SIZE);
    134134        align = ispwr2(size) ? size : (1U << (fnzb(size) + 1));
    135         virtaddr = km_page_alloc(asize, max(PAGE_SIZE, align));
     135        vaddr = km_page_alloc(asize, max(PAGE_SIZE, align));
    136136
    137137        page_table_lock(AS_KERNEL, true);
    138         for (i = 0; i < ADDR2PFN(asize); i++) {
    139                 uintptr_t addr = PFN2ADDR(i);
    140                 page_mapping_insert(AS_KERNEL, virtaddr + addr, physaddr + addr,
    141                     PAGE_NOT_CACHEABLE | PAGE_WRITE);
     138        for (offs = 0; offs < asize; offs += PAGE_SIZE) {
     139                page_mapping_insert(AS_KERNEL, vaddr + offs, paddr + offs,
     140                    flags);
    142141        }
    143142        page_table_unlock(AS_KERNEL, true);
    144143       
    145         return virtaddr;
     144        return vaddr;
    146145}
    147146
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