source: mainline/kernel/arch/ia32/src/smp/mps.c@ 86b31ba9

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 86b31ba9 was 26678e5, checked in by Jakub Jermar <jakub@…>, 19 years ago

Make SMP related parts of main.c more generic.
Move initialization of local APIC to architecture specific code.
Add arch_post_cpu_init() to support the above.
  • Property mode set to 100644
File size: 10.3 KB
Line 
1/*
2 * Copyright (C) 2001-2005 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ia32
30 * @{
31 */
32/** @file
33 */
34
35#ifdef CONFIG_SMP
36
37#include <config.h>
38#include <print.h>
39#include <debug.h>
40#include <arch/smp/mps.h>
41#include <arch/smp/apic.h>
42#include <arch/smp/smp.h>
43#include <func.h>
44#include <arch/types.h>
45#include <typedefs.h>
46#include <cpu.h>
47#include <arch/asm.h>
48#include <arch/bios/bios.h>
49#include <mm/frame.h>
50
51/*
52 * MultiProcessor Specification detection code.
53 */
54
55#define FS_SIGNATURE 0x5f504d5f
56#define CT_SIGNATURE 0x504d4350
57
58int mps_fs_check(uint8_t *base);
59int mps_ct_check(void);
60
61int configure_via_ct(void);
62int configure_via_default(uint8_t n);
63
64int ct_processor_entry(struct __processor_entry *pr);
65void ct_bus_entry(struct __bus_entry *bus);
66void ct_io_apic_entry(struct __io_apic_entry *ioa);
67void ct_io_intr_entry(struct __io_intr_entry *iointr);
68void ct_l_intr_entry(struct __l_intr_entry *lintr);
69
70void ct_extended_entries(void);
71
72static struct mps_fs *fs;
73static struct mps_ct *ct;
74
75struct __processor_entry *processor_entries = NULL;
76struct __bus_entry *bus_entries = NULL;
77struct __io_apic_entry *io_apic_entries = NULL;
78struct __io_intr_entry *io_intr_entries = NULL;
79struct __l_intr_entry *l_intr_entries = NULL;
80
81int processor_entry_cnt = 0;
82int bus_entry_cnt = 0;
83int io_apic_entry_cnt = 0;
84int io_intr_entry_cnt = 0;
85int l_intr_entry_cnt = 0;
86
87/*
88 * Implementation of IA-32 SMP configuration interface.
89 */
90static count_t get_cpu_count(void);
91static bool is_cpu_enabled(index_t i);
92static bool is_bsp(index_t i);
93static uint8_t get_cpu_apic_id(index_t i);
94static int mps_irq_to_pin(int irq);
95
96struct smp_config_operations mps_config_operations = {
97 .cpu_count = get_cpu_count,
98 .cpu_enabled = is_cpu_enabled,
99 .cpu_bootstrap = is_bsp,
100 .cpu_apic_id = get_cpu_apic_id,
101 .irq_to_pin = mps_irq_to_pin
102};
103
104count_t get_cpu_count(void)
105{
106 return processor_entry_cnt;
107}
108
109bool is_cpu_enabled(index_t i)
110{
111 ASSERT(i < processor_entry_cnt);
112 return processor_entries[i].cpu_flags & 0x1;
113}
114
115bool is_bsp(index_t i)
116{
117 ASSERT(i < processor_entry_cnt);
118 return processor_entries[i].cpu_flags & 0x2;
119}
120
121uint8_t get_cpu_apic_id(index_t i)
122{
123 ASSERT(i < processor_entry_cnt);
124 return processor_entries[i].l_apic_id;
125}
126
127
128/*
129 * Used to check the integrity of the MP Floating Structure.
130 */
131int mps_fs_check(uint8_t *base)
132{
133 int i;
134 uint8_t sum;
135
136 for (i = 0, sum = 0; i < 16; i++)
137 sum += base[i];
138
139 return !sum;
140}
141
142/*
143 * Used to check the integrity of the MP Configuration Table.
144 */
145int mps_ct_check(void)
146{
147 uint8_t *base = (uint8_t *) ct;
148 uint8_t *ext = base + ct->base_table_length;
149 uint8_t sum;
150 int i;
151
152 /* count the checksum for the base table */
153 for (i=0,sum=0; i < ct->base_table_length; i++)
154 sum += base[i];
155
156 if (sum)
157 return 0;
158
159 /* count the checksum for the extended table */
160 for (i=0,sum=0; i < ct->ext_table_length; i++)
161 sum += ext[i];
162
163 return sum == ct->ext_table_checksum;
164}
165
166void mps_init(void)
167{
168 uint8_t *addr[2] = { NULL, (uint8_t *) PA2KA(0xf0000) };
169 int i, j, length[2] = { 1024, 64*1024 };
170
171
172 /*
173 * Find MP Floating Pointer Structure
174 * 1a. search first 1K of EBDA
175 * 1b. if EBDA is undefined, search last 1K of base memory
176 * 2. search 64K starting at 0xf0000
177 */
178
179 addr[0] = (uint8_t *) PA2KA(ebda ? ebda : 639 * 1024);
180 for (i = 0; i < 2; i++) {
181 for (j = 0; j < length[i]; j += 16) {
182 if (*((uint32_t *) &addr[i][j]) == FS_SIGNATURE && mps_fs_check(&addr[i][j])) {
183 fs = (struct mps_fs *) &addr[i][j];
184 goto fs_found;
185 }
186 }
187 }
188
189 return;
190
191fs_found:
192 printf("%p: MPS Floating Pointer Structure\n", fs);
193
194 if (fs->config_type == 0 && fs->configuration_table) {
195 if (fs->mpfib2 >> 7) {
196 printf("%s: PIC mode not supported\n", __FUNCTION__);
197 return;
198 }
199
200 ct = (struct mps_ct *)PA2KA((uintptr_t)fs->configuration_table);
201 config.cpu_count = configure_via_ct();
202 }
203 else
204 config.cpu_count = configure_via_default(fs->config_type);
205
206 return;
207}
208
209int configure_via_ct(void)
210{
211 uint8_t *cur;
212 int i, cnt;
213
214 if (ct->signature != CT_SIGNATURE) {
215 printf("%s: bad ct->signature\n", __FUNCTION__);
216 return 1;
217 }
218 if (!mps_ct_check()) {
219 printf("%s: bad ct checksum\n", __FUNCTION__);
220 return 1;
221 }
222 if (ct->oem_table) {
223 printf("%s: ct->oem_table not supported\n", __FUNCTION__);
224 return 1;
225 }
226
227 l_apic = (uint32_t *)(uintptr_t)ct->l_apic;
228
229 cnt = 0;
230 cur = &ct->base_table[0];
231 for (i=0; i < ct->entry_count; i++) {
232 switch (*cur) {
233 /* Processor entry */
234 case 0:
235 processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;
236 processor_entry_cnt++;
237 cnt += ct_processor_entry((struct __processor_entry *) cur);
238 cur += 20;
239 break;
240
241 /* Bus entry */
242 case 1:
243 bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;
244 bus_entry_cnt++;
245 ct_bus_entry((struct __bus_entry *) cur);
246 cur += 8;
247 break;
248
249 /* I/O Apic */
250 case 2:
251 io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;
252 io_apic_entry_cnt++;
253 ct_io_apic_entry((struct __io_apic_entry *) cur);
254 cur += 8;
255 break;
256
257 /* I/O Interrupt Assignment */
258 case 3:
259 io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;
260 io_intr_entry_cnt++;
261 ct_io_intr_entry((struct __io_intr_entry *) cur);
262 cur += 8;
263 break;
264
265 /* Local Interrupt Assignment */
266 case 4:
267 l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;
268 l_intr_entry_cnt++;
269 ct_l_intr_entry((struct __l_intr_entry *) cur);
270 cur += 8;
271 break;
272
273 default:
274 /*
275 * Something is wrong. Fallback to UP mode.
276 */
277
278 printf("%s: ct badness\n", __FUNCTION__);
279 return 1;
280 }
281 }
282
283 /*
284 * Process extended entries.
285 */
286 ct_extended_entries();
287 return cnt;
288}
289
290int configure_via_default(uint8_t n)
291{
292 /*
293 * Not yet implemented.
294 */
295 printf("%s: not supported\n", __FUNCTION__);
296 return 1;
297}
298
299
300int ct_processor_entry(struct __processor_entry *pr)
301{
302 /*
303 * Ignore processors which are not marked enabled.
304 */
305 if ((pr->cpu_flags & (1<<0)) == 0)
306 return 0;
307
308 apic_id_mask |= (1<<pr->l_apic_id);
309 return 1;
310}
311
312void ct_bus_entry(struct __bus_entry *bus)
313{
314#ifdef MPSCT_VERBOSE
315 char buf[7];
316 memcpy((void *) buf, (void *) bus->bus_type, 6);
317 buf[6] = 0;
318 printf("bus%d: %s\n", bus->bus_id, buf);
319#endif
320}
321
322void ct_io_apic_entry(struct __io_apic_entry *ioa)
323{
324 static int io_apic_count = 0;
325
326 /* this ioapic is marked unusable */
327 if ((ioa->io_apic_flags & 1) == 0)
328 return;
329
330 if (io_apic_count++ > 0) {
331 /*
332 * Multiple IO APIC's are currently not supported.
333 */
334 return;
335 }
336
337 io_apic = (uint32_t *)(uintptr_t)ioa->io_apic;
338}
339
340//#define MPSCT_VERBOSE
341void ct_io_intr_entry(struct __io_intr_entry *iointr)
342{
343#ifdef MPSCT_VERBOSE
344 switch (iointr->intr_type) {
345 case 0: printf("INT"); break;
346 case 1: printf("NMI"); break;
347 case 2: printf("SMI"); break;
348 case 3: printf("ExtINT"); break;
349 }
350 putchar(',');
351 switch (iointr->poel&3) {
352 case 0: printf("bus-like"); break;
353 case 1: printf("active high"); break;
354 case 2: printf("reserved"); break;
355 case 3: printf("active low"); break;
356 }
357 putchar(',');
358 switch ((iointr->poel>>2)&3) {
359 case 0: printf("bus-like"); break;
360 case 1: printf("edge-triggered"); break;
361 case 2: printf("reserved"); break;
362 case 3: printf("level-triggered"); break;
363 }
364 putchar(',');
365 printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);
366 putchar(',');
367 printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);
368 putchar('\n');
369#endif
370}
371
372void ct_l_intr_entry(struct __l_intr_entry *lintr)
373{
374#ifdef MPSCT_VERBOSE
375 switch (lintr->intr_type) {
376 case 0: printf("INT"); break;
377 case 1: printf("NMI"); break;
378 case 2: printf("SMI"); break;
379 case 3: printf("ExtINT"); break;
380 }
381 putchar(',');
382 switch (lintr->poel&3) {
383 case 0: printf("bus-like"); break;
384 case 1: printf("active high"); break;
385 case 2: printf("reserved"); break;
386 case 3: printf("active low"); break;
387 }
388 putchar(',');
389 switch ((lintr->poel>>2)&3) {
390 case 0: printf("bus-like"); break;
391 case 1: printf("edge-triggered"); break;
392 case 2: printf("reserved"); break;
393 case 3: printf("level-triggered"); break;
394 }
395 putchar(',');
396 printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);
397 putchar(',');
398 printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);
399 putchar('\n');
400#endif
401}
402
403void ct_extended_entries(void)
404{
405 uint8_t *ext = (uint8_t *) ct + ct->base_table_length;
406 uint8_t *cur;
407
408 for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) {
409 switch (cur[CT_EXT_ENTRY_TYPE]) {
410 default:
411 printf("%p: skipping MP Configuration Table extended entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);
412 break;
413 }
414 }
415}
416
417int mps_irq_to_pin(int irq)
418{
419 int i;
420
421 for(i=0;i<io_intr_entry_cnt;i++) {
422 if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0)
423 return io_intr_entries[i].dst_io_apic_pin;
424 }
425
426 return -1;
427}
428
429#endif /* CONFIG_SMP */
430
431/** @}
432 */
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