source: mainline/kernel/arch/ia32/src/interrupt.c@ 935e28c

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 935e28c was 1066041, checked in by Adam Hraska <adam.hraska+hos@…>, 13 years ago

preemption_disable: Turned functions into macros. Moved THREAD, AS, TASK, CPU into thread.h, as.h, task.h, cpu.h to fix the include hell that ensued.

  • Property mode set to 100644
File size: 7.1 KB
Line 
1/*
2 * Copyright (c) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup ia32interrupt
30 * @{
31 */
32/** @file
33 */
34
35#include <arch/interrupt.h>
36#include <syscall/syscall.h>
37#include <print.h>
38#include <debug.h>
39#include <panic.h>
40#include <arch/drivers/i8259.h>
41#include <func.h>
42#include <cpu.h>
43#include <arch/asm.h>
44#include <mm/tlb.h>
45#include <mm/as.h>
46#include <arch.h>
47#include <proc/thread.h>
48#include <proc/task.h>
49#include <synch/spinlock.h>
50#include <arch/ddi/ddi.h>
51#include <ipc/sysipc.h>
52#include <interrupt.h>
53#include <ddi/irq.h>
54#include <symtab.h>
55#include <stacktrace.h>
56#include <smp/smp_call.h>
57#include <proc/task.h>
58
59/*
60 * Interrupt and exception dispatching.
61 */
62
63void (* disable_irqs_function)(uint16_t irqmask) = NULL;
64void (* enable_irqs_function)(uint16_t irqmask) = NULL;
65void (* eoi_function)(void) = NULL;
66const char *irqs_info = NULL;
67
68void istate_decode(istate_t *istate)
69{
70 printf("cs =%0#10" PRIx32 "\teip=%0#10" PRIx32 "\t"
71 "efl=%0#10" PRIx32 "\terr=%0#10" PRIx32 "\n",
72 istate->cs, istate->eip, istate->eflags, istate->error_word);
73
74 printf("ds =%0#10" PRIx32 "\tes =%0#10" PRIx32 "\t"
75 "fs =%0#10" PRIx32 "\tgs =%0#10" PRIx32 "\n",
76 istate->ds, istate->es, istate->fs, istate->gs);
77
78 if (istate_from_uspace(istate))
79 printf("ss =%0#10" PRIx32 "\n", istate->ss);
80
81 printf("eax=%0#10" PRIx32 "\tebx=%0#10" PRIx32 "\t"
82 "ecx=%0#10" PRIx32 "\tedx=%0#10" PRIx32 "\n",
83 istate->eax, istate->ebx, istate->ecx, istate->edx);
84
85 printf("esi=%0#10" PRIx32 "\tedi=%0#10" PRIx32 "\t"
86 "ebp=%0#10" PRIx32 "\tesp=%0#10" PRIx32 "\n",
87 istate->esi, istate->edi, istate->ebp,
88 istate_from_uspace(istate) ? istate->esp :
89 (uintptr_t) &istate->esp);
90}
91
92static void trap_virtual_eoi(void)
93{
94 if (eoi_function)
95 eoi_function();
96 else
97 panic("No eoi_function.");
98
99}
100
101static void null_interrupt(unsigned int n, istate_t *istate)
102{
103 fault_if_from_uspace(istate, "Unserviced interrupt: %u.", n);
104 panic_badtrap(istate, n, "Unserviced interrupt: %u.", n);
105}
106
107static void de_fault(unsigned int n, istate_t *istate)
108{
109 fault_if_from_uspace(istate, "Divide error.");
110 panic_badtrap(istate, n, "Divide error.");
111}
112
113/** General Protection Fault. */
114static void gp_fault(unsigned int n __attribute__((unused)), istate_t *istate)
115{
116 if (TASK) {
117 irq_spinlock_lock(&TASK->lock, false);
118 size_t ver = TASK->arch.iomapver;
119 irq_spinlock_unlock(&TASK->lock, false);
120
121 if (CPU->arch.iomapver_copy != ver) {
122 /*
123 * This fault can be caused by an early access
124 * to I/O port because of an out-dated
125 * I/O Permission bitmap installed on CPU.
126 * Install the fresh copy and restart
127 * the instruction.
128 */
129 io_perm_bitmap_install();
130 return;
131 }
132 fault_if_from_uspace(istate, "General protection fault.");
133 }
134 panic_badtrap(istate, n, "General protection fault.");
135}
136
137static void ss_fault(unsigned int n __attribute__((unused)), istate_t *istate)
138{
139 fault_if_from_uspace(istate, "Stack fault.");
140 panic_badtrap(istate, n, "Stack fault.");
141}
142
143static void simd_fp_exception(unsigned int n __attribute__((unused)), istate_t *istate)
144{
145 uint32_t mxcsr;
146 asm volatile (
147 "stmxcsr %[mxcsr]\n"
148 : [mxcsr] "=m" (mxcsr)
149 );
150
151 fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR=%#0" PRIx32 ".",
152 mxcsr);
153 panic_badtrap(istate, n, "SIMD FP exception");
154}
155
156static void nm_fault(unsigned int n __attribute__((unused)),
157 istate_t *istate __attribute__((unused)))
158{
159#ifdef CONFIG_FPU_LAZY
160 scheduler_fpu_lazy_request();
161#else
162 fault_if_from_uspace(istate, "FPU fault.");
163 panic_badtrap(istate, n, "FPU fault.");
164#endif
165}
166
167#ifdef CONFIG_SMP
168static void tlb_shootdown_ipi(unsigned int n __attribute__((unused)),
169 istate_t *istate __attribute__((unused)))
170{
171 trap_virtual_eoi();
172 tlb_shootdown_ipi_recv();
173}
174
175static void arch_smp_call_ipi_recv(unsigned int n, istate_t *istate)
176{
177 trap_virtual_eoi();
178 smp_call_ipi_recv();
179}
180#endif
181
182/** Handler of IRQ exceptions */
183static void irq_interrupt(unsigned int n, istate_t *istate __attribute__((unused)))
184{
185 ASSERT(n >= IVT_IRQBASE);
186
187 unsigned int inum = n - IVT_IRQBASE;
188 bool ack = false;
189 ASSERT(inum < IRQ_COUNT);
190 ASSERT((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
191
192 irq_t *irq = irq_dispatch_and_lock(inum);
193 if (irq) {
194 /*
195 * The IRQ handler was found.
196 */
197
198 if (irq->preack) {
199 /* Send EOI before processing the interrupt */
200 trap_virtual_eoi();
201 ack = true;
202 }
203 irq->handler(irq);
204 irq_spinlock_unlock(&irq->lock, false);
205 } else {
206 /*
207 * Spurious interrupt.
208 */
209#ifdef CONFIG_DEBUG
210 printf("cpu%u: spurious interrupt (inum=%u)\n", CPU->id, inum);
211#endif
212 }
213
214 if (!ack)
215 trap_virtual_eoi();
216}
217
218void interrupt_init(void)
219{
220 unsigned int i;
221
222 for (i = 0; i < IVT_ITEMS; i++)
223 exc_register(i, "null", false, (iroutine_t) null_interrupt);
224
225 for (i = 0; i < IRQ_COUNT; i++) {
226 if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
227 exc_register(IVT_IRQBASE + i, "irq", true,
228 (iroutine_t) irq_interrupt);
229 }
230
231 exc_register(0, "de_fault", true, (iroutine_t) de_fault);
232 exc_register(7, "nm_fault", true, (iroutine_t) nm_fault);
233 exc_register(12, "ss_fault", true, (iroutine_t) ss_fault);
234 exc_register(13, "gp_fault", true, (iroutine_t) gp_fault);
235 exc_register(19, "simd_fp", true, (iroutine_t) simd_fp_exception);
236
237#ifdef CONFIG_SMP
238 exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", true,
239 (iroutine_t) tlb_shootdown_ipi);
240 exc_register(VECTOR_SMP_CALL_IPI, "smp_call", true,
241 (iroutine_t) arch_smp_call_ipi_recv);
242#endif
243}
244
245void trap_virtual_enable_irqs(uint16_t irqmask)
246{
247 if (enable_irqs_function)
248 enable_irqs_function(irqmask);
249 else
250 panic("No enable_irqs_function.");
251}
252
253void trap_virtual_disable_irqs(uint16_t irqmask)
254{
255 if (disable_irqs_function)
256 disable_irqs_function(irqmask);
257 else
258 panic("No disable_irqs_function.");
259}
260
261/** @}
262 */
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