source: mainline/kernel/arch/ia32/src/ia32.c@ 1f5c9c96

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 1f5c9c96 was 1f5c9c96, checked in by Martin Decky <martin@…>, 14 years ago

implement multiboot v2 specification and use it in GRUB for UEFI

  • improve multiboot v1 code, move defines to a common location
  • rename VESA framebuffer stuff to generic "boot framebuffer"
  • small collateral changes
  • Property mode set to 100644
File size: 6.1 KB
RevLine 
[f761f1eb]1/*
[df4ed85]2 * Copyright (c) 2001-2004 Jakub Jermar
[deca67b]3 * Copyright (c) 2009 Jiri Svoboda
4 * Copyright (c) 2009 Martin Decky
[f761f1eb]5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * - Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * - Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * - The name of the author may not be used to endorse or promote products
17 * derived from this software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
21 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
24 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
28 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 */
30
[06e1e95]31/** @addtogroup ia32
[b45c443]32 * @{
33 */
34/** @file
35 */
36
[f761f1eb]37#include <arch.h>
38
[d99c1d2]39#include <typedefs.h>
[f761f1eb]40
41#include <arch/pm.h>
42
[5d8d71e]43#include <genarch/multiboot/multiboot.h>
[1f5c9c96]44#include <genarch/multiboot/multiboot2.h>
[91825d90]45#include <genarch/drivers/legacy/ia32/io.h>
[f245145]46#include <genarch/drivers/ega/ega.h>
[1f5c9c96]47#include <genarch/fb/bfb.h>
[411b6a6]48#include <genarch/drivers/i8042/i8042.h>
49#include <genarch/kbrd/kbrd.h>
[80d31883]50#include <arch/drivers/i8254.h>
51#include <arch/drivers/i8259.h>
[f761f1eb]52
53#include <arch/context.h>
54
55#include <config.h>
56
57#include <arch/interrupt.h>
[ad36bd6]58#include <arch/asm.h>
[e16e036a]59#include <genarch/acpi/acpi.h>
[9c0a9b3]60
61#include <arch/bios/bios.h>
62
[fcfac420]63#include <interrupt.h>
[cea12e9]64#include <ddi/irq.h>
[23d22eb]65#include <arch/debugger.h>
[281b607]66#include <proc/thread.h>
67#include <syscall/syscall.h>
[41d33ac]68#include <console/console.h>
[4c7257b]69#include <sysinfo/sysinfo.h>
[deca67b]70#include <arch/boot/boot.h>
[eae4e8f]71#include <memstr.h>
[ad36bd6]72
[26678e5]73#ifdef CONFIG_SMP
74#include <arch/smp/apic.h>
75#endif
76
[5d8d71e]77/** Perform ia32-specific initialization before main_bsp() is called.
[deca67b]78 *
[1f5c9c96]79 * @param signature Multiboot signature.
80 * @param info Multiboot information structure.
81 *
[deca67b]82 */
[1f5c9c96]83void arch_pre_main(uint32_t signature, void *info)
[deca67b]84{
[5d8d71e]85 /* Parse multiboot information obtained from the bootloader. */
[1f5c9c96]86 multiboot_info_parse(signature, (multiboot_info_t *) info);
87 multiboot2_info_parse(signature, (multiboot2_info_t *) info);
[deca67b]88
89#ifdef CONFIG_SMP
90 /* Copy AP bootstrap routines below 1 MB. */
91 memcpy((void *) AP_BOOT_OFFSET, (void *) BOOT_OFFSET,
92 (size_t) &_hardcoded_unmapped_size);
93#endif
94}
95
[f07bba5]96void arch_pre_mm_init(void)
[f761f1eb]97{
98 pm_init();
99
100 if (config.cpu_active == 1) {
[cea12e9]101 interrupt_init();
[dba84ff]102 bios_init();
[5dce48b9]103
[cea12e9]104 /* PIC */
105 i8259_init();
[f761f1eb]106 }
107}
108
[6ba143d]109void arch_post_mm_init(void)
[7eade45]110{
[425913b]111 if (config.cpu_active == 1) {
[cea12e9]112 /* Initialize IRQ routing */
113 irq_init(IRQ_COUNT, IRQ_COUNT);
114
115 /* hard clock */
116 i8254_init();
[ec944b1]117
[a71c158]118#if (defined(CONFIG_FB) || defined(CONFIG_EGA))
[1f5c9c96]119 bool bfb = false;
[a71c158]120#endif
121
[22cf454d]122#ifdef CONFIG_FB
[1f5c9c96]123 bfb = bfb_init();
[22cf454d]124#endif
[a71c158]125
[ec944b1]126#ifdef CONFIG_EGA
[1f5c9c96]127 if (!bfb) {
[a71c158]128 outdev_t *egadev = ega_init(EGA_BASE, EGA_VIDEORAM);
129 if (egadev)
130 stdout_wire(egadev);
131 }
[ec944b1]132#endif
[22cf454d]133
[23d22eb]134 /* Enable debugger */
135 debugger_init();
[381465e]136 /* Merge all memory zones to 1 big zone */
137 zone_merge_all();
[babcb148]138 }
139}
140
[26678e5]141void arch_post_cpu_init()
142{
143#ifdef CONFIG_SMP
[49eb681]144 if (config.cpu_active > 1) {
[26678e5]145 l_apic_init();
146 l_apic_debug();
147 }
148#endif
149}
150
[7453929]151void arch_pre_smp_init(void)
[babcb148]152{
153 if (config.cpu_active == 1) {
[f619ec11]154#ifdef CONFIG_SMP
[85bfdcc8]155 acpi_init();
[f619ec11]156#endif /* CONFIG_SMP */
[425913b]157 }
[7eade45]158}
159
[7453929]160void arch_post_smp_init(void)
161{
[eff1f033]162 /* Currently the only supported platform for ia32 is 'pc'. */
163 static const char *platform = "pc";
164
165 sysinfo_set_item_data("platform", NULL, (void *) platform,
166 str_size(platform));
167
[2a34e4c]168#ifdef CONFIG_PC_KBD
[411b6a6]169 /*
[2a34e4c]170 * Initialize the i8042 controller. Then initialize the keyboard
171 * module and connect it to i8042. Enable keyboard interrupts.
[411b6a6]172 */
[c2417bc]173 i8042_instance_t *i8042_instance = i8042_init((i8042_t *) I8042_BASE, IRQ_KBD);
174 if (i8042_instance) {
175 kbrd_instance_t *kbrd_instance = kbrd_init();
176 if (kbrd_instance) {
177 indev_t *sink = stdin_wire();
178 indev_t *kbrd = kbrd_wire(kbrd_instance, sink);
179 i8042_wire(i8042_instance, kbrd);
180 trap_virtual_enable_irqs(1 << IRQ_KBD);
[385a3d6]181 trap_virtual_enable_irqs(1 << IRQ_MOUSE);
[c2417bc]182 }
[2a34e4c]183 }
184
[4c7257b]185 /*
186 * This is the necessary evil until the userspace driver is entirely
187 * self-sufficient.
188 */
[385a3d6]189 sysinfo_set_item_val("i8042", NULL, true);
190 sysinfo_set_item_val("i8042.inr_a", NULL, IRQ_KBD);
191 sysinfo_set_item_val("i8042.inr_b", NULL, IRQ_MOUSE);
192 sysinfo_set_item_val("i8042.address.physical", NULL,
[ff685c9]193 (uintptr_t) I8042_BASE);
[385a3d6]194 sysinfo_set_item_val("i8042.address.kernel", NULL,
[ff685c9]195 (uintptr_t) I8042_BASE);
[2a34e4c]196#endif
[849ed54]197
[acc7ce4]198 if (irqs_info != NULL)
199 sysinfo_set_item_val(irqs_info, NULL, true);
200
[f902d36]201 sysinfo_set_item_val("netif.ne2000.inr", NULL, IRQ_NE2000);
[7453929]202}
203
[f761f1eb]204void calibrate_delay_loop(void)
205{
206 i8254_calibrate_delay_loop();
[f701b236]207 if (config.cpu_active == 1) {
208 /*
209 * This has to be done only on UP.
210 * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
211 */
212 i8254_normal_operation();
213 }
[f761f1eb]214}
[281b607]215
[e1be3b6]216/** Set thread-local-storage pointer
[281b607]217 *
[3b712407]218 * TLS pointer is set in GS register. That means, the GS contains
219 * selector, and the descriptor->base is the correct address.
[281b607]220 */
[96b02eb9]221sysarg_t sys_tls_set(sysarg_t addr)
[281b607]222{
[a6d4ceb]223 THREAD->arch.tls = addr;
[281b607]224 set_tls_desc(addr);
[a71c158]225
[281b607]226 return 0;
227}
[41d33ac]228
[6da1013f]229/** Construct function pointer
230 *
231 * @param fptr function pointer structure
232 * @param addr function address
233 * @param caller calling function address
234 *
235 * @return address of the function pointer
236 *
237 */
238void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
239{
240 return addr;
241}
242
[149d14e5]243void arch_reboot(void)
244{
245#ifdef CONFIG_PC_KBD
246 i8042_cpu_reset((i8042_t *) I8042_BASE);
247#endif
248}
249
[3a2f8aa]250void irq_initialize_arch(irq_t *irq)
251{
252 (void) irq;
253}
254
[06e1e95]255/** @}
[b45c443]256 */
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