| 1 | /*
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| 2 | * Copyright (c) 2001-2004 Jakub Jermar
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| 3 | * Copyright (c) 2009 Jiri Svoboda
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| 4 | * Copyright (c) 2009 Martin Decky
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| 5 | * All rights reserved.
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| 6 | *
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| 7 | * Redistribution and use in source and binary forms, with or without
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| 8 | * modification, are permitted provided that the following conditions
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| 9 | * are met:
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| 10 | *
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| 11 | * - Redistributions of source code must retain the above copyright
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| 12 | * notice, this list of conditions and the following disclaimer.
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| 13 | * - Redistributions in binary form must reproduce the above copyright
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| 14 | * notice, this list of conditions and the following disclaimer in the
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| 15 | * documentation and/or other materials provided with the distribution.
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| 16 | * - The name of the author may not be used to endorse or promote products
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| 17 | * derived from this software without specific prior written permission.
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| 18 | *
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| 19 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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| 20 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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| 21 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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| 22 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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| 23 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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| 24 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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| 25 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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| 26 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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| 27 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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| 28 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 29 | */
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| 30 |
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| 31 | /** @addtogroup ia32
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| 32 | * @{
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| 33 | */
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| 34 | /** @file
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| 35 | */
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| 36 |
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| 37 | #include <arch.h>
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| 38 |
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| 39 | #include <typedefs.h>
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| 40 |
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| 41 | #include <arch/pm.h>
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| 42 |
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| 43 | #include <genarch/multiboot/multiboot.h>
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| 44 | #include <genarch/multiboot/multiboot2.h>
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| 45 | #include <genarch/drivers/legacy/ia32/io.h>
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| 46 | #include <genarch/drivers/ega/ega.h>
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| 47 | #include <genarch/fb/bfb.h>
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| 48 | #include <genarch/drivers/i8042/i8042.h>
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| 49 | #include <genarch/kbrd/kbrd.h>
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| 50 | #include <arch/drivers/i8254.h>
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| 51 | #include <arch/drivers/i8259.h>
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| 52 |
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| 53 | #include <arch/context.h>
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| 54 |
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| 55 | #include <config.h>
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| 56 |
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| 57 | #include <arch/interrupt.h>
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| 58 | #include <arch/asm.h>
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| 59 | #include <genarch/acpi/acpi.h>
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| 60 |
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| 61 | #include <arch/bios/bios.h>
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| 62 |
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| 63 | #include <interrupt.h>
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| 64 | #include <ddi/irq.h>
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| 65 | #include <arch/debugger.h>
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| 66 | #include <proc/thread.h>
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| 67 | #include <syscall/syscall.h>
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| 68 | #include <console/console.h>
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| 69 | #include <sysinfo/sysinfo.h>
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| 70 | #include <arch/boot/boot.h>
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| 71 | #include <memstr.h>
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| 72 |
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| 73 | #ifdef CONFIG_SMP
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| 74 | #include <arch/smp/apic.h>
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| 75 | #endif
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| 76 |
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| 77 | /** Perform ia32-specific initialization before main_bsp() is called.
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| 78 | *
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| 79 | * @param signature Multiboot signature.
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| 80 | * @param info Multiboot information structure.
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| 81 | *
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| 82 | */
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| 83 | void arch_pre_main(uint32_t signature, void *info)
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| 84 | {
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| 85 | /* Parse multiboot information obtained from the bootloader. */
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| 86 | multiboot_info_parse(signature, (multiboot_info_t *) info);
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| 87 | multiboot2_info_parse(signature, (multiboot2_info_t *) info);
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| 88 |
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| 89 | #ifdef CONFIG_SMP
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| 90 | /* Copy AP bootstrap routines below 1 MB. */
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| 91 | memcpy((void *) AP_BOOT_OFFSET, (void *) BOOT_OFFSET,
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| 92 | (size_t) &_hardcoded_unmapped_size);
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| 93 | #endif
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| 94 | }
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| 95 |
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| 96 | void arch_pre_mm_init(void)
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| 97 | {
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| 98 | pm_init();
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| 99 |
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| 100 | if (config.cpu_active == 1) {
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| 101 | interrupt_init();
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| 102 | bios_init();
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| 103 |
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| 104 | /* PIC */
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| 105 | i8259_init();
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| 106 | }
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| 107 | }
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| 108 |
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| 109 | void arch_post_mm_init(void)
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| 110 | {
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| 111 | if (config.cpu_active == 1) {
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| 112 | /* Initialize IRQ routing */
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| 113 | irq_init(IRQ_COUNT, IRQ_COUNT);
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| 114 |
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| 115 | /* hard clock */
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| 116 | i8254_init();
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| 117 |
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| 118 | #if (defined(CONFIG_FB) || defined(CONFIG_EGA))
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| 119 | bool bfb = false;
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| 120 | #endif
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| 121 |
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| 122 | #ifdef CONFIG_FB
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| 123 | bfb = bfb_init();
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| 124 | #endif
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| 125 |
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| 126 | #ifdef CONFIG_EGA
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| 127 | if (!bfb) {
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| 128 | outdev_t *egadev = ega_init(EGA_BASE, EGA_VIDEORAM);
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| 129 | if (egadev)
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| 130 | stdout_wire(egadev);
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| 131 | }
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| 132 | #endif
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| 133 |
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| 134 | /* Enable debugger */
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| 135 | debugger_init();
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| 136 | /* Merge all memory zones to 1 big zone */
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| 137 | zone_merge_all();
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| 138 | }
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| 139 | }
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| 140 |
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| 141 | void arch_post_cpu_init()
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| 142 | {
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| 143 | #ifdef CONFIG_SMP
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| 144 | if (config.cpu_active > 1) {
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| 145 | l_apic_init();
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| 146 | l_apic_debug();
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| 147 | }
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| 148 | #endif
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| 149 | }
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| 150 |
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| 151 | void arch_pre_smp_init(void)
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| 152 | {
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| 153 | if (config.cpu_active == 1) {
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| 154 | #ifdef CONFIG_SMP
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| 155 | acpi_init();
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| 156 | #endif /* CONFIG_SMP */
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| 157 | }
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| 158 | }
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| 159 |
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| 160 | void arch_post_smp_init(void)
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| 161 | {
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| 162 | /* Currently the only supported platform for ia32 is 'pc'. */
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| 163 | static const char *platform = "pc";
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| 164 |
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| 165 | sysinfo_set_item_data("platform", NULL, (void *) platform,
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| 166 | str_size(platform));
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| 167 |
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| 168 | #ifdef CONFIG_PC_KBD
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| 169 | /*
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| 170 | * Initialize the i8042 controller. Then initialize the keyboard
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| 171 | * module and connect it to i8042. Enable keyboard interrupts.
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| 172 | */
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| 173 | i8042_instance_t *i8042_instance = i8042_init((i8042_t *) I8042_BASE, IRQ_KBD);
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| 174 | if (i8042_instance) {
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| 175 | kbrd_instance_t *kbrd_instance = kbrd_init();
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| 176 | if (kbrd_instance) {
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| 177 | indev_t *sink = stdin_wire();
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| 178 | indev_t *kbrd = kbrd_wire(kbrd_instance, sink);
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| 179 | i8042_wire(i8042_instance, kbrd);
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| 180 | trap_virtual_enable_irqs(1 << IRQ_KBD);
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| 181 | trap_virtual_enable_irqs(1 << IRQ_MOUSE);
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| 182 | }
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| 183 | }
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| 184 |
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| 185 | /*
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| 186 | * This is the necessary evil until the userspace driver is entirely
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| 187 | * self-sufficient.
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| 188 | */
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| 189 | sysinfo_set_item_val("i8042", NULL, true);
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| 190 | sysinfo_set_item_val("i8042.inr_a", NULL, IRQ_KBD);
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| 191 | sysinfo_set_item_val("i8042.inr_b", NULL, IRQ_MOUSE);
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| 192 | sysinfo_set_item_val("i8042.address.physical", NULL,
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| 193 | (uintptr_t) I8042_BASE);
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| 194 | sysinfo_set_item_val("i8042.address.kernel", NULL,
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| 195 | (uintptr_t) I8042_BASE);
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| 196 | #endif
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| 197 |
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| 198 | if (irqs_info != NULL)
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| 199 | sysinfo_set_item_val(irqs_info, NULL, true);
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| 200 |
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| 201 | sysinfo_set_item_val("netif.ne2000.inr", NULL, IRQ_NE2000);
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| 202 | }
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| 203 |
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| 204 | void calibrate_delay_loop(void)
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| 205 | {
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| 206 | i8254_calibrate_delay_loop();
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| 207 | if (config.cpu_active == 1) {
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| 208 | /*
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| 209 | * This has to be done only on UP.
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| 210 | * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
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| 211 | */
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| 212 | i8254_normal_operation();
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| 213 | }
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| 214 | }
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| 215 |
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| 216 | /** Set thread-local-storage pointer
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| 217 | *
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| 218 | * TLS pointer is set in GS register. That means, the GS contains
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| 219 | * selector, and the descriptor->base is the correct address.
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| 220 | */
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| 221 | sysarg_t sys_tls_set(sysarg_t addr)
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| 222 | {
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| 223 | THREAD->arch.tls = addr;
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| 224 | set_tls_desc(addr);
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| 225 |
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| 226 | return 0;
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| 227 | }
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| 228 |
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| 229 | /** Construct function pointer
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| 230 | *
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| 231 | * @param fptr function pointer structure
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| 232 | * @param addr function address
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| 233 | * @param caller calling function address
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| 234 | *
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| 235 | * @return address of the function pointer
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| 236 | *
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| 237 | */
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| 238 | void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
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| 239 | {
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| 240 | return addr;
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| 241 | }
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| 242 |
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| 243 | void arch_reboot(void)
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| 244 | {
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| 245 | #ifdef CONFIG_PC_KBD
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| 246 | i8042_cpu_reset((i8042_t *) I8042_BASE);
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| 247 | #endif
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| 248 | }
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| 249 |
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| 250 | void irq_initialize_arch(irq_t *irq)
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| 251 | {
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| 252 | (void) irq;
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| 253 | }
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| 254 |
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| 255 | /** @}
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| 256 | */
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