source: mainline/kernel/arch/amd64/src/interrupt.c@ 7e752b2

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 7e752b2 was 7e752b2, checked in by Martin Decky <martin@…>, 15 years ago
  • correct printf() formatting strings and corresponding arguments
  • minor cstyle changes and other small fixes
  • Property mode set to 100644
File size: 6.3 KB
RevLine 
[db3341e]1/*
[df4ed85]2 * Copyright (c) 2001-2004 Jakub Jermar
[db3341e]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[06e1e95]29/** @addtogroup amd64interrupt
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[db3341e]35#include <arch/interrupt.h>
36#include <print.h>
37#include <debug.h>
38#include <panic.h>
[80d31883]39#include <arch/drivers/i8259.h>
[db3341e]40#include <func.h>
41#include <cpu.h>
42#include <arch/asm.h>
43#include <mm/tlb.h>
[20d50a1]44#include <mm/as.h>
[db3341e]45#include <arch.h>
[3396f59]46#include <arch/asm.h>
[b49f4ae]47#include <proc/scheduler.h>
[1084a784]48#include <proc/thread.h>
[2382d09]49#include <proc/task.h>
50#include <synch/spinlock.h>
51#include <arch/ddi/ddi.h>
[5626277]52#include <interrupt.h>
[8607db8]53#include <ddi/irq.h>
[e2b762ec]54#include <symtab.h>
[304342e]55#include <stacktrace.h>
[e2b762ec]56
[8607db8]57/*
58 * Interrupt and exception dispatching.
59 */
60
61void (* disable_irqs_function)(uint16_t irqmask) = NULL;
62void (* enable_irqs_function)(uint16_t irqmask) = NULL;
63void (* eoi_function)(void) = NULL;
64
[22a28a69]65void istate_decode(istate_t *istate)
[8ec9bae]66{
[7e752b2]67 printf("cs =%#0" PRIx64 "\trip=%p\t"
68 "rfl=%#0" PRIx64 "\terr=%#0" PRIx64 "\n",
69 istate->cs, (void *) istate->rip,
70 istate->rflags, istate->error_word);
71
[9171f12]72 if (istate_from_uspace(istate))
[7e752b2]73 printf("ss =%#0" PRIx64 "\n", istate->ss);
[9171f12]74
[7e752b2]75 printf("rax=%#0" PRIx64 "\trbx=%#0" PRIx64 "\t"
76 "rcx=%#0" PRIx64 "\trdx=%#0" PRIx64 "\n",
[9171f12]77 istate->rax, istate->rbx, istate->rcx, istate->rdx);
[7e752b2]78
[9171f12]79 printf("rsi=%p\trdi=%p\trbp=%p\trsp=%p\n",
[7e752b2]80 (void *) istate->rsi, (void *) istate->rdi,
81 (void *) istate->rbp,
82 istate_from_uspace(istate) ? ((void *) istate->rsp) :
83 &istate->rsp);
84
85 printf("r8 =%#0" PRIx64 "\tr9 =%#0" PRIx64 "\t"
86 "r10=%#0" PRIx64 "\tr11=%#0" PRIx64 "\n",
[9171f12]87 istate->r8, istate->r9, istate->r10, istate->r11);
[7e752b2]88
89 printf("r12=%#0" PRIx64 "\tr13=%#0" PRIx64 "\t"
90 "r14=%#0" PRIx64 "\tr15=%#0" PRIx64 "\n",
[9171f12]91 istate->r12, istate->r13, istate->r14, istate->r15);
[8ec9bae]92}
[db3341e]93
[8607db8]94static void trap_virtual_eoi(void)
95{
96 if (eoi_function)
97 eoi_function();
98 else
[f651e80]99 panic("No eoi_function.");
[db3341e]100
[8607db8]101}
[db3341e]102
[214ec25c]103static void null_interrupt(unsigned int n, istate_t *istate)
[db3341e]104{
[214ec25c]105 fault_if_from_uspace(istate, "Unserviced interrupt: %u.", n);
[a043e39]106 panic_badtrap(istate, n, "Unserviced interrupt.");
[db3341e]107}
108
[214ec25c]109static void de_fault(unsigned int n, istate_t *istate)
[4491338]110{
111 fault_if_from_uspace(istate, "Divide error.");
[a043e39]112 panic_badtrap(istate, n, "Divide error.");
[4491338]113}
114
[da1bafb]115/** General Protection Fault.
116 *
117 */
[214ec25c]118static void gp_fault(unsigned int n, istate_t *istate)
[db3341e]119{
[2382d09]120 if (TASK) {
[da1bafb]121 irq_spinlock_lock(&TASK->lock, false);
122 size_t ver = TASK->arch.iomapver;
123 irq_spinlock_unlock(&TASK->lock, false);
124
[2382d09]125 if (CPU->arch.iomapver_copy != ver) {
126 /*
127 * This fault can be caused by an early access
128 * to I/O port because of an out-dated
129 * I/O Permission bitmap installed on CPU.
130 * Install the fresh copy and restart
131 * the instruction.
132 */
133 io_perm_bitmap_install();
134 return;
135 }
[f651e80]136 fault_if_from_uspace(istate, "General protection fault.");
[2382d09]137 }
[a043e39]138 panic_badtrap(istate, n, "General protection fault.");
[db3341e]139}
140
[214ec25c]141static void ss_fault(unsigned int n, istate_t *istate)
[db3341e]142{
[f651e80]143 fault_if_from_uspace(istate, "Stack fault.");
[a043e39]144 panic_badtrap(istate, n, "Stack fault.");
[db3341e]145}
146
[214ec25c]147static void nm_fault(unsigned int n, istate_t *istate)
[db3341e]148{
[6da1013f]149#ifdef CONFIG_FPU_LAZY
[b49f4ae]150 scheduler_fpu_lazy_request();
151#else
[f651e80]152 fault_if_from_uspace(istate, "FPU fault.");
153 panic("FPU fault.");
[b49f4ae]154#endif
[db3341e]155}
156
[cbc8ac6]157#ifdef CONFIG_SMP
[214ec25c]158static void tlb_shootdown_ipi(unsigned int n, istate_t *istate)
[db3341e]159{
160 trap_virtual_eoi();
161 tlb_shootdown_ipi_recv();
162}
[cbc8ac6]163#endif
[db3341e]164
[da1bafb]165/** Handler of IRQ exceptions.
166 *
167 */
[214ec25c]168static void irq_interrupt(unsigned int n, istate_t *istate)
[8607db8]169{
170 ASSERT(n >= IVT_IRQBASE);
171
[214ec25c]172 unsigned int inum = n - IVT_IRQBASE;
[7bcfbbc]173 bool ack = false;
[8607db8]174 ASSERT(inum < IRQ_COUNT);
175 ASSERT((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
[7bcfbbc]176
[8607db8]177 irq_t *irq = irq_dispatch_and_lock(inum);
178 if (irq) {
179 /*
180 * The IRQ handler was found.
181 */
[da1bafb]182
[7bcfbbc]183 if (irq->preack) {
184 /* Send EOI before processing the interrupt */
185 trap_virtual_eoi();
186 ack = true;
187 }
[6cd9aa6]188 irq->handler(irq);
[da1bafb]189 irq_spinlock_unlock(&irq->lock, false);
[8607db8]190 } else {
191 /*
192 * Spurious interrupt.
193 */
194#ifdef CONFIG_DEBUG
[214ec25c]195 printf("cpu%u: spurious interrupt (inum=%u)\n", CPU->id, inum);
[8607db8]196#endif
197 }
[7bcfbbc]198
199 if (!ack)
200 trap_virtual_eoi();
[8607db8]201}
202
203void interrupt_init(void)
204{
[b3b7e14a]205 unsigned int i;
[8607db8]206
207 for (i = 0; i < IVT_ITEMS; i++)
[b3b7e14a]208 exc_register(i, "null", false, (iroutine_t) null_interrupt);
[8607db8]209
210 for (i = 0; i < IRQ_COUNT; i++) {
211 if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
[b3b7e14a]212 exc_register(IVT_IRQBASE + i, "irq", true,
213 (iroutine_t) irq_interrupt);
[8607db8]214 }
215
[b3b7e14a]216 exc_register(0, "de_fault", true, (iroutine_t) de_fault);
217 exc_register(7, "nm_fault", true, (iroutine_t) nm_fault);
218 exc_register(12, "ss_fault", true, (iroutine_t) ss_fault);
219 exc_register(13, "gp_fault", true, (iroutine_t) gp_fault);
[8607db8]220
221#ifdef CONFIG_SMP
[b3b7e14a]222 exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", true,
223 (iroutine_t) tlb_shootdown_ipi);
[8607db8]224#endif
225}
226
[7f1c620]227void trap_virtual_enable_irqs(uint16_t irqmask)
[db3341e]228{
229 if (enable_irqs_function)
230 enable_irqs_function(irqmask);
231 else
[f651e80]232 panic("No enable_irqs_function.");
[db3341e]233}
234
[7f1c620]235void trap_virtual_disable_irqs(uint16_t irqmask)
[db3341e]236{
237 if (disable_irqs_function)
238 disable_irqs_function(irqmask);
239 else
[f651e80]240 panic("No disable_irqs_function.");
[db3341e]241}
242
[06e1e95]243/** @}
[b45c443]244 */
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