source: mainline/kernel/arch/amd64/src/interrupt.c@ 7e752b2

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since 7e752b2 was 7e752b2, checked in by Martin Decky <martin@…>, 15 years ago
  • correct printf() formatting strings and corresponding arguments
  • minor cstyle changes and other small fixes
  • Property mode set to 100644
File size: 6.3 KB
Line 
1/*
2 * Copyright (c) 2001-2004 Jakub Jermar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29/** @addtogroup amd64interrupt
30 * @{
31 */
32/** @file
33 */
34
35#include <arch/interrupt.h>
36#include <print.h>
37#include <debug.h>
38#include <panic.h>
39#include <arch/drivers/i8259.h>
40#include <func.h>
41#include <cpu.h>
42#include <arch/asm.h>
43#include <mm/tlb.h>
44#include <mm/as.h>
45#include <arch.h>
46#include <arch/asm.h>
47#include <proc/scheduler.h>
48#include <proc/thread.h>
49#include <proc/task.h>
50#include <synch/spinlock.h>
51#include <arch/ddi/ddi.h>
52#include <interrupt.h>
53#include <ddi/irq.h>
54#include <symtab.h>
55#include <stacktrace.h>
56
57/*
58 * Interrupt and exception dispatching.
59 */
60
61void (* disable_irqs_function)(uint16_t irqmask) = NULL;
62void (* enable_irqs_function)(uint16_t irqmask) = NULL;
63void (* eoi_function)(void) = NULL;
64
65void istate_decode(istate_t *istate)
66{
67 printf("cs =%#0" PRIx64 "\trip=%p\t"
68 "rfl=%#0" PRIx64 "\terr=%#0" PRIx64 "\n",
69 istate->cs, (void *) istate->rip,
70 istate->rflags, istate->error_word);
71
72 if (istate_from_uspace(istate))
73 printf("ss =%#0" PRIx64 "\n", istate->ss);
74
75 printf("rax=%#0" PRIx64 "\trbx=%#0" PRIx64 "\t"
76 "rcx=%#0" PRIx64 "\trdx=%#0" PRIx64 "\n",
77 istate->rax, istate->rbx, istate->rcx, istate->rdx);
78
79 printf("rsi=%p\trdi=%p\trbp=%p\trsp=%p\n",
80 (void *) istate->rsi, (void *) istate->rdi,
81 (void *) istate->rbp,
82 istate_from_uspace(istate) ? ((void *) istate->rsp) :
83 &istate->rsp);
84
85 printf("r8 =%#0" PRIx64 "\tr9 =%#0" PRIx64 "\t"
86 "r10=%#0" PRIx64 "\tr11=%#0" PRIx64 "\n",
87 istate->r8, istate->r9, istate->r10, istate->r11);
88
89 printf("r12=%#0" PRIx64 "\tr13=%#0" PRIx64 "\t"
90 "r14=%#0" PRIx64 "\tr15=%#0" PRIx64 "\n",
91 istate->r12, istate->r13, istate->r14, istate->r15);
92}
93
94static void trap_virtual_eoi(void)
95{
96 if (eoi_function)
97 eoi_function();
98 else
99 panic("No eoi_function.");
100
101}
102
103static void null_interrupt(unsigned int n, istate_t *istate)
104{
105 fault_if_from_uspace(istate, "Unserviced interrupt: %u.", n);
106 panic_badtrap(istate, n, "Unserviced interrupt.");
107}
108
109static void de_fault(unsigned int n, istate_t *istate)
110{
111 fault_if_from_uspace(istate, "Divide error.");
112 panic_badtrap(istate, n, "Divide error.");
113}
114
115/** General Protection Fault.
116 *
117 */
118static void gp_fault(unsigned int n, istate_t *istate)
119{
120 if (TASK) {
121 irq_spinlock_lock(&TASK->lock, false);
122 size_t ver = TASK->arch.iomapver;
123 irq_spinlock_unlock(&TASK->lock, false);
124
125 if (CPU->arch.iomapver_copy != ver) {
126 /*
127 * This fault can be caused by an early access
128 * to I/O port because of an out-dated
129 * I/O Permission bitmap installed on CPU.
130 * Install the fresh copy and restart
131 * the instruction.
132 */
133 io_perm_bitmap_install();
134 return;
135 }
136 fault_if_from_uspace(istate, "General protection fault.");
137 }
138 panic_badtrap(istate, n, "General protection fault.");
139}
140
141static void ss_fault(unsigned int n, istate_t *istate)
142{
143 fault_if_from_uspace(istate, "Stack fault.");
144 panic_badtrap(istate, n, "Stack fault.");
145}
146
147static void nm_fault(unsigned int n, istate_t *istate)
148{
149#ifdef CONFIG_FPU_LAZY
150 scheduler_fpu_lazy_request();
151#else
152 fault_if_from_uspace(istate, "FPU fault.");
153 panic("FPU fault.");
154#endif
155}
156
157#ifdef CONFIG_SMP
158static void tlb_shootdown_ipi(unsigned int n, istate_t *istate)
159{
160 trap_virtual_eoi();
161 tlb_shootdown_ipi_recv();
162}
163#endif
164
165/** Handler of IRQ exceptions.
166 *
167 */
168static void irq_interrupt(unsigned int n, istate_t *istate)
169{
170 ASSERT(n >= IVT_IRQBASE);
171
172 unsigned int inum = n - IVT_IRQBASE;
173 bool ack = false;
174 ASSERT(inum < IRQ_COUNT);
175 ASSERT((inum != IRQ_PIC_SPUR) && (inum != IRQ_PIC1));
176
177 irq_t *irq = irq_dispatch_and_lock(inum);
178 if (irq) {
179 /*
180 * The IRQ handler was found.
181 */
182
183 if (irq->preack) {
184 /* Send EOI before processing the interrupt */
185 trap_virtual_eoi();
186 ack = true;
187 }
188 irq->handler(irq);
189 irq_spinlock_unlock(&irq->lock, false);
190 } else {
191 /*
192 * Spurious interrupt.
193 */
194#ifdef CONFIG_DEBUG
195 printf("cpu%u: spurious interrupt (inum=%u)\n", CPU->id, inum);
196#endif
197 }
198
199 if (!ack)
200 trap_virtual_eoi();
201}
202
203void interrupt_init(void)
204{
205 unsigned int i;
206
207 for (i = 0; i < IVT_ITEMS; i++)
208 exc_register(i, "null", false, (iroutine_t) null_interrupt);
209
210 for (i = 0; i < IRQ_COUNT; i++) {
211 if ((i != IRQ_PIC_SPUR) && (i != IRQ_PIC1))
212 exc_register(IVT_IRQBASE + i, "irq", true,
213 (iroutine_t) irq_interrupt);
214 }
215
216 exc_register(0, "de_fault", true, (iroutine_t) de_fault);
217 exc_register(7, "nm_fault", true, (iroutine_t) nm_fault);
218 exc_register(12, "ss_fault", true, (iroutine_t) ss_fault);
219 exc_register(13, "gp_fault", true, (iroutine_t) gp_fault);
220
221#ifdef CONFIG_SMP
222 exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown", true,
223 (iroutine_t) tlb_shootdown_ipi);
224#endif
225}
226
227void trap_virtual_enable_irqs(uint16_t irqmask)
228{
229 if (enable_irqs_function)
230 enable_irqs_function(irqmask);
231 else
232 panic("No enable_irqs_function.");
233}
234
235void trap_virtual_disable_irqs(uint16_t irqmask)
236{
237 if (disable_irqs_function)
238 disable_irqs_function(irqmask);
239 else
240 panic("No disable_irqs_function.");
241}
242
243/** @}
244 */
Note: See TracBrowser for help on using the repository browser.