source: mainline/kernel/arch/amd64/src/ddi/ddi.c@ ca62f86

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since ca62f86 was 7de18418, checked in by Martin Decky <martin@…>, 12 years ago

partial implementation of a two-level bitmap data structure

  • Property mode set to 100644
File size: 4.8 KB
RevLine 
[f52e54da]1/*
[df4ed85]2 * Copyright (c) 2006 Jakub Jermar
[f52e54da]3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * - Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * - Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * - The name of the author may not be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
[06e1e95]29/** @addtogroup amd64ddi
[b45c443]30 * @{
31 */
32/** @file
33 */
34
[f52e54da]35#include <ddi/ddi.h>
[2382d09]36#include <arch/ddi/ddi.h>
[f52e54da]37#include <proc/task.h>
[d99c1d2]38#include <typedefs.h>
[73e9b49]39#include <adt/bitmap.h>
40#include <mm/slab.h>
41#include <arch/pm.h>
42#include <errno.h>
[c7c0b89b]43#include <arch/cpu.h>
[7de18418]44#include <cpu.h>
[2382d09]45#include <arch.h>
[ea199e5]46#include <align.h>
[f52e54da]47
48/** Enable I/O space range for task.
49 *
50 * Interrupts are disabled and task is locked.
51 *
[da1bafb]52 * @param task Task.
[f52e54da]53 * @param ioaddr Startign I/O space address.
[da1bafb]54 * @param size Size of the enabled I/O range.
[f52e54da]55 *
56 * @return 0 on success or an error code from errno.h.
[da1bafb]57 *
[f52e54da]58 */
[7f1c620]59int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size)
[f52e54da]60{
[7de18418]61 size_t elements = ioaddr + size;
62 if (elements > IO_PORTS)
[73e9b49]63 return ENOENT;
[99d6fd0]64
[7de18418]65 if (task->arch.iomap.elements < elements) {
[73e9b49]66 /*
67 * The I/O permission bitmap is too small and needs to be grown.
68 */
69
[7de18418]70 void *store = malloc(bitmap_size(elements, 0), FRAME_ATOMIC);
71 if (!store)
[73e9b49]72 return ENOMEM;
73
[da1bafb]74 bitmap_t oldiomap;
[7de18418]75 bitmap_initialize(&oldiomap, task->arch.iomap.elements, 0,
[25b9e2c]76 task->arch.iomap.bits);
[7de18418]77
78 bitmap_initialize(&task->arch.iomap, elements, 0, store);
[99d6fd0]79
[73e9b49]80 /*
81 * Mark the new range inaccessible.
82 */
[7de18418]83 bitmap_set_range(&task->arch.iomap, oldiomap.elements,
84 elements - oldiomap.elements);
[99d6fd0]85
[73e9b49]86 /*
87 * In case there really existed smaller iomap,
88 * copy its contents and deallocate it.
[99d6fd0]89 */
[73e9b49]90 if (oldiomap.bits) {
[25b9e2c]91 bitmap_copy(&task->arch.iomap, &oldiomap,
[7de18418]92 oldiomap.elements);
93
94 free(oldiomap.bits);
[73e9b49]95 }
96 }
[99d6fd0]97
[73e9b49]98 /*
99 * Enable the range and we are done.
100 */
[7de18418]101 bitmap_clear_range(&task->arch.iomap, (size_t) ioaddr, size);
[99d6fd0]102
[2382d09]103 /*
104 * Increment I/O Permission bitmap generation counter.
105 */
106 task->arch.iomapver++;
[99d6fd0]107
[f52e54da]108 return 0;
109}
[c7c0b89b]110
[2382d09]111/** Install I/O Permission bitmap.
112 *
113 * Current task's I/O permission bitmap, if any, is installed
114 * in the current CPU's TSS.
115 *
116 * Interrupts must be disabled prior this call.
[da1bafb]117 *
[2382d09]118 */
119void io_perm_bitmap_install(void)
120{
121 /* First, copy the I/O Permission Bitmap. */
[da1bafb]122 irq_spinlock_lock(&TASK->lock, false);
[7de18418]123
[da1bafb]124 size_t ver = TASK->arch.iomapver;
[7de18418]125 size_t elements = TASK->arch.iomap.elements;
126
127 if (elements > 0) {
128 ASSERT(TASK->arch.iomap.bits);
[da1bafb]129
130 bitmap_t iomap;
[7de18418]131 bitmap_initialize(&iomap, TSS_IOMAP_SIZE * 8, 0,
132 CPU->arch.tss->iomap);
133 bitmap_copy(&iomap, &TASK->arch.iomap, elements);
[da1bafb]134
[e9e5b9ab]135 /*
136 * Set the trailing bits in the last byte of the map to disable
137 * I/O access.
138 */
[7de18418]139 bitmap_set_range(&iomap, elements,
140 ALIGN_UP(elements, 8) - elements);
141
[2382d09]142 /*
[25b9e2c]143 * It is safe to set the trailing eight bits because of the
144 * extra convenience byte in TSS_IOMAP_SIZE.
[2382d09]145 */
[7de18418]146 bitmap_set_range(&iomap, ALIGN_UP(elements, 8), 8);
[2382d09]147 }
[7de18418]148
[da1bafb]149 irq_spinlock_unlock(&TASK->lock, false);
[99d6fd0]150
[ea199e5]151 /*
152 * Second, adjust TSS segment limit.
[7de18418]153 * Take the extra ending byte with all bits set into account.
[ea199e5]154 */
[da1bafb]155 ptr_16_64_t cpugdtr;
[2382d09]156 gdtr_store(&cpugdtr);
[da1bafb]157
158 descriptor_t *gdt_p = (descriptor_t *) cpugdtr.base;
[7de18418]159 size_t size = bitmap_size(elements, 0);
160 gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE + size);
[2382d09]161 gdtr_load(&cpugdtr);
162
163 /*
[99d6fd0]164 * Before we load new TSS limit, the current TSS descriptor
165 * type must be changed to describe inactive TSS.
166 */
[da1bafb]167 tss_descriptor_t *tss_desc = (tss_descriptor_t *) &gdt_p[TSS_DES];
[2382d09]168 tss_desc->type = AR_TSS;
[1d3d2cf]169 tr_load(GDT_SELECTOR(TSS_DES));
[2382d09]170
171 /*
172 * Update the generation count so that faults caused by
173 * early accesses can be serviced.
174 */
175 CPU->arch.iomapver_copy = ver;
176}
[b45c443]177
[06e1e95]178/** @}
[b45c443]179 */
Note: See TracBrowser for help on using the repository browser.