source: mainline/boot/arch/mips32/loader/asm.S@ da349da0

lfn serial ticket/834-toolchain-update topic/msim-upgrade topic/simplify-dev-export
Last change on this file since da349da0 was da349da0, checked in by Jakub Jermar <jakub@…>, 17 years ago

memcpy(), memmove() and similar functions return dst instead of src.
Fix all implementations, including those in assembly. ppc32 assembly
version didn't seem to be affected by this.

  • Property mode set to 100644
File size: 2.5 KB
Line 
1#
2# Copyright (c) 2006 Martin Decky
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions
7# are met:
8#
9# - Redistributions of source code must retain the above copyright
10# notice, this list of conditions and the following disclaimer.
11# - Redistributions in binary form must reproduce the above copyright
12# notice, this list of conditions and the following disclaimer in the
13# documentation and/or other materials provided with the distribution.
14# - The name of the author may not be used to endorse or promote products
15# derived from this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28
29#include "regname.h"
30
31.set noat
32.set noreorder
33.set nomacro
34
35.text
36
37.global halt
38.global memcpy
39.global jump_to_kernel
40
41halt:
42 b halt
43 nop
44
45memcpy:
46 addiu $v0,$a1,3
47 li $v1,-4 # 0xfffffffffffffffc
48 and $v0,$v0,$v1
49 beq $a1,$v0,3f
50 move $t0,$a0
51 move $t2,$a0 # save dst
52
530:
54 beq $a2,$zero,2f
55 move $a3,$zero
56
571:
58 addu $v0,$a1,$a3
59 lbu $a0,0($v0)
60 addu $v1,$t0,$a3
61 addiu $a3,$a3,1
62 bne $a3,$a2,1b
63 sb $a0,0($v1)
64
652:
66 jr $ra
67 move $v0,$t2
68
693:
70 addiu $v0,$a0,3
71 and $v0,$v0,$v1
72 bne $a0,$v0,0b
73 srl $t1,$a2,2
74
75 beq $t1,$zero,5f
76 move $a3,$zero
77
78 move $a3,$zero
79 move $a0,$zero
804:
81 addu $v0,$a1,$a0
82 lw $v1,0($v0)
83 addiu $a3,$a3,1
84 addu $v0,$t0,$a0
85 sw $v1,0($v0)
86 bne $a3,$t1,4b
87 addiu $a0,$a0,4
88
895:
90 andi $a2,$a2,0x3
91 beq $a2,$zero,2b
92 nop
93
94 sll $v0,$a3,2
95 addu $t1,$v0,$t0
96 move $a3,$zero
97 addu $t0,$v0,$a1
986:
99 addu $v0,$t0,$a3
100 lbu $a0,0($v0)
101 addu $v1,$t1,$a3
102 addiu $a3,$a3,1
103 bne $a3,$a2,6b
104 sb $a0,0($v1)
105
106 jr $ra
107 move $v0,$t2
108
109jump_to_kernel:
110 #
111 # TODO
112 # Make sure that the I-cache, D-cache and memory are mutually coherent
113 # before passing control to the copied code.
114 #
115 j $a0
116 nop
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